JPS605146U - integrated circuit device - Google Patents
integrated circuit deviceInfo
- Publication number
- JPS605146U JPS605146U JP9622483U JP9622483U JPS605146U JP S605146 U JPS605146 U JP S605146U JP 9622483 U JP9622483 U JP 9622483U JP 9622483 U JP9622483 U JP 9622483U JP S605146 U JPS605146 U JP S605146U
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- circuit device
- terminal
- asymmetry
- making
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来のＳＩＰ型集積回路装置の側面図、第２図
および第３図はそれぞれ本考案の一実施例および他の実
施例の側面図である。
１・・・・・・パッケージ本体、２・・・・・・外部導
出端子、３・・・・・・パッケージ前方標識、ｄ、 ｄ
ｒ曲端子間隔、Ｗ、 Ｗ□・・・・・・端子幅。FIG. 1 is a side view of a conventional SIP type integrated circuit device, and FIGS. 2 and 3 are side views of one embodiment and another embodiment of the present invention, respectively. 1...Package body, 2...External lead-out terminal, 3...Package front indicator, d, d
r Curved terminal spacing, W, W□・・・Terminal width.
Claims (3)
ら一列に並んで外部に引き出されているシングルインラ
インパッケージ型集積回路装置において、前記外部導出
端子列はその中心部に対し左右非対称性とされているこ
とを特徴とする集積回路装置。(1) In a single in-line package type integrated circuit device in which a large number of external lead-out terminals are lined up in a row from one side of the package body and are led out to the outside, the external lead-out terminal row is asymmetrical with respect to the center. An integrated circuit device characterized by:
ことによりなされていることを特徴とする実用新案登録
請求の範囲第１項に記載の集積回路装置。(2) The integrated circuit device according to claim 1, wherein the asymmetry of the terminal rows is achieved by making the terminal intervals different.
ることによってなされていることを特徴とする実用新案
登録請求の範囲第１項に記載の集積回路装置。(3) The integrated circuit device according to claim 1, wherein the asymmetry of the terminal array is achieved by making the shapes of the terminals different.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9622483U JPS605146U (en) | 1983-06-22 | 1983-06-22 | integrated circuit device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9622483U JPS605146U (en) | 1983-06-22 | 1983-06-22 | integrated circuit device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS605146U true JPS605146U (en) | 1985-01-14 |
Family
ID=30229415
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9622483U Pending JPS605146U (en) | 1983-06-22 | 1983-06-22 | integrated circuit device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS605146U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS638465U (en) * | 1986-07-04 | 1988-01-20 |
-
1983
- 1983-06-22 JP JP9622483U patent/JPS605146U/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS638465U (en) * | 1986-07-04 | 1988-01-20 |
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