JPS605110B2 - solid-state imaging device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an Oka body imaging device, and in particular, signals from light receiving elements formed in a two-dimensional array are successively read out via MOS type switching elements whose opening and closing are controlled by pulses. This invention relates to improvements in signal processing circuits for body imaging devices.

A large number (for example, 5
A MOS that forms a photodetector (for example, a photodiode) with a size of 00 x 40 and whose opening/closing is controlled by driving pulses in the vertical and horizontal directions and charges stored in each photodiode.
A solid-state imaging device in which signals are successively read out to a signal output line via a type switching element is known, for example, in Japanese Patent Laid-Open No. 54-37427, proposed by the present applicant.

This type of solid-state green image device has a problem in that various clock pulses leak to the signal output line via stray capacitance when reading signals from each light receiving element, degrading the S/N ratio. In particular, the approximately 7 MHz sampling clock pulse that drives the horizontal MOS type switching element acts as an equivalent low impedance (several 1000) signal source for the preamplifier connected to the signal output line, and the preamplifier output A noise component synchronized with the clock pulse appears with a magnitude of 1 M tones or more of the optical signal. For this reason, conventionally, an amplifier with a sufficiently large dynamic range is used as a preamplifier, and a filter for removing noise components is connected after the preamplifier to separate optical signals. In addition, in a solid-state imaging device, if the accumulated charge from the light receiving element remains unread, the resolution in the horizontal and vertical directions deteriorates. Amplifiers with special characteristics have been used.
However, in order to satisfy the above conditions, the power supply for the preamplifier must have a higher voltage value than the power supply for other drive circuits, especially in order to ensure a large dynamic range.
This was an obstacle to standardization and single power supply. SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a signal processing circuit for a field imaging device that does not interfere with reading out an optical signal from a light receiving element even if the dynamic range of the preamplifier is narrow.

To achieve the above object, in the present invention, the preamplifier is provided with a feedback loop that returns the output signal to the input side via an impedance element, and the frequency characteristics of the preamplifier are low-pass such that the cutoff frequency is within the video band. The frequency characteristic of the feedback loop is a Takagi pass characteristic having a cutoff frequency that coincides with the cutoff frequency of the preamplifier.

Hereinafter, details of the present invention will be explained with reference to the drawings.

FIG. 1 is a circuit configuration diagram of a solid-state imaging device and its signal processing circuit, and for convenience of explanation, one photodiode,
MOS required to read optical signals from this diode
A simplified circuit configuration represented by switches 3 and 6 is shown.

A current proportional to the amount of incident light flows through the photodiode 1, and a false signal charge is accumulated in the parasitic capacitance Co.

One end of the photodiode 1 is connected to a signal output line 7 via a MOS transistor 3 controlled by an output pulse of a vertical shift register 2 and a MOS transistor 6 controlled by a horizontal shift register 5. Vertical shift register 2 outputs a clock pulse every one field period to turn on MOS transistor 3.

Vertical signal line 4 compared to parasitic capacitance Co of photodiode 1
Since the capacity of is several tens to hundreds of times larger,
When MOS transistor 3 becomes conductive, it becomes a signal charge. Most of the capacity C. will be transferred to. In this state, when the MOS transistor 6 is made conductive by a sampling clock pulse (for example, 7 MHZ) from the horizontal shift register 5, the charge accumulated in the capacitor C flows out to the signal output line 7.

A preamplifier 9 with a feedback loop 8 of impedance Zf is connected to the signal output line 7. If the sum of the parasitic capacitance at the input stage of the preamplifier 9 and the output capacitance of the solid-state image sensor is C2, and the input impedance is Zin, then vertical The equivalent circuit of the signal line 4L is shown in FIG. In Figure 2, R,
represents the ON resistance of the horizontal switching MOS transistor 6, and the time constant for reading signal charges from the capacitor C is determined by the capacitor C, , C2 and the resistor R. , the current depending on the signal charge is determined by the impedance Zin;
It is converted into a voltage by n, and this is multiplied by the gain of the preamplifier and output.

In order to read out the charges in the capacitances C, C2 without leaving them, it is necessary to make the input impedance Zin of the preamplifier sufficiently small (for example, below IKQ).

Zin is the open loop gain of preamplifier 9, G(S), (
However, when S=j) and the feedback impedance is Zf(S), G(S) takes a value sufficiently larger than 1, and Zi
n=Zf(S)/G(S). Since the clock pulse from the horizontal shift register 5 leaks into the above circuit through the low impedance stray capacitance, lZi
If nl has a value around IKQ, regardless of the magnitude of Zin, the open loop gain G(S) of the preamplifier is multiplied by one output terminal.

Therefore, the horizontal clock pulse (
In order to reduce the ~7MH2) component, the gain G(S) of the preamplifier for this frequency component may be reduced. For example, set the cutoff frequency fc of the preamplifier to 3.
If designed for 9 MHZ, the horizontal clock pulse component of 7 MHZ will be reduced to about 1/2, and if fc is set to 0.7 MHZ, the gain for the 7 MH2 component will be about 1'10, and the required dynamic range of the preamplifier will be narrow. However, simply reducing the cutoff frequency of the preamplifier in order to reduce the horizontal clock pulse component leaking into the output circuit through the low impedance as described above will have an adverse effect on reading out the signal charge Qo as described below. That is, the open loop gain of the preamplifier G(S) is G(S)d.

・If 10S/2 is canceled (however, S=j■), the input impedance Zin of the preamplifier is Z
in = island - (10S/2 bamboo) Therefore, if Zf is only a pure resistance component, the input impedance is a resistance component (Zf/Go) and an actance component (Zf/Go・2 in fc) As a result, resonance occurs between the capacitance C2 and the above-mentioned actance component, the signal waveform becomes ringing, and the signal continues to exist in an oscillatory manner for a time of 25 seconds or more.

On the other hand, the conduction period of the horizontal switching MOS transistor 6 varies depending on the number of horizontal picture elements of the solid-state imaging device, that is, the horizontal clock pulse frequency, but when the horizontal clock pulse is about 7 MHZ (period: about 14 seconds), it is around 10 seconds. This is significantly shorter than the duration of the signal mentioned above. In this way, when the time constant determined by the capacitance C, C2 resistance R, and input impedance Zin is larger than the period during which the horizontal switching MOS transistor 6 is suitable for conduction, the signal charge is Qo cannot be read out, and a portion of the signal charge remains in the capacitor C and capacitor C2, causing mixing with signals of adjacent picture elements, resulting in deterioration of resolution. In order to solve this problem, in the present invention, the cutoff frequency of the feedback loop is made approximately equal to the cutoff frequency of the preamplifier, and the input impedance Zin of the preamplifier is made a pure resistance.

The input impedance Zin of the preamplifier can be determined by rewriting the above-mentioned equation as S;W〒i2bamboof.

The impedance Zf of the feedback loop is, assuming that Zf is composed of a parallel connection of a resistor Rf and a capacitor Cf, as follows.

Therefore, if this cutoff frequency f is made to match the cutoff frequency fc of the preamplifier, the input impedance Zin of equation (1) becomes Zinkomisaki'51 and becomes a pure resistance.As a result, resonance with the capacitance C2 will no longer occur, and there will be only a small amount of unread signal charge in the capacitors C. and C2. Fig. 3 shows a circuit according to an embodiment of the present invention, in which the output signal from the solid-state image sensor is connected to the gate of FET II. The drain of the FETI I is connected to the power supply voltage Vcc via the load resistor RL12, and the terminal voltage of the load resistor 12 is input to the positive terminal of the amplifier 13.On the other hand, the negative input terminal of the amplifier A reference voltage indicated by the battery 14 is inputted to the amplifier, and the output of the amplifier is fed back to the gate of FET II via a feedback loop including a resistor Rf15.A capacitive element CL16 is connected in parallel to the load resistor 12, and the feedback The resistor 15 includes a capacitive element Cf.
17 is connected, and the constants of each element are set so as to satisfy 1 to 1 fC=cloth tile and -2CfRr.

As a specific design example, in order to reduce the noise output component corresponding to a 7 MHZ horizontal clock pulse to 1/5, the cutoff frequency fc of the preamplifier is set to 1.4.
Select MHZ, RL=IKQ, C ladder 11 ratio F, Rf=
500KO, Cf=0.23F. In addition, when the capacitance value Cf of the feedback circuit is extremely small as in the above design example, it is possible to replace the parasitic stray capacitance of the feedback resistor 15 with all or part of the capacitive element 17. A circuit 20 connected to the output circuit of the preamplifier 13 is a Takagi correction circuit for correcting the deterioration of signal frequency characteristics in the preamplifier system, and is a Takagi correction circuit that adjusts the frequency from the cutoff frequency fc of the preamplifier to the upper limit of the bidi band, approximately 3. The preamble output signal is enhanced and corrected in the 8 MHz frequency band.

The output signal of the Takagi correction circuit 20 is input to a low-pass filter circuit (not shown), thereby cutting off noise components of 3.8 MHZ or higher. As described above, the present invention reduces noise synchronized with horizontal clock pulses by setting the cutoff frequency of the preamplifier within the video band, and also sets the cutoff frequency of the feedback loop to be approximately equal to the cutoff frequency of the preamplifier. By matching, unread signal charges are reduced.

According to the present invention, it is possible to use a preamplifier with a narrow dynamic range as a preamplifier that processes the output signal of a solid-state imaging device, and it is possible to downsize the solid-state imaging device and use a single power source.

[Brief explanation of the drawing]

FIG. 1 is a fundamental circuit configuration diagram of a solid-state imaging device, FIG. 2 is an equivalent circuit diagram of the main part of the circuit shown in FIG. 1, and FIG. 3 is a diagram showing an embodiment of a signal processing circuit according to the present invention. . In the figure, 1 is a light receiving element, 24 is a vertical register, 3 and 6 are
is a MOS type switching element for optical signal readout, 5 is a vertical shift register, 9 and 13 are preamplifiers, and 8 and 15 are
12 is a feedback resistance element, 12 is a load resistance element, 16 and 17 are capacitance elements, and 20 is a frequency characteristic Takagi correction circuit. East map, Figure 2, Figure 3

Claims (1)

[Claims] 1. Signals from a plurality of light receiving elements arranged in the horizontal and vertical directions are read out to a signal processing circuit including a preamplifier via a MOS type switching element whose opening and closing are controlled by pulses. In the solid-state imaging device, the preamplifier includes a feedback loop that returns an output signal to an input side via an impedance element, the frequency characteristic of the preamplifier is a low-pass characteristic having a cutoff frequency within a video band, and the feedback loop A solid-state imaging device characterized in that the frequency characteristic is a high-pass characteristic having a cutoff frequency that substantially matches the cutoff frequency of the preamplifier. 2. The solid-state imaging device according to claim 1, wherein the signal processing circuit includes a correction circuit downstream of the preamplifier for enhancing signal components in a frequency range higher than the cutoff frequency.