JPS6048957B2 - Device that corrects the time axis of information signals - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention generally relates to a technique for changing the time axis (time reference axis) of a signal that changes over time, and further includes ιNyo 'de),, ↓ Poo T.

It relates to an apparatus for digitally correcting the time base of an information signal, which is particularly suitable for electronically correcting desired time base differences. While processing time-varying electrical signals for signal conversion, analysis, or correction, it is necessary to change or compensate for the time axis of the signal.

For example, signal time base compensation is commonly used to correct for undesired time base differences in signals that have repetitive time base synchronization components. Changing the signal time base to correct for undesired time base differences occurs when the signal is between different regions, such as occurs when the signal is recorded on or played back on magnetic tape or other forms of recording media. This is especially important when undergoing transformations. During the recording and playback process, the time function of the signal is converted to a spatial function and then back to a time function. Timing or time base errors are often introduced into a signal as it undergoes a transformation. Such time base errors, which are dynamic or in other words temporally variable, prevent the achievement of the required transient-free and temporally stable signal reproduction required in high-resolution signal processing systems. For example, time-stable signal generation is desired in all television signal processing equipment, and highly stable generation requirements are desired in equipment used to prepare television signals for public transmission. Ru. Two techniques are used to correct undesired time base errors in signals reproduced from recording media: electro/mechanical and electronic.

Electro/mechanical techniques are used to correct large time base errors and accomplish such corrections by synchronizing the motion of signal recording and reproducing equipment. Electronic techniques are used to correct small residual time base errors not corrected by electro/mechanical devices by displacing the signal in time after reproduction and to accomplish such correction. The present invention is concerned with electronic techniques for correcting time base errors. Conventionally, electronic signal time base changing devices use an adjustable time delay device inserted into the signal path to correct time base errors. was.

In such devices, a time base error is measured and the amount of time delay inserted into the signal path is adjusted to compensate for and correct the measured time base error. One particular type of device that is widely used uses lumped inductors and voltage variable capacitors interconnected in a delay line configuration. A voltage corresponding to the measured time base error is applied to this variable diode to determine the delay necessary to correct the time base error. See US Pat. No. 3,202,76 for a voltage variable delay linear signal time base changing device. In another type of electronic signal time base alteration device, multiple fixed delay lines or a single delay line with a series of taps spaced along it are combined by electronic switches. arranged in a shape.

Timebase errors are corrected by operating switches in accordance with the measured error to selectively insert the necessary corrective delay lines into the signal path. A fixed delay linear signal time base changing device is described in U.S. Pat. No. 3,763,317,
The tapped delay linear signal time axis changing device is US Patent No. 3.
No. 748368. It is described in. In recent years, digital delay devices, such as clocked storage devices, have been used in devices for correcting time base errors in analog signals.

In this digital device, the analog signal being corrected is digitized, corrected and reconstructed. Correction is accomplished by loading or writing this digitized signal to an adjustable storage register at a fixed frequency determined by the frequency of the reference clock signal. This storage register is operated to correct the time base error by reading signals from the register at a higher or lower frequency that is adjusted according to the time base error. This fixed write speed and variable read speed technique cannot handle large discontinuities or gradual time changes in the signal. In magnetic tape records, such progressive time base changes are usually caused by irregularities in their operation, and most commonly occur when switching between magnetic transducer heads. Signal time axis change device,
It is customary to cascade a coarse time base correction device and a fine time base correction device, especially those arranged to eliminate time base errors and provide a high degree of signal time base stability.

A voltage variable delay line device was used to provide the desired fine time base correction, and a switched delay line device was used to provide the coarse time base correction. Since all such delay line devices are analog devices, they are prone to drift and have other disadvantageous characteristics of analog devices. 'The gradual time base changes that occur as a result of the irregularities in the operation of the tape recorder will cause the signal processing operations to This often results in errors or costly interruptions in performance. Furthermore, when it is necessary to correct a large range of time base errors, a large and complex correction device is required. Therefore, it would be of considerable benefit to utilize a technique for performing signal time base compensation that can perform all time base changes, including incremental ones, without errors.

It is also possible to change the signal time base by any fraction of the known step amount necessary to bring the signal within a desired time base reference of an integer known step amount, and then move the signal to the desired time base. Additional benefits to the performance of such signal time base compensation can be provided by varying the signal time base by such an integer known step amount to adjust up to . A feature of the invention is the use of digital techniques for signal time base modification, which makes it possible to use digital circuits that are much cheaper to construct and maintain than analog circuits.

Another feature of the invention is that time base compensation can be performed without the need for analog measurements of the desired amount of compensation, thereby avoiding all of the disadvantageous characteristics of analog circuits. Another object of the present invention is to temporarily store signals in a time buffer at times that are adjusted according to desired time changes while maintaining a fixed storage readout time relative to an established time reference. By doing so, the signal is retimed by a fraction of the known step amount. Another feature of the invention is to make further incremental changes in the time base of the signal according to a desired time base change while maintaining a fixed storage write time relative to some established time base reference. This can be done without error by adjusting this separate memory read time for . Yet another feature of the invention is that a change in the time axis of a signal that is larger than one major division of the time axis defined by the period of one cycle of a time axis component of the signal is first performed by changing the time axis of the signal to this major time axis. by changing the signal by any desired amount corresponding to the fractional amount of the subdivision, and then incrementally changing the signal further by any desired amount corresponding to an integer multiple of the major time axis subdivision. , there are things that can be accomplished. Yet another feature of the present invention is the use of a guidance control signal to effect the time base change which greatly reduces the effects of noise. These and other features of the invention are particularly advantageously applied in eliminating time base errors in television signals reproduced from video recording devices. According to the invention, the information signal whose time axis is to be modified, ie to be compensated, is sampled to obtain a representative part of this information signal. must include or be given a time axis component that appears at least at spaced points in the information signal.

A timing signal, such as a clock signal, whose frequency remains fixed relative to the nominal frequency of the time component associated with the uncompensated information signal. or a time base reference is first used to control sampling time and frequency. This reference clock signal must be generated for the occurrence of the information signal such that at least a portion of the time domain component is sampled multiple times. Such sampling must be sufficient to make it possible to reconstruct the time axis component from a representative portion thereof. When the time base component is sampled under the control of the reference clock signal, a representative sample is stored and subsequently used to regenerate a representative portion of the time base component.

It has frequency stability and phase coherent with the time domain component associated with the uncompensated information signal. An information clock signal is derived from this regenerated time base component such that its frequency and phase characteristics are constant with respect to those of the regenerated time base component and thus the original time base component. During the period of the information signal following the portion of the time axis component that induces the information clock signal, this induced information clock signal is used to time additional processing of the information signal to introduce the desired amount of time axis change. used for. The use of a derived clock signal obtained in the manner described above may be used to further process an information signal, such as a television signal, to change its time axis for the purpose of removing timing differences or time axis errors that normally occur in such signals. is particularly advantageous. When using the technique of the present invention to eliminate time base errors that occur in television signals, the frequency and phase of the reference clock signal are kept fixed, and the derived clock signal is the same as the information signal that derived the information clock signal. It is used to time the further sampling of the information signal during the period following the portion of the time axis component. To remove time base errors from the color television signal, an information clock signal is obtained from the re-occurrence of the color synchronization burst that occurs at the beginning of each horizontal scan line period of the composite color television signal.
The clock signal thus obtained is used to time the sampling of the video information signal component following the synchronization period located at the beginning of each horizontal scan line of the television signal. Following further sampling, a representative portion of the resulting video signal is written to a clock isolator or time buffer at a time determined by the resulting clock signal.

The video signal representative portions are then read from the buffer at a time determined by a fixed frequency and phase reference clock signal. In this manner, the time buffer acts to realign these video signal representative portions with respect to the reference clock signal. The original form of the video signal can be reconstructed from this realigned and sampled representative portion read from the buffer. The use of a clock signal obtained from the regeneration of the time base component of the information signal to time the further processing or sampling of the information signal is one of the basic features of the invention which facilitates the modification of the signal time base. It is one.

As mentioned above, obtaining the information clock signal in this way ensures that the frequency and phase of the induced clock signal are always accurately related to those of the time axis components contained in the information signal. . Therefore, the time axis of the induced clock signal follows changes in the time axis relationship of the information signal and the timing reference. Because the time axis of the induced clock signal is precisely locked to the time axis of the information signal, and because the induced clock signal is used to control the further sampling of the information signal, the information signal is always in time with the information signal and the timing reference. Further samples are taken at the same point during the period regardless of axis relationship. A change in the temporal relationship of the information signal and the timing reference does not change the sampling point within the period of the information signal. In this manner, the sampled information signal can be retimed with respect to any desired time base, regardless of changes in the time base relationship of the information signal and the timing reference. As will be readily apparent upon consideration of the detailed description of the preferred embodiment of the signal time axis modification technique of the present invention, the derivation of the information clock signal and its utilization to further sample the information signal is advantageous in this technique. In the implementation of the present invention, it is possible to realize significant advantages, the most important of which lies in reliably and accurately time-base error correction of television signals. Normally, the time axis component of an information signal is a simple periodic signal.

However, some information signals, such as television signals, have a number of time base components arranged to define the main and sub-periods of the information signal as well as the time base conditions within the periods. Since such time components have different frequencies, in some situations it may be desirable to ensure that the sub-periods are correctly aligned with respect to some reference even if the higher frequencies are not. It is possible. To avoid possible negative effects caused by incorrect indication of correct time axis alignment, the highest frequency time axis component is selected to derive the information clock signal. Signal time base compensation of up to one cycle of the highest frequency time base component is automatically provided by the technique of using this derived information clock signal to further sample the information signal. When signal time base compensation of more than one cycle of the highest frequency time base component is required to achieve correct time base alignment, the information signal is further examined to determine the number of total cycles and this is further modified. the time axis must be aligned correctly. This required further modification is accomplished by storing the sampled representative portion in memory for a number of cycles corresponding to the determination. Preferably,
This further modification occurs after the sampled representative portion has passed through the time buffer. In addition to changing the time axis of the information signal to remove unwanted time axis differences,
Signal time base compensation according to the present invention can be used to introduce desired time base changes in an information signal.

Such a desired time base change is introduced by changing the time base of the reference clock signal according to the desired time base change. In other respects, the signal time base compensation of the present invention is performed in the same manner as described above for time base error removal. Changing the time axis of the reference clock signal causes a change in the time axis relationship of the time axis components included in the reference clock signal and information. As mentioned above, such a relative time base change introduces an equivalent time base difference between the time base of the sampling of the information signal and the time base of the time scaled reference clock signal. Therefore, reading a sample of the information signal from the time buffer at a time defined by the time-modified reference clock signal results in retiming the information signal with respect to the modified reference signal, thereby causing the information signal to have the desired time. This results in the introduction of axis changes. As can be seen from the foregoing, the signal time base compensation according to the invention is easily applicable to digitization and thus presents advantages that can be obtained by utilizing digital circuits. Furthermore, the time axis of the information signal is changed by a known time increment, i.e., by a major time axis division (i.e., by a fraction thereof), and then by an arbitrary increment equal to an integer multiple of such increment, regardless of the magnitude of the time axis change. The ability to change the time base of an information signal by an amount of 100 kHz has the advantage of avoiding the limitations associated with cascading analog time base changing devices.
Preferred embodiments of the present invention will be described below with reference to the drawings.

A signal time base compensator 110 according to the present invention, as shown in FIG. shown as being configured to remove.

However, the principles of the present invention can be used to correct time base errors present in other time-varying information signals, eliminate differences in the relative time bases of signals, and intentionally change the time base of signals. It should be understood that it is equally applicable to performing other signal time base compensations. In particular, with reference to FIG.
111, which is operative to produce at its output 112 a digital pulse code modulated version of the television signal. This digital signal is further processed so that it is ultimately delivered to a demodulating digital/analog converter (hereinafter referred to as a DIA converter) 113 without any errors, ie, with the errors removed. D.I.
A converter 113 reproduces the television signal in analog form at output 114. Since the synchronization component contained in the television signal output from the Dl8 converter 113 is usually not in the correct form and contains undesirable excess components as a result of passing through the compensation device 110, the television signal is not processed by the video recorder. Output processing device 116 of a commonly used type
is combined with Such processing unit 116 is operative to remove the synchronization component from the incoming television signal and insert therein a new correctly shaped and timed synchronization component to form the desired composite television signal at its output 117. do. In the compensation device 110 of the present invention, the encoded AID converter 111 is connected to the line 118.
It produces a multi-bit word of the incoming signal at output 112 each time it is clocked by a clock signal provided by.

Transducer 111 is clocked to sample the instantaneous analog amplitude of the incoming television signal so that a series of binary words is generated at its output 112.
Full. Each word consists of a number of binary bits that together represent one particular amplitude level in binary form. This analog-to-digital conversion operation is commonly referred to as pulse code modulation of the incoming signal. The inverse of this operation is performed by decoding DIN converter 113.
A decoding DIA converter 113 receives these binary encoded words at its input on line 119 and outputs the re-coded words provided to output processing unit 116 in response to a series of reference clock signals received on lines 121 and 122. Producing a composed or decoded analog television signal, processing unit 116 provides the corrected television signal at output 117. According to the invention, time base compensation is achieved by deriving a clock signal from a time base component contained in a television signal such that the clock time of the derived clock signal is coherent with the time base component. Ru.

This derived clock signal is used to clock the AID converter 111 to sample the uncorrected television signal and encode the television signal into a digital binary word signal. After encoding, the digitized television signal is time buffered and decoded in DIA converter 113 with a clock signal coherent and time-locked to a reference time base signal, such as a reference color subcarrier. Ru. As a result of such buffering and decoding, the decoded television signal is brought into phase with the reference color subcarrier. Accurate time base correction for color television signal alignment is achieved by deriving a clock signal associated with the information signal from the color synchronized burst time base component located in the pack porch of each horizontal scan line blanking period. It is achieved by doing so.

This induction is applied to the input of the recirculable digital storage device 123 of one or more cycle portions of the color burst of the signal obtained at the output 112 of the AID converter 111.
This is accomplished by combining the leading word signal portions.
- Storage device 123 provides digital storage of a plurality of binary words corresponding to the amplitude levels of the signal color bursts between sample times. Gala! of an uncorrected television signal by memorizing the binary words obtained during sampling of the signal's color burst! Sufficient information is stored in storage 123 to repeatedly regenerate a full cycle of color bursts so that the same continuous signal as a color burst can be generated continuously over the duration of the color burst of the signal. The derived clock signal is obtained by further processing the continuously regenerated color burst signal, and it is used to digitize the remaining portions of the horizontal scan lines of the television signal regenerating it. used. This continuous signal and therefore the recirculable storage 123
During the sampling period of the color burst of the television signal, the AID converter maintains the derived clock signal regenerated from the color burst samples stored in the color burst in phase with the color burst and thus the uncorrected television signal. and clocked during storage of the samples (resulting from said sampling) by a second clock signal at a lock time coherent with the reference clock signal.

AID converter 111 will therefore be clocked by two clock signals on line 118. Initial clocking preferably occurs during a sampling and storage mode period lasting for several color burst time base components. During this first mode, the clock input (CL) of AID converter 11 receives a clock signal on line 118 that is clocked in phase with the reference clock signal. AID converter 11 is clocked by the second induced clock signal received from line 118 during the next recirculation mode, which mode lasts for the remainder of the horizontal scan line period after the first clocking. For these two modes of operation, switching means 124 are provided having a switching device 126 for setting a first state, namely the sampling and storage state, connecting the line 118 to a clock output line 122 from an X-ray clock source 128. .
Switching device 126 is operable to establish a second or recirculation condition connecting line 118 to an inductive clock signal provided by digital storage circuit 129 via line 127. In this recirculation mode, switching device 120 connects the clock input (CL) of AID converter 111 to
is connected to the X-clock clock circuit 131 and the storage circuit 129
gives the clock output from xAsahi Clock Circuit 13
1 responds to the output of DIA converter 133 via band film 132. DIA converter 133 converts or reconstructs the binary word portion of the signal color burst recycled within recirculable storage 123 into analog form. The signal obtained from DIA converter 133 thus appears as a continuous unfiltered replica of the input signal time domain component, which in this embodiment is a sinusoidal color burst of the television signal. Bandpass filter 132 is set to provide a center frequency equal to that of the color burst of the signal being corrected, which is a frequency of 3.58 MHz for an NTSC standardized color television signal. Connecting a filter 132 between the output of the DIA converter 133 and the input to the X3 signal clock circuit 131 facilitates recovery of the color burst frequency after various conversion and digital storage operations. There was found. If portions of multiple signal color burst cycles are sampled and stored in storage 123 so as to regenerate the derived clock signal, filter 132 can detect any portion of the signal color burst included in this recirculated signal color burst. The noise is averaged over a large number of storage cycles, thereby improving the timing accuracy of the induced clock signal.
As mentioned above, the switching device 126 of the switching means 124 normally connects the X-clock clock circuit 131 to the clock input (CL) of the AID converter 111 in the second state shown, that is, in the recirculation mode state. and time the encoding of the uncorrected television signal with recirculated color burst samples obtained from the signal.

In order to operate the switching device 126 to set the other state to the first state, namely the sampling and storage mode state, the switching means 124 includes a circuit for detecting the occurrence of a color burst time base component in the television signal and a circuit for detecting the occurrence of a color burst time base component in the television signal. includes a device (i.e., switching device 126) that responds accordingly.
Specifically, a sync separator 134 is provided to detect, at the input of the compensator 110, the occurrence of each horizontal sync pulse (signal H) that occurs during the blanking period of each horizontal scan line of the television signal. . The output of this separation device is coupled to the input of a switched control pulse generator 136. When the leading edge of the horizontal sync pulse is detected, the separator 134 commands the pulse generator 136. After a period of approximately 6 microseconds, pulse generator 136 generates a pulse lasting approximately 2 microseconds to activate switching device 126 to its sampling and storage mode state. In this way, AI
In response to the occurrence of a horizontal synchronization pulse on the input to the D-converter 111, the separation device 134 and the pulse generator 136 cause the switching device 126 to transfer the encoded X3 reference clock signal to the converter 111.
the clock input (CL) of converter 1.
11 responsively digitizes the signal color burst for the selected number of cycles.

The timing of the operation of separator 134 and pulse generator 136 in this embodiment is such that switching device 126 is operated in the sampling and storing mode during periods that are in the middle of the color burst period. It is becoming more and more common to be forced to use the appropriate platform. It is desirable to sample and store the digital portion of the color burst of the signal as it occurs in the middle of the color burst period, since this period is the most accurate representation of the color sync burst frequency. This is because it is highly reliable. In addition, because the change in the color burst position is small during the back porch during the horizontal blanking period,
There is less possibility of introducing errors into the derivation of clock signals related to information signals. A burst detector 137 connects the compensator 11 to condition the recirculable storage 123 to store five cycles of color burst digital portions.
Connected to the 0 input.

When a color burst occurs in the incoming television signal, a burst detector 137 generates a command signal on a line 138 extending to the write-enable input (WE) of the digital recirculating storage device. This command signal causes memory device 124 to write the multi-bit binary word appearing at output 112 from AID converter 111. The actual write or storage operation is performed from the X-ray clock generator 128 to the storage device 1.
23 occurs at each reference clock time defined by the clock signal input to 23. The following operation of recirculable storage 123 is best understood by reference to both FIG. 1 and FIG. If you refer to Figure 2,
Storage device 123 includes a random access memory 139 having a write control input (W) and an address control input (A).

Multiple bits 2 at output 112 of AID converter 111
A binary word input is connected for receiving a binary word. A binary word output is provided to generate a recirculating digital signal on line 140. address generator 14
1 on connection line 142 in response to the X3 reference clock signal on line 122, memory 13 according to the address signal generated.
9 generates address signals for writing and reading. A write clock generator 143 is included in the storage device 123.
, which generator 143 is responsive to a command signal on line 138 from burst detector 137 . This command signal sets a write clock generator 143 to generate a write enable signal via line 144 to the write enable input (W) of random access memory 139 each time an X-clock signal is received from line 122. do. When the write enable signal is received by random access memory 139,
The binary word generated by AID converter 111 is written to memory 139 for storage. Storage device 123
also includes a counter 145 responsive to a command signal received at a RESET (R) input coupled to line 138 from burst detector 137. This command signal resets counter 145 to count the address signals generated by address generator 141. Counter 145 is also reset by an internally generated command signal as described below. A reset command signal is generated on line 146 each time counter 145 is reset. The first reset command signal generated subsequent to the command signal provided by burst detector 137 on line 138 causes write clock generator 143 to
37 disables the previously enabled write clock generator 143. In this manner, Langmuth access memory 139 is prevented from receiving the binary word portion of the television signal after receiving the 15 samples of the color burst. Counter 145 also serves to recirculate address generator 141. Each time the address generator 141 generates an address signal, the counter 14 is activated.
5 is clocked by the X3 reference clock signal received on line 122 and connected to address generator 1 via line 148.
The address signal generated by 41 and received with its data (D) is examined. Counter 145 generates a reset command signal to address generator 141 via line 146 when it detects the occurrence of the last of the address signals generated by address generator 141 . Counter 145 also uses this reset command signal internally to reset itself and re-examine the address signal generated by generator 141. In this manner, the address generator 141 is caused to sequentially cycle through the b address signals to store 15 multi-bit binary words representing the five sampled cycle portions of the signal color burst. Access memory 13
Identify the position within 9. A further explanation of the operation of recirculable storage device 123 is provided in conjunction with a description of the actual operating sequence of compensator 110. In selecting the frequencies at which the incoming information signal must be sampled, the well-known sampling theorem is used. Accordingly, the clocking or sampling frequency must be at least twice the maximum signal frequency at which the signal will pass through the system without substantial degradation. Furthermore, the clocking frequency and storage capacity of the random access memory 139 are different from that of the random access memory 13.
The number of digitized samples stored in 9 is equivalent to an integer multiple of the total cycle of the time domain component of the signal, in other words, the number of samples per cycle or period of the time domain component multiplied by an integer multiple of the cycle. must be chosen to be equal. With this selection of clocking frequency and storage capacity, the random access memory 139 is responsible for an integer multiple of the digital portion of a full cycle of the timing component of the signal, which when recycled is in the recirculation mode. This results in the generation of a continuous clock signal. In the case of color television signals, both the storage capacity and the sampling frequency criteria are advantageously selected such that the encoded clock signal has a frequency three times the color burst frequency and by storing two samples of the color burst. Satisfied. Therefore, in this example, X3
Signal clock circuit 131 constitutes a frequency multiplier for multiplying the continuously regenerating color burst signal generated by storage device 123, DIA converter 133 and bandpass filter 132 by three. The frequency of the encoded clock signal used during sampling and storage modes must be equal to the established encoding frequency for each purpose, but the phase must be adjusted according to the time base error of the signal being compensated for - and therefore the induced clock signal. It is recognized that it is okay to be different.
In the embodiment of FIG. 1, the basic reference time base signal is, for example, a reference color subcarrier derived from a studio reference signal source for synchronizing all of the studio equipment for broadcast purposes. .

This reference color subcarrier is provided to a reference signal processor 148. This processor is a common component that compensates for fixed delays present in cables, etc., and
(Phase Alternating Line). The output of the processing unit 148 provides the basic reference time base signal for which the compensator 1
10 acts to compensate for the incoming television signal. X3
Because a reference clock signal is required, the frequency of this reference time base signal is tripled by a frequency multiplier included in the x-clock quasi-clock generator 128. Since the X1 reference clock signal is also required by the compensator 110, the X1 reference clock generator 149 receives the reference time base signal from the processor 148 and generates this X1 reference clock signal on line 121. Following the aforementioned selection of encoding and decoding clock frequencies, AID converter 111 is capable of generating a separate binary word at each clock time that occurs during a period equal to one cycle of the color burst. Do the following. In this embodiment, the AID converter 111
is designed to generate one 8-bit word each clock time, each 8-bit word providing an amplitude level capacity of 0 to 256 to provide a digital representation of the incoming television signal. Therefore, recirculating digital storage 123 has a capacity of 15 words, each word consisting of 8 bits. 3 for each cycle of color burst
Since there are three sampling points, the random access memory 139 of the storage device 123 can store all five cycles of the digitally represented color burst. In operation, the memory clock 39 is commanded by the write clock generator 143 (when a burst occurs) while the switching control pulse generator 136 generates a 2 microsecond pulse in response to the detection of a horizontal sync pulse. ) AID converter 1 upon each x-level clock signal received via line 122.
Write or store the binary word that occurs at output 112 of 11.

Referring to FIG. 2, address generator 141 accesses a new word store in memory 139 in response to each x quasi-clock pulse such that each newly accessed word store is output at output 112. receives the instantaneous state bits of the binary word. A 2 microsecond pulse emitted by pulse generator 136 temporarily sets switching device 126 to its sampling and storage mode state, thereby switching the X-order clock signal on line 122 to AID converter 1
11 to clock this. The storage operation is performed by detecting the first address generated by address generator 141 via line 147 following the generation of a 2 microsecond pulse and generating a reset command signal to write clock generator 143. , 5 cycles of digitized color bursts are stored by the counter 145 and then terminated.

This reset command signal disables the write clock generator 143, thereby causing the random access memory 13
Application of the write enable signal to 9 is stopped. Following the termination of the sampling and storage mode, the address generator 141
continues to access memory 139 in response to the X3 reference clock signal on line 122, sequentially repeating the same 15 word locations accessed during the write operation.

This sequentially outputs the stored 8-bit word on output line 14.
0 to the DIA converter 133. Memo! Moon 39 is permanently placed in a read mode so that the stored binary words are continuously read out via line 140. The read function is activated when new digital information received from the AID converter 111 is stored by operation of the bypass switch 151. switch 1
51 has two inputs and one output. One input of the shunt switch 151 is connected by a line 153 to the output of the random access memory 139 and the other input is connected by a shunt path 154 to the line 112 of the input of the storage device 123 . During sampling and storage modes, write clock generator 143 is set to provide a write enable signal so that write clock generator 143 connects bypass switch 151 to line 11.
2 and 140, thereby passing the binary word being stored in memory 139 directly to the output. At the end of the sampling and storage mode, write clock generator 143 is disabled, thus causing switch 151 to connect output line 153 of memory 139 to line 14.
Leave it connected to 0. Switch 151 remains in this state during the entire recirculation mode to enable coupling of the stored color burst word to DI8 converter 133 for inducing an information related clock signal. By providing the bypass switch 151, the X3 clock signal circuit can be prepared to generate an induced X3 clock signal. Address generator 141 when in recirculation mode
and counter 145 act together to effect repeated generation of the same address sequence.

This causes the stored binary words in memory 139 to be read out repeatedly in this order throughout the remainder of the horizontal scan line period following the color burst. Figures 3A and 3B illustrate how the induced clock signal is generated to be in phase with the time component of the information signal from which it was induced.

FIG. 3A shows the situation that would exist if the incoming color television signal were free of errors. In the diagram, 441,,,4th 2,,,number 43,,,441,, are X
3 criteria. The upper waveform shows the color burst waveform, the next wave shows the sampled value with the X mark, and the third and fourth stages show the recirculated color burst and its X3 waveform. During the sample and store mode, the X3 reference clock is used to sample the signal color burst within the AID converter 111 and store the sample values in the recirculable storage 123. Since there is no error in the incoming television signal, the first sample of each cycle of the color burst of the signal at timing position "'1" in the figure occurs at the beginning of the color burst cycle and is stored in storage 123. When the 15 words are recirculated, the output of filter 132 will be in phase with the color burst contained in the incoming television signal.
When a time base error is present in the incoming television signal, as shown in FIG. 3B, the sample values represented by the binary words obtained from AID converter 111 will be different. This difference occurs because there is a time base difference between the reference time base signal and the incoming television signal, and therefore between sample points during the color burst cycle. When the fifteen words stored in storage device 123 are recirculated, the regenerated color burst signal output from filter 132 will be in phase with the color burst contained in the incoming television signal. Therefore, the clock signal derived from the filter output is always in phase with the time axis component included in the television signal, regardless of time axis changes or errors that occur in the television signal. Although a random access memory, an address generator, and a counter were used as recirculable storage 123 in this embodiment, it should be understood that other digital storage circuits could be used instead. For example, a recirculating shift register may be used as a storage device 12 as would be understood by those skilled in the art.
3 functions can be provided. In order to avoid errors in the re-alignment of the digital representative part of the television signal output from the AID converter 111 in a simple configuration when in recirculation mode, a time buffer 156 is used, which has a one-word serial input at its input. /3 word parallel converter 157 and a complementary 3 word parallel/1 word serial converter 158 at its output.

Transducers 157 and 158 are shown in FIG. The consecutive binary words produced at output 112 are fed into a serial-in parallel-out converter 157. This converter 157
generates a series of binary words at three times the clock frequency of the recirculating signal color burst by applying clock pulses from an X3 clock source available on line 118 to the clock input (CL) of this converter. Receive each. Converter 157 is configured to serially store three of the binary words generated at output 112, and each new . The new word is of the kind that shifts out the last word so that the converter is always filled with three complete binary words. This serially loaded information is transferred to a clock isolator contained in time buffer 156. 163 (4th
(see figure) and is transferred in parallel to the converter 158. During each scan line period of the input television signal, the transfer time to the clock separator 163 is determined by the X1 signal clock circuit 159 (
(see FIGS. 1 and 4) occur at clock times determined by clock pulses generated by a clock pulse. The X1 signal clock circuit is connected to the output of bandpass filter 132 to generate clock pulses at the recirculating color burst frequency, which is the frequency of the color burst as it occurs at the beginning of the scan line period. Specifically, the X1 signal clock circuit 159 limits the filter output and uses the positive leading edge of the square waveform generated therefrom to generate clock pulses. Each positive transition leading edge of this limited reoccurring color burst identifies the beginning of a cycle of color bursts. X1 signal clock circuit 159 is connected to time buffer 156 via line 161. In this manner, clock separator 163 receives the entire contents of converter 157 in response to each applied chronograph pulse, which, as previously described, includes three complete clock pulses generated by AID converter 111 at output 112. Retains the forward word at all times.
The three words received in parallel by clock separator 163 correspond to the three words generated during one cycle of the regenerated color burst. The output of converter 157 is a 24-bit word applied to the input of clock separator 163.

Separator 163 reads 24-bit words simultaneously.
and can be written. Since the separation device 163 can thus be read and written simultaneously,
Clocking operations can be performed on different non-coherent clock signals at its input and output, thereby providing time buffering and the ability to retime the signals. To write or store the output of converter 157, the clock signal generated by signal clock circuit 159 is applied by line 161 to the write address (WA) and write enable (WE) inputs of isolation device 163. This clock signal is in phase with the color burst of the uncompensated television signal. The stored 24-bit word associated with each cycle of the time domain component is responsive to the X1 reference clock signal generated by reference clock generator 149 and applied by line 121 to the read address (RA) input of separator 163. It is read out or outputted from the separation device 163. By clocking the separator 163 with two clock signals, the phase of the separator output is realigned and synchronized with respect to the phase of the reference color subcarrier.

Converter 158 is complementary to converter 157 in that it provides parallel-in-serial-out conversion of the digital word information received from converter 157 via clock separation device 163.

Converter 158 thus reconverts this digital information into a one-word serial format; however, in this embodiment, the serial word is provided to converter 158 via line 121 as shown in FIG. is clocked and output from converter 158 at a clock time defined by the X1 reference clock. These serial words are applied to the input of DIA converter 113 by line 119 and are then decoded under the control of the X-column clock on line 122. DIA converter 113 reconstructs a desired analog signal synchronized to the phase of the reference subcarrier and provides output 114 . As described above, the digital compensator of the present invention serves to synchronize the incoming information signal with a reference or standard time base signal.

It has been found that the time correction range in this embodiment is a period corresponding to a complete cycle of the time axis component. Specifically, for color television signals, the correction range is the duration of one cycle of the color burst frequency, which corresponds to the inverse of 3.58 megahertz or about 0.28 microseconds. When the phase error of the incoming video signal exceeds this range, as is the case, for example, when reproducing a television signal from a tape recorder, the signal presented at output 114 is shifted from the phase of the color burst component to the reference color subcarrier. It is shifted so as to be synchronized with. However, the horizontal synchronization signal of the television signal is in an incorrect phase with respect to the reference horizontal synchronization signal. In some applications, such as in connection with disk storage, the correction range of one complete cycle of the color burst, i.e. 0.2 as provided by this embodiment.
8 microseconds is sufficient and the aid of an additional time base error compensator is not required. If a larger time base error exists, a random access memory (RAM) 164 may be installed in parallel with the clock separator 163 as shown in FIG.
It is inserted between the serial word converter 158 and the serial word converter 158.

Memory 164 corrects the time axis of the signal by an incremental amount equal to an integer multiple of the period of one color burst cycle. This is memory 1 determined by write address generator 166.
This is done by writing a 24-bit word to an address within 64. Memory 164 has its enable input (WE
) to write a 24-bit word, generator 166 is clocked by the X1 reference clock on line 121. The contents of memory 164 are read in accordance with address signals provided by read address generator 167. The read address signal provided by generator 167 is determined by the relative times of the occurrence of the horizontal sync of the information signal and the occurrence of the reference horizontal sync. The relative times of these occurrences are determined by a counter acting as a horizontal sync comparator 168. Counter 168 begins counting in response to a reference horizontal sync and is stopped by the occurrence of a horizontal sync signal. Counter 168 counts the frequency of the color burst. The output of counter 168 is applied to the set (S) input of read address generator 167 and changes the read address of the output of address generator 167 according to the count of counter 168 following the occurrence of horizontal synchronization of the signal. Successive 24-bit words are written to successive addresses of memory 164.

The capacity of the memo 1 river 64 can be adjusted as desired. For corrections of at least one horizontal scan line period, or approximately 63.5 microseconds, memory 164 is configured to have a capacity of 256 words. Each word is one color burst
It represents the period of the cycle, or about 0.28 microseconds. Therefore, a capacity of 256 words provides over 63.5 microseconds of storage. The way the read address generator 167 is set relative to the write address generator 166 is that when the horizontal synchronization signal and the reference horizontal synchronization signal are in the same phase, the same address signal generated by these two generators will correspond to the capacity of this memory. They are spaced apart by a time corresponding to approximately one-half, and the generation of the write address is made to occur before the generation of the read address. For a correction capacity of one horizontal scanning line period, this separation time is about 32 microseconds.

The above-described structure and operation of the invention is applied to a device for correcting an information signal having a recurrent time-synchronized component in the form of bursts of alternating amplitude fluctuations, such as color bursts 7. The present invention can also compensate for time base errors in information signals that have no or have a time base component in the form of other than alternating amplitude time base signals. For example, a black and white television signal may be corrected in accordance with the principles of the present invention by introducing a pilot signal consisting of an artificial burst or bursts of alternating amplitude variations during the blanking period of the black and white television signal. Specifically, such a burst signal can be added to the back porch of each blanking interval accompanying a horizontal scan line of a black and white television signal, in which case the horizontal sync pulse acts as a time base component, and this time The inserted pilot signal is selected to have a predetermined phase relationship with respect to the axial component. Referring to FIG. 5, a modification of the apparatus of FIG. 1 is shown for compensating a black and white television signal by introducing an artificial burst signal consisting of bursts of time-domain information of alternating amplitude. There is.

The bursting is performed by a ringing oscillator type burst generator 171 having an input controlled by the uncorrected black and white horizontal sync provided by the sync separator 134. An output line 173 of a generator 171 is provided for generating bursts of alternating amplitude time-base information for incorporation into a black and white television signal at a summing connection 174 by means of an output line from gate 176.
Connection 174 is provided by a conventional signal summing circuit.
With this arrangement, the black and white television signal is injected with this generated artificial burst signal before the incoming signal is applied to the encoded AID converter 111. Such an arrangement is only operable if there is no color burst in the incoming signal. For this purpose, a connection is made between the output of burst detector 137 and gate 176 to disable the gate whenever a color burst is detected in the incoming signal. In the apparatus of FIG. 5, the burst signal is artificially generated and inserted. This device used for vision signals is colorate,
It functions in substantially the same manner as associated with the apparatus of FIG. 1 used for revision signals.

The artificial burst generator 171 generates a burst signal having the same frequency and phase relationship as the color burst.
is designed so that the standard reference color subcarrier is
It can be used as a reference time axis signal in the black and white television circuit shown in the figure. This is accomplished in accordance with the present invention by generator 171, which receives the horizontal sync signal from sync separator 134, which detects the horizontal sync pulse of each black and white television scan line as it appears in the incoming television signal; The leading edge of the horizontal sync pulse is used to trigger a phase-controlled ringing circuit that is designed to give an oscillation frequency equal to the frequency of the standard color burst (which is nominally equal to the frequency of the reference color subcarrier). It is achieved by doing so. The phase of the output burst signal generated by this ringing generator 171 is determined by the synchronous separator 13.
The output of a ÷2 flip-flop 179 has an input responsive to the leading edge of the horizontal sync pulse generated by 4. Flip-flop 179 has a pair of outputs 18
1 and 182 to generate signals having a phase relationship of 180 pairs. The purpose of the ÷2 flip-flop 179 is that the phase-controlled ringing oscillator 111 generates a
Color burst and N'VS by causing a phase change of 00
The phase controlled ringing oscillator 171 is driven so as to match the standard phase alternating signal that exists between the synchronization timing in the C standardized color television signal. Thus, flip-flop 179 changes state in response to each horizontal sync'' pulse.

In response to the first horizontal synchronization received from isolation device 134, output 181 switches from a low state to a high state, while output 182 simultaneously switches from a high state to a low state. The next horizontal sync pulse produces the opposite signal level condition. Phase controlled ringing oscillator 171
is output 1 indicating a change from a low level state to a high level state
It is designed to respond only to the output states of 81 and 182. When each artifact burst following a horizontal sync pulse appears at output 173, the 2 microsecond pulse output generated by switched control pulse generator 136 is output to gate 176.
Activate it by leaving it in the set state.

Also, the black and white television selector switch 183 is set to provide pulses from the pulse generator 136 to control the recirculable storage device 123 instead of the burst detector 137.

[Brief explanation of the drawing]

1 is a block diagram of a digital time base compensator associated with the present invention applied to a color television signal; FIG. 2 is a detailed block diagram illustrating the configuration of a recirculating digital storage device of the compensator of FIG. 1; FIG. , 3rd A
and 3B are timing diagrams showing signal time axis compensation operation when removing time axis errors from color television signals;
4 shows in block form a circuit that enables the time base compensator of FIG. 1 to correct errors larger than one cycle of the color synchronized burst of the signal; FIG. 4 shows, in block form, the circuitry that enables the embodiments of the time base compensators of FIGS. 1 and 4 to operate when the current signal is present. In the figure, 110 is a time axis compensation device, 111 is an analog/digital converter, 113 is a digital/analog converter, 1
16 is an output processing device, 123 is a recirculating digital storage device, 126 is a switching device, 128 is an X3 reference clock source, 129 is a storage circuit, 131 is an X? No. clock circuit, 1
32 is a bandpass filter, 133 is a digital/analog converter, 134 is a synchronous separator, 136 is a pulse generator, 1
37 is a burst detector, 139 is a random access memory 18, 141 is an address generator, 143 is a write clock generator, 145 is a counter, 148 is a reference signal processing device, 149 is an X1 reference clock generator, 151 is a bypass switch , 156 is a time buffer, 157 is 1 word serial/
3 word parallel converter, 158 is 3 word parallel/1 word serial converter, 159 is X1 signal clock, 163 is clock separation device, 164 is random access memory, 16
6 is a write address generator, 167 is a read address generator, 168 is a counter, 171 is a burst generator, 1
76 is a gate, and 179 is a flip-flop.

Claims (1)

[Claims] 1 An information signal containing periodic burst signal components is
In the apparatus for correcting the time axis of the information signal by writing it into the buffer storage device 156 via the conversion means 111 based on the induced clock signal, reading it based on the reference clock signal and performing DA conversion; the AD conversion means 111 for sampling and digitizing the burst signal using the reference clock signal during the burst signal period; and a digital storage device 12 capable of recirculating the burst signal output from the means 111 using the reference signal.
3,139, and following this storing operation, the stored burst signal is read out cyclically by the reference signal until the start of the next burst period to obtain a continuous time axis signal. means 133, 132 for DA converting the time axis signal to obtain the induced clock signal;
An apparatus for correcting the time axis of an information signal, comprising means for sampling and digitizing the information signal in the AD conversion means 111 using the induced clock signal.