JPS6047588A - Time-division type optical exchange - Google Patents

Time-division type optical exchange

Info

Publication number
JPS6047588A
JPS6047588A JP58154762A JP15476283A JPS6047588A JP S6047588 A JPS6047588 A JP S6047588A JP 58154762 A JP58154762 A JP 58154762A JP 15476283 A JP15476283 A JP 15476283A JP S6047588 A JPS6047588 A JP S6047588A
Authority
JP
Japan
Prior art keywords
optical
channels
delay
circuit
highway
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58154762A
Other languages
Japanese (ja)
Inventor
Naoya Watabe
渡部 直也
Kenichi Yukimatsu
健一 行松
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP58154762A priority Critical patent/JPS6047588A/en
Publication of JPS6047588A publication Critical patent/JPS6047588A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q11/00Selecting arrangements for multiplex systems
    • H04Q11/04Selecting arrangements for multiplex systems for time-division multiplexing
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q11/00Selecting arrangements for multiplex systems
    • H04Q11/0001Selecting arrangements for multiplex systems using optical switching

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
  • Optical Communication System (AREA)

Abstract

PURPOSE:To suppress the number of channels to a rate of linear proportion and increase channels in number easily by coupling (n-1) sets of optical delay elements which delay channel time intervals and optical switches alternately in series, and using the delay circuit to interchange light signals between optional channels. CONSTITUTION:The optical delay elements 62-1-62(n-1) which have a specific delay time and delay time-division multiplex light signals of plural channels inputted from an incidence highway 1 and 2X1 optical switches 63-63(n-2) are coupled alternately in series to constitute a serial optical delay circuit 6. Light signals of optional channels from the highway 1 are distributed by an optical distributing circuit 3 to optional switches 63-63(n-2) of the delay circuit 6. The operation timing of optical switches 63-63(n-2) of the delay circuit 6 and the circuit 3 is controlled by a control circuit 7. Then, light signals are interchanged between optional channels on the highway 1, and the number of channels for ain increase in the number of channels in a frame is suppressed to a rate of linear proportion.

Description

【発明の詳細な説明】 (技術分野) 本発明は時分割多重したチャネル内の光信号を光レベル
のまま交換する光交換機に関するものである。
DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to an optical switch that exchanges optical signals in time-division multiplexed channels with their optical levels intact.

(背景技術) 従来、フレーム内に時分割多重したnチャネルの光信号
を任意のチャネル間で交換する時分割形光交換機は、第
1図に示すように、光信号を任意のチャネル間で交換す
るために、チャネル時間間隔をTとして、OT 、 I
 T、−一−−,(n−1)Tの各遅延を与えるn種類
の光遅延素子5−1〜5−(n−1)と、入党ハイウェ
イ1の各チャネルの光信号に所定の遅延時間を与えるた
めに光信号を該光遅延素子5−1〜5−(n−1)のい
づれかに分配する光分配回路3と、該光遅延素子により
遅延した光信号を再び出光ハイウェイ上に多重化する光
多重回路4により構成されていた。ここでnはフレーム
内の多重化チャネル数、Tはチャネル時間間隔である。
(Background Art) Conventionally, a time-division optical switch exchanges n-channel optical signals time-division multiplexed within a frame between arbitrary channels, as shown in Fig. 1. In order to, let the channel time interval be T, OT, I
n types of optical delay elements 5-1 to 5-(n-1) giving respective delays of T, -1--, (n-1)T, and a predetermined delay to the optical signal of each channel of the joining highway 1. an optical distribution circuit 3 that distributes the optical signal to any one of the optical delay elements 5-1 to 5-(n-1) in order to provide time; and an optical distribution circuit 3 that distributes the optical signal to any one of the optical delay elements 5-1 to 5-(n-1), and multiplexes the optical signal delayed by the optical delay element again onto the Idemitsu highway. It was composed of an optical multiplexing circuit 4. Here, n is the number of multiplexed channels within a frame, and T is the channel time interval.

このため、光遅延素子5−1〜5−(n−1)に必要と
なる遅延時間の総和はOT+ l T+ −−−+(n
−1) Tすなわちn(n−1) T/2となり、7L
/−ム当りのチャネル数nが増すとほぼチャネル数nの
二乗に比例する。従って、例えば光遅延素子として遅延
時間に比例して規模が増大する光フアイバ遅延線などを
用いる場合には時分割形光交換機の光遅延素子の全体規
模がチャネル数の二乗に比例して増大する欠点があった
Therefore, the total delay time required for the optical delay elements 5-1 to 5-(n-1) is OT+ l T+ ---+(n
-1) T or n(n-1) T/2, 7L
/- When the number n of channels per unit increases, it is approximately proportional to the square of the number n of channels. Therefore, for example, when using an optical fiber delay line whose scale increases in proportion to the delay time as an optical delay element, the overall scale of the optical delay element in a time division type optical switch increases in proportion to the square of the number of channels. There were drawbacks.

(発明の課題) 本発明はチャネル時間間隔Tの遅延を与える(n−1)
個の光遅延素子および光スィッチを交互番と直列に結合
した直列形光遅延回路を用いて任意のチャネル間の光信
号を交換することを特徴とし、その目的はフレーム内の
チャネル数nの増加に伴う光遅延回路規模の増加を、従
来技術の場合のチャネル数nの二乗に対して、チャネル
数nに線形的に比例する割合に抑え込むことにある。
(Problem to be solved by the invention) The present invention provides a delay of channel time interval T (n-1)
It is characterized by exchanging optical signals between arbitrary channels using a serial type optical delay circuit in which optical delay elements and optical switches are coupled in series in alternating order, and its purpose is to increase the number of channels n in a frame. The purpose of this invention is to suppress the increase in the scale of the optical delay circuit caused by this to a ratio linearly proportional to the number of channels n, compared to the square of the number of channels n in the case of the prior art.

(発明の構成および作用) 第2図は本発明の実施例であって、フレーム当りCH,
〜CHttのnチャネルから成る入光ハイウェイ、2は
出光ハイウェイ、3はlXnの光スィッチからなる光分
配回路、31−O〜31−(n−1)は光分配回路3の
出力、同じ(31−nは光分配回路3の入力、6は直列
形光遅延回路、61−0〜61−(n−1)は直列形光
遅延回路6の入力、61〜nは直列形光遅延回路6の出
力、62−1〜B2−(n−1)はチャネル時間間隔T
の遅延を与える光遅延素子、63−0〜B3− (n−
2)は2×1の光スィッチ、7は光分配回路3および直
列形光遅延回路6内における光スイッチ63−O〜fi
3−(n−2)の動作制御を行う制御回路である。なお
、図において、二重線は光の通路を表わし、また実線は
制御信号線を表わす。
(Structure and operation of the invention) FIG. 2 shows an embodiment of the invention, in which CH per frame,
〜CHtt is an input highway consisting of n channels, 2 is an output highway, 3 is an optical distribution circuit consisting of lXn optical switches, 31-O~31-(n-1) is the output of the optical distribution circuit 3, the same (31 -n is the input of the optical distribution circuit 3, 6 is the serial optical delay circuit, 61-0 to 61-(n-1) is the input of the serial optical delay circuit 6, and 61 to n are the inputs of the serial optical delay circuit 6. Output, 62-1 to B2-(n-1) is the channel time interval T
Optical delay elements 63-0 to B3- (n-
2) is a 2×1 optical switch; 7 is an optical switch 63-O to fi in the optical distribution circuit 3 and the serial optical delay circuit 6;
This is a control circuit that controls the operation of 3-(n-2). In the figure, double lines represent light paths, and solid lines represent control signal lines.

以下、本発明の詳細な説明する。The present invention will be explained in detail below.

直列形光遅延回路6は入力8l−i(ただしO≦1≦n
−1〕から入力した光信号を1個の光遅延素子62−1
〜62−1を経由させて、最終的にiT時間の遅延を与
えて出力81−nに出力する機能を持つ。この時、入力
61−1からの光信号を直列形遅延回路6に取込むため
に制御回路7は制御信号線を介して光スイッチ83−1
を制御して光信号を光遅延素子62−1に転送する。各
光スィッチ63−1(ただしO<i<n−2)は通常状
態では上位の光遅延素子82−(i +1 )からの光
信号を取込むように制御回路7により制御される。
The serial optical delay circuit 6 has an input 8l-i (O≦1≦n
-1] to one optical delay element 62-1.
~ 62-1, and has a function of finally giving an iT time delay and outputting it to the output 81-n. At this time, in order to input the optical signal from the input 61-1 into the serial delay circuit 6, the control circuit 7 connects the optical switch 83-1 to the optical switch 83-1 via the control signal line.
is controlled to transfer the optical signal to the optical delay element 62-1. In a normal state, each optical switch 63-1 (O<i<n-2) is controlled by the control circuit 7 so as to receive an optical signal from the upper optical delay element 82-(i+1).

光分配回路3は、入光ハイウェイ1により時分割的に送
られてくる各チャネルの光信号を直列形光遅延回路6の
所定の入力6トL(但し、 0<1< n−1)に転送
するために、該光信号を出力3l−1(但し、0≦1<
n−1)に交換する機能を持つ。
The optical distribution circuit 3 sends the optical signals of each channel sent in a time-divisional manner via the light input highway 1 to predetermined inputs 6L (however, 0<1<n-1) of the serial optical delay circuit 6. In order to transfer, the optical signal is output 3l-1 (however, 0≦1<
n-1).

入光ハイウェイlより到着したチャネルの光信号をiT
(但し、O≦l≦n−1)だけ遅延させる場合には光分
配回路3の出力31−iが選択されるように制御回路7
は制御を行う。
The optical signal of the channel arriving from the optical highway I is
(However, when delaying by O≦l≦n-1), the control circuit 7 selects the output 31-i of the optical distribution circuit 3.
controls.

次に、第3図を用いて本発明の詳細な説明する。Next, the present invention will be explained in detail using FIG. 3.

入光ハイウェイlは図のようにチャネルCH。The light input highway 1 is channel CH as shown in the figure.

〜CHnのnチャネルによりフレームが構成されており
、各々の光信号をD1〜Dnとする。ここで、チャネル
C)(IをチャネルCHnに、チャネルCHnをチャネ
ルCH,に時間変換し、その他のチャネルCH2〜CH
n−1については時間変換を行わない場合を考える。従
って、入光ハイウェイ上の各チャネルの光信号DI−D
nに要求される遅延時間はチャネルCH,の光信号り、
については(n−1)T、チャネルCHnの光信号Dn
についてはIT、そして残りのチャネルCH2〜CHn
−+の光信号D2〜D n−1についてはOTとなる。
A frame is composed of n channels of ~CHn, and each optical signal is designated as D1~Dn. Here, time-convert channel C) (I to channel CHn, channel CHn to channel CH, and other channels CH2 to CH
Consider the case where no time conversion is performed for n-1. Therefore, the optical signal DI-D of each channel on the light input highway
The delay time required for n is the optical signal of channel CH,
For (n-1)T, optical signal Dn of channel CHn
IT for, and the remaining channels CH2~CHn
-+ optical signals D2 to Dn-1 are OT.

チャネルCH1の時点においては光信号D1に(n−1
) Tの遅延を与えるために光分配回路3の出力31−
(n−1)が選択され、直列形光遅延回路6の入力81
−(n−1)を経由して光信号D1は光遅延回路82−
(n−1)に転送される。その後光信号り、は直列に結
合した光遅延素子82−(n−2)から62−1までを
経由して最終的に出光ハイウェイ2上のチャネルCH,
に交換される。
At the time of channel CH1, optical signal D1 has (n-1
) The output 31- of the optical distribution circuit 3 to provide a delay of T
(n-1) is selected, and the input 81 of the serial optical delay circuit 6
-(n-1), the optical signal D1 is transmitted to the optical delay circuit 82-
(n-1). Thereafter, the optical signal passes through the serially coupled optical delay elements 82-(n-2) to 62-1 and finally reaches the channel CH on Idemitsu Highway 2.
will be exchanged.

同様に、チャネルCHnの時点においては光信号Dnに
ITの遅延を与えるために光分配回路3の出力31−1
が選択され、直列形光遅延回路6の入力61−1を経由
して光信号Dnは光遅延素子62−1に転送される。そ
の後、チャネルCH1の時点で出光ハイウェイ2上に出
力される。
Similarly, at the time of channel CHn, the output 31-1 of the optical distribution circuit 3 is used to give an IT delay to the optical signal Dn.
is selected, and the optical signal Dn is transferred to the optical delay element 62-1 via the input 61-1 of the serial optical delay circuit 6. Thereafter, it is output onto Idemitsu Highway 2 at the time of channel CH1.

残りのチャネルCH2−CH旧のそれぞれの時点におい
てはそれぞれの光信号D2〜DrhlにOTの遅延、す
なわち遅延なし、を与えるために、光分配回路3の出力
31−0が選択され、各光信号D2〜Dn−2は直列形
光遅延回路6の入力61−0に転送され、直ちに光スイ
ッチ63−0を経由して出光ハイウェイ2上の同じチャ
ネルに転送される。
At each point in time of the remaining channels CH2-CH old, the output 31-0 of the optical distribution circuit 3 is selected in order to give the respective optical signals D2 to Drhl an OT delay, that is, no delay. D2 to Dn-2 are transferred to the input 61-0 of the serial optical delay circuit 6, and immediately transferred to the same channel on the Idemitsu Highway 2 via the optical switch 63-0.

(発明の効果) 以−に説明したように本発明は光遅延素子および光スィ
ッチを交互に(n−1)個づつ直列に結合した直列形光
遅延回路を用いてフレーム当りnチャネルから成る光ハ
イウェイ上の任意のチャネルの光信号を任意のチャネル
に時分割交換することができ、フレーム当りのチャネル
数nが増しても光遅延回路の全体規模をnに比例する割
合に抑え込むことができる効果があり、光遅延回路とし
て光フアイバ遅延線のように占有体積の大きな光遅延回
路を用いる場合に、時分割形光交換機における光遅延回
路の回路規模を従来に比べ小さく抑え込むことができる
利点がある。
(Effects of the Invention) As explained above, the present invention uses a series optical delay circuit in which (n-1) optical delay elements and optical switches are alternately connected in series to generate an optical signal consisting of n channels per frame. The optical signal of any channel on the highway can be time-divisionally exchanged to any channel, and even if the number of channels per frame n increases, the overall scale of the optical delay circuit can be suppressed to a proportion proportional to n. This has the advantage that when using an optical delay circuit that occupies a large volume, such as an optical fiber delay line, the circuit scale of the optical delay circuit in a time-sharing optical switch can be kept smaller than before. .

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の時分割形光交換機の構成例を示す図、第
2図は本発明の一実施例の構成図、第3図は第2図の実
施例における時分割形光交換機の一例を示す図である。 1・・・入光ハイウェイ、2・・・出光ハイウェイ、3
・・・光分配回路、 31−O〜31−(n−1)・・・光分配回路出力、3
1−n・・・光分配回路入力、4・・・光多重化回路、
5−0〜5−(n−1)・・・従来の光遅延素子、6・
・・直列形光遅延回路、 61−0〜81−(n−1)・・・直列形光遅延回路入
力、61−n・・・直列形光遅延回路出力、62−1〜
62−(n−1)・・・光遅延素子、63−(n−2)
=・Z X l光スィッチ、7・・・制御回路 特許出願人 日本電信電話公社 特許出願代理人 弁理士 山本恵−
FIG. 1 is a diagram showing an example of the configuration of a conventional time-sharing optical switch, FIG. 2 is a configuration diagram of an embodiment of the present invention, and FIG. 3 is an example of the time-sharing optical switch in the embodiment of FIG. FIG. 1...Imitsu Highway, 2...Idemitsu Highway, 3
... Optical distribution circuit, 31-O to 31-(n-1) ... Optical distribution circuit output, 3
1-n... optical distribution circuit input, 4... optical multiplexing circuit,
5-0 to 5-(n-1)... Conventional optical delay element, 6.
...Series type optical delay circuit, 61-0~81-(n-1)...Serial type optical delay circuit input, 61-n...Serial type optical delay circuit output, 62-1~
62-(n-1)... Optical delay element, 63-(n-2)
=・Z

Claims (1)

【特許請求の範囲】[Claims] 入光ハイウェイから入力する時分割多重された複数のチ
ャネルの光信号に任意の遅延を与えるため一定の遅延時
間を持つ光遅延素子と光スィッチとを交互に直列に結合
した直列形光遅延回路と、該直列形光遅延回路の任意の
光スィッチへ入光ハイウエイ−ヒの任意のチャネルの光
信号を分配する光分配回路と、該直列形光遅延回路の光
スィッチおび該光分配回路の動作タイミングを制御する
制御回路とからなり、光ハイウェイ上の任意のチャネル
間で光信号を交換できることを特徴とする時分割形光交
換機。
A series type optical delay circuit in which optical delay elements and optical switches having a fixed delay time are alternately coupled in series to give an arbitrary delay to optical signals of multiple time-division multiplexed channels input from an input highway. , an optical distribution circuit that distributes optical signals of arbitrary channels of the optical highway to arbitrary optical switches of the serial optical delay circuit, and operation timings of the optical switches of the serial optical delay circuit and the optical distribution circuit. and a control circuit for controlling the optical highway, and is characterized by being capable of exchanging optical signals between any channels on the optical highway.
JP58154762A 1983-08-26 1983-08-26 Time-division type optical exchange Pending JPS6047588A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58154762A JPS6047588A (en) 1983-08-26 1983-08-26 Time-division type optical exchange

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58154762A JPS6047588A (en) 1983-08-26 1983-08-26 Time-division type optical exchange

Publications (1)

Publication Number Publication Date
JPS6047588A true JPS6047588A (en) 1985-03-14

Family

ID=15591336

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58154762A Pending JPS6047588A (en) 1983-08-26 1983-08-26 Time-division type optical exchange

Country Status (1)

Country Link
JP (1) JPS6047588A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5365358A (en) * 1992-09-16 1994-11-15 Siemens Aktiengesellschaft Optical switching equipment for the through-connection of optical message cells
US5402256A (en) * 1994-03-31 1995-03-28 At&T Corp. Optical time slot interchanger apparatus and method of operation
US5485298A (en) * 1993-07-07 1996-01-16 At&T Corp. Optical packet synchronization circuit
US5535032A (en) * 1992-04-15 1996-07-09 Alcatel N.V. Optical parallel-serial converter and optical serial-parallel converter

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5535032A (en) * 1992-04-15 1996-07-09 Alcatel N.V. Optical parallel-serial converter and optical serial-parallel converter
US5365358A (en) * 1992-09-16 1994-11-15 Siemens Aktiengesellschaft Optical switching equipment for the through-connection of optical message cells
US5485298A (en) * 1993-07-07 1996-01-16 At&T Corp. Optical packet synchronization circuit
US5402256A (en) * 1994-03-31 1995-03-28 At&T Corp. Optical time slot interchanger apparatus and method of operation

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