JPS6044869B2 - Driving method of thin film EL display device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a driving device for displaying television images using a double-insulated thin film EL display device.

According to the present invention, a video signal is generated corresponding to each horizontal scanning electrode during one horizontal scanning period of a television signal, and a thin film EL element is precharged, and when a horizontal synchronizing signal is received, the thin film EL element is precharged and charged first. The amount is controlled by the memorized signal in a constant current discharge circuit constituted by a constant current element, and a writing voltage is applied to the thin film EL element before the next horizontal scanning period, and the above-mentioned voltage is applied after the horizontal scanning period. The pre-charging process is repeated to display television images.

Next, before explaining the drive device of the present invention, we will explain the double insulation type thin film E.
The L display device will be explained. As shown in FIG. 1, In2O is deposited on a glass substrate 1.

A band-shaped transparent electrode 2 made of Y is provided in parallel, and on top of this is provided a strip-shaped transparent electrode 2 made of Y. ,O,Si. N. , TiO. ,N. O. EL layer 4 made of ZnS doped with an activator such as Mn, Y, O as above. , Si3N4, TiO
2, A12O. 500 to 10,000 dielectric materials 5 are sequentially deposited using a thin film technique such as vapor deposition or sputtering.
A three-layer structure is obtained by stacking the layers to a thickness of Λ, and a strip-shaped back electrode 6 made of N is provided in parallel thereon in a direction orthogonal to the transparent electrode 2. In the double-insulated thin film EL display device having this configuration, one of the first electrode groups 2 and the second electrode group 6
When a suitable alternating current voltage is applied to one of the electrodes, the EL layer 4 in a small area sandwiched between the two electrodes emits light.
・This minute area corresponds to one picture element when displaying characters, symbols, and patterns. Therefore, characters, symbols, etc. are displayed by selectively scanning these picture elements one by one, or by driving all the selected picture elements at the same time. This thin-film EL display device emits high-intensity light, has a long lifespan, and is stable, compared to the conventional dispersion type EL display device.
It has superior characteristics compared to L elements. An object of the present invention is to provide a driving method for displaying television images using the above double-insulated matrix thin film EL display device.

Hereinafter, the present invention will be explained in detail according to examples.

FIG. 2 shows a circuit diagram of the driving device, FIG. 3 shows a time chart, and FIG. 5 shows a voltage waveform applied to a certain electrode in comparison with a video signal.

In FIG. 2, the thin film EL display device 10 is shown, and in this figure, the electrodes x1 to Xm in the x direction are data side electrodes,
The Y direction electrodes Y1 to Yn are used as scanning side electrodes, and only the electrodes are shown. Reference numeral 11 denotes a drive circuit that applies a preliminary charging voltage V to the common line A using a preliminary charging signal PRE.

12 shows a diode array on the data side, each diode has its anode connected to the common line A, and its cathode connected to each electrode
1 to Xm, and serves to isolate the data side drive line and protect the reverse bias of a switching element consisting of a high breakdown voltage transistor, which will be described later.

Reference numeral 13 denotes a modulation circuit, and the logic circuit elements and output circuit elements constituting this circuit are all constituted by an integrated IC.

This circuit receives a television radio wave and uses a shift data signal DS generated from a signal synchronized with a horizontal synchronizing signal obtained through an ordinary demodulation circuit and a shift clock signal SC to operate a digital shift register 13-.
1, the shift pulses DSl to DSm which are the outputs of the digital shift register 13-1, and the sampling aperture signal AP which determines the sampling time; AND circuits ADl to ADm;
~ Receive television radio waves according to the output of ADm,
Analog gates AGl to AGm that gate the video signal (analog signal) obtained through a normal demodulation circuit, a capacitor group Ch that stores the video signal V that has passed through the analog gates AGl to AGm as an amount of charge, and horizontal synchronization. Analog gates SGl to SGm whose gates are opened by a strobe signal SB synchronized with the signal, and a clear signal CL
Accordingly, during preliminary charging, constant current elements SlDl~SDm
(7) 0 enters 0N state to ensure 0FF state
N-OFF type switching elements CGl to CGm, and a data side power supply circuit that changes a constant current value of charges precharged in advance in a thin film EL display state according to the magnitude of a video signal to form a constant current discharge circuit; ~ Constant current drive element (N channel DSAMOS transistor) SDl connected to Xm
~SDm.

Reference numeral 14 denotes a scanning side switching element circuit, and this circuit includes a digital shift register 14-1 that performs a shifting operation using a shift data signal SD generated from a signal synchronized with a horizontal synchronization signal and a shift clock signal SS, and a digital shift register 14-1. AND circuits AWl to AWn that take the AND of the output and write signal WP, and the AND circuit AWl
- OR circuits 0w1 to 0wm that take the logical sum of the output of AWn and the set signal SET, and switching connected to scan side electrodes Y1 to Yn, which are made up of N-channel DSAMOS transistors operated by the outputs of the OR circuits 0w1 to 0wm. It is element.

Each element of this circuit is also integrated into an IC. Reference numeral 16 denotes a diode array whose cathode is connected to the odd-numbered scanning side drive line and whose anode is common to separate the scanning line side drive line and protect the switching element from reverse bias.

17 has a cathode connected to an even-numbered scanning side drive line,
A diode array common to the anode separates the scanning side drive lines and protects the switching elements from reverse bias.

A drive circuit 18 applies a voltage Vth to odd-numbered scanning drive lines in accordance with the write signal WO.

A drive circuit 19 applies a voltage Vth to even-numbered scanning drive lines in accordance with the write signal WE.

The voltages supplied to the write drive circuits 18 and 19 need only be lower than the light emission threshold voltage of the thin film EL element, and it is necessary to increase the voltage of the drive circuit 11 by the amount of voltage lower than this light emission threshold voltage. In one embodiment of the invention, the voltage Vp is 7
0V1 voltage Th was set to 140. 20 is a diode array with a common cathode connected to the data side electrode, forming a refresh pulse application circuit.

Reference numeral 15 denotes a refresh drive circuit that simultaneously applies a refresh pulse voltage r to the common lines B and C of the diode arrays 16 and 17 in accordance with the signal REF.

A circuit 21 forms a zinc circuit according to the signal SI in the case of refresh drive.

Next, the operation of this circuit will be explained using the time chart shown in FIG. 3 for the case where the j-th scanning line is driven.

[Video signal sampling]

First, a shift data pulse DS is sent to the digital shift register 13- in synchronization with the start of the video signal period of the scanning electrode η.
1, which are sequentially transferred by the shift clock signal SC to produce shift data pulses DS1-DSm.

These pulses DSl to DSm are the sampling aperture signal that determines the sampling time and the AND circuits ADl to AD.
A logical AND is performed on m and sequentially added to analog gates AGl to AGm. A video signal is applied to the common line of analog gates AGl to AGm, and the above-mentioned AND circuit. A
Since it is applied to the output gates of Dl to ADm, the video signal passes through the analog gates AGl to AGm only during the period of the sampling aperture signal, and the video signal amplitude (voltage) during that period is applied to the output side of the analog gates AGl to AGm. The hold capacitor Ch connected to is charged. In this way, the video signal amplitude is held in each capacitor Ch corresponding to each data side electrode x1 to Xm. [Pre-charging] A pre-charging signal PRE is generated slightly before the end of the video signal period, that is, during sampling of the video signal, to put the drive circuit 11 into an operating state.

At this time, all scanning side switching elements S of the circuit 14
A set signal SET is supplied to the gates of Sl to SSn via OR circuits 0w1 to 0wn to bring them all into the ON state. At this time, all drive transistors SD1 to SDm of the data side switching element circuit 13 are in the OFF state. In the 0FF state, the transistors SDl to SDm<7) clear gates CGl to CGm by the clear gate pulse CL.
This can be reliably maintained by setting all of them to 0N state. The clear gate pulse CL has a long pulse period so as to completely cover the pulse periods of the precharge signal PRE and set signal SET. Then, since the drive circuit 11 applies the voltage Vp to the common line A, all the data lines x
1 to Xm, all picture elements of the thin film EL display device are charged with voltage Vp. Here, the voltage Vp is the light emission voltage V of the thin film EL element.
There is a relationship of Vp=Vw-Vth between w and threshold voltage 1EVth. [Discharge modulation] After the sampling of the video signal has been transferred up to the mth digital shift register 13-1 and the preliminary charging has been completed before the blanking period, at the same time as the blanking period starts, Strobe pulse signal S
B is input to all analog gates SGl to SGm, and the application of clear pulse CL is stopped to calculate the instantaneous amplitude (voltage) of the video signal stored in each hold capacitor Ch.
are transferred all at once to the gates of the current drive elements SDl to SDm.

At the same time as the preliminary charging ends, the application of the set pulse signal SET is stopped, and all of the transistors Ssl to Ssn of the scanning side switching circuit 14 are set to 0FF. When the video signals stored in the capacitors are input to the constant current drive elements SDl to SDm, the precharged charges are discharged at a constant current to perform discharge modulation.

When Id is the discharge current flowing to the output of the transistor SDi, C is the total capacitance of each line seen from the modulation side drive lines x1 to Xm, that is, Ce is the capacitance of one pixel of the matrix panel. The elementary capacitances are the same, and when the total number of picture elements is n, C=NCe.

Since the transistors SDl to SDm are constant current drive elements, the discharge voltage per unit time is
However, τ is the discharge time.

Now, for example, as an element of the modulation-side drive circuit 13, an N-channel MOS transistor whose input gate voltage Vg and drain current 1d have a proportional relationship as shown in the following equation is used.

However, the value is the mutual conductance between the gate and drain of the transistor, and is taken as a proportionality constant in this equation.

When the input gate voltage of the constant current drive element SDl that drives the drive line X1 connected to the modulation side drive circuit 13 is Vg (1), and its mutual conductance is (1), the voltage Vg (1) is the period During γ, the voltage (1) of the drive line Xi after being applied to the gate of the transistor SDi is equal to (2) above.
), from equation (3). However, ID is the drain current, which is the same as the discharge current 1D.

becomes.

Assuming that the mutual conductance curves of the elements SDl to SDm constituting the circuit 13 are elements with sufficiently small variations, that is, Gm(1)'-Grn(Khalf 1)=Gm loop.Considering the constant K, it holds true. Therefore, the equation (4) becomes the following equation (5).

According to this equation (5), the parameters that determine voltage (1) are:
It can be seen that there are two values: the input gate voltage g(1) of the drive element SDi and the input gate voltage application time γ.

Therefore, there are two methods for amplitude modulating a thin film EL element to display halftones: a method of adding a signal having an amplitude corresponding to a video signal for a certain period of time to the input of a constant current type driving element, and a method of adding a signal having an amplitude corresponding to a video signal for a certain period of time to the input of a constant current type driving element. There is a method of adding a constant voltage signal with a pulse width corresponding to the video signal to the input of the video signal.

The former is called an amplitude modulation drive method using an amplitude modulation input signal, and the latter is called an amplitude modulation drive method using a pulse width modulation input signal. The amplitude modulation driving method using an amplitude modulation input signal can be implemented by applying a signal whose voltage changes according to the video signal to the gate of the transistor SDi.

In addition, the amplitude modulation drive method using a pulse width modulation input signal is
This method can be implemented by adding a signal whose pulse width changes depending on the video signal to the input of the transistor SDi.

This embodiment of the present invention uses an amplitude modulation driving method to precharge write picture elements with a voltage corresponding to the magnitude of a video signal.

[Write drive]

During the next video signal period, each picture element E(
1, j), E (2, j),..., E (1, j)...
...In order to write E(M,j), all transistors Ssl to Ssn of the scanning side switching circuit 14 and all transistors SDl to SDm of the data side switching circuit 13
Set to 0FF state.

In this state, ~Xm is held at the voltage V(1), i=1, 2, . . . , m according to the input of the modulation side elements SDl to SDm in the second stage. has been done.

However, only the drive element that drives the scan electrode Yj selected here, that is, the transistor SSj, is turned on by the output from the digital shift register 14-1, and all the other scan side drive elements, that is, the transistors SSK and half, are turned on. is 0F
Keep it in F state.

At this time, if the scan electrode Yj is an odd-numbered scan electrode, the light emission threshold is set by the write drive circuit 19 to which the write signal WP is inputted to the common line C of the diode array circuit 17 connected to the even-numbered scan electrode. The voltage is raised to Vth. At this time, drive elements SDl to SDm and Ssl to Ssn connected to drive lines x1 to Xm and Y1 to Yn
are all in the 0FF state, all scanning side drive lines have thin film EL devices with capacitive elements, and the modulation side drive lines x1 to X
The scanning side drive lines Y1 to Yn are capacitively coupled and are pulled up to the voltage Th. Due to this writing drive, all the scan side electrodes YK and half except the selected scan electrode Yj are raised to the light emission threshold voltage Th, so that the modulation side electrode x
The voltage w(1) from 1 to Xm, i=1, 2, . . . m is as follows.

Since the transistor of the selected scan electrode j is in the 0N state, the voltage of formula (6) is applied to the picture element E(1,.j) on the selected scan electrode Yj, and the write voltage Vw(1) Light emission corresponding to is performed.

On the other hand, the picture element E (I
The voltage applied to NK half j) is V(1).

In order to cause the selected picture element on the selected scanning electrode YJ to emit light and to prevent the unselected picture element on the non-selected scanning electrode YK half from emitting light, the common line drive circuit 11 is set so that the above voltages have the following relationship. , 18, and 19 are set in advance.

In this example, Vp-. It was set to AVth.
As described above, the picture element on the selected scan electrode Yj can be written and driven.

In this write drive, when writing picture elements on even-numbered scanning lines Yj+i, the light-emitting threshold voltage is At the same time, the drive element S of the scanning side drive circuit
Only SJ+1 is turned on during the write pulse WP.

The pulse width of the write pulse WP is about the first half of the video signal period, and the write voltage is applied for a sufficiently long period so that the write drive is not affected by variations in the line resistance of the drive line. The clear pulse CL is supplied to the clear gates CGl to CGm during this period as well, maintaining the ON state and ensuring the 0FF state of the constant current drive elements SDl to SDm.

The clear gates CGl to CGm become 0FF when the strobe signal is input during the blanking period.
This is only when the constant current elements SDl to SDm perform constant current modulation discharge drive. The reason why the clear pulse CL is input during other periods except the blanking period is because the thin film EL element is a relatively high voltage element (therefore, there is an adverse effect due to feedback to the input side, i.e., the hold capacitor Ch during sampling).
In order to prevent drive noise from being superimposed on the instantaneous amplitude of the video signal stored in the drive element and to avoid unstable operation of the drive element, clear gates CGl to CGm connect the gate input of the constant current drive element to a low impedance. This is to keep it grounded. In this way, the writing drive of the video signal on the scan drive line Yj is performed during the period when the video signal on the next scan drive line YJ+1 is being sampled.

During this write drive, the modulation side drive circuit 13 performs the operation of [sampling the video signal] of the video signal of the next scanning drive line YJ+1. After the write drive is completed, the [preliminary charging] drive is performed before the next blanking period. In this way, the present invention provides scanning side drive line Yj
During the th sampling period, the scanning side drive line Y,
- It performs write drive for the first video signal and pre-charging drive for the scanning side drive line Yj, and performs modulation discharge driving for the scanning side drive line Yj during the blanking period of the scanning side drive line Yj. be. Therefore, the method of the present invention is basically a three-mode drive: preliminary charging, discharge modulation, and write drive. FIG. 4 shows the timing relationship of each mode of pre-charge, discharge modulation, and write drive with respect to the video signal. Figure 5 shows the video signal and the modulation side drive lines X, -1, Xi
．． ．． X1+1 and scanning side drive line Yj-2, Y, -1, Y
The drive waveform at j is shown.

By repeating the above driving, the scanning side drive lines 1, 2, 3, -, n
Write driving is performed sequentially, and after the scanning of the - field is completed, refresh driving is performed during the blanking period of the vertical synchronizing signal.

Refresh drive is performed by a drive circuit 15, diode array circuits 16, 17, 20 and a drive circuit 21. At this time, all transistors S of the scanning side switching circuit 14
sl to Ssn are turned off, and all transistors SDl to SDm of the data side switching circuit 13 are turned off. circuit 1
Drive pulses REF (5SI) are simultaneously supplied to inputs 5 and 21, and a refresh pulse is applied to the entire surface of the EL panel.The voltage Vr of the refresh pulse is equal to the maximum brightness writing voltage applied to each of the above scanning electrodes. , are applied so that they are of opposite polarity to the thin film EL display device.Thus, the thin film EL display device is driven alternately by the write voltage and the refresh pulse.When the refresh pulse is applied, the write voltage is applied to the thin film EL display device. Since the written picture element is polarized, the electric field due to this polarization and the refresh pulse are superimposed to cause only the written picture element to emit light.The amount of polarization of the written picture element is proportional to the magnitude of the luminance, so When a refresh pulse is applied, light is emitted according to the amount of polarization, that is, a half-tone display is performed.The refresh pulse also eliminates polarization bias, so that when a write voltage is applied in the next field, the writing picture element After the refresh drive, the set input signal SET of the circuit 14 is supplied to turn on the transistors Ssl to Ssn, and the charge of the refresh voltage Vr charged on the entire surface of the panel is discharged, and the refresh drive is completed. do.

The vertical synchronization signal and the signal RE during this refresh drive
FIG. 6 shows the timing of F, SI and the signal SET.

The above writing drive and refresh drive of each scanning side electrode is repeated to display a television image. As described above, according to the present invention, television display is performed by a thin film EL display device using a television video signal.

[Brief explanation of drawings]

FIG. 1 is a partially cutaway perspective view of a thin film EL display device, FIG. 2 is a circuit diagram of the device of the present invention, FIG. 3 is a time chart of the circuit in FIG. FIG. 5 is a timing diagram of the drive mode, FIG. 5 is a voltage waveform diagram of each drive line, and FIG. 6 is a time chart of refresh drive. 10: thin film EL display device, 11: drive circuit, 13: modulation circuit, 14: scanning side switching circuit, 15: refresh drive circuit, 18, 19: write drive circuit.

Claims (1)

[Claims] 1. A thin film EL display device in which a laminate having capacitive characteristics consisting of a thin film EL light emitting layer and a dielectric layer is sandwiched between a matrix electrode structure consisting of a data electrode group and a scanning electrode group arranged in directions that intersect with each other. A charge holding means is provided for storing an amount of charge corresponding to a video signal in each data electrode, and after applying a preliminary charging voltage between both electrodes, the charge is transferred to a constant current element connected to each data electrode. By discharging and modulating the preliminary charging voltage by applying the amount of charge of the holding means, a modulated charging voltage corresponding to the video signal is formed between the two electrodes, and the modulated charging voltage and the light emission applied between the two electrodes are generated. Due to the superimposed voltage of the drive voltage, E corresponding to the video signal is
A method for driving a thin film EL display device, characterized in that display corresponding to the video signal is performed by causing L light emission and repeating the above operation for each scanning electrode in sequence.