JPS6042988A - Solid-state image pickup device - Google Patents

Solid-state image pickup device

Info

Publication number
JPS6042988A
JPS6042988A JP58151896A JP15189683A JPS6042988A JP S6042988 A JPS6042988 A JP S6042988A JP 58151896 A JP58151896 A JP 58151896A JP 15189683 A JP15189683 A JP 15189683A JP S6042988 A JPS6042988 A JP S6042988A
Authority
JP
Japan
Prior art keywords
region
solid
diffusion layer
stored
junction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58151896A
Other languages
Japanese (ja)
Inventor
Sotohisa Asai
浅井 外壽
Natsuo Tsubouchi
坪内 夏朗
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP58151896A priority Critical patent/JPS6042988A/en
Publication of JPS6042988A publication Critical patent/JPS6042988A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14643Photodiode arrays; MOS imagers

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)

Abstract

PURPOSE:To increase the level of a saturating signal while keeping high sensitivity and to attain high circuit integration at the same time by adding the capacitance of MIS structure newly in parallel with junction capacitance by the conventional P-N junction so as to increase the amount of a stored charge. CONSTITUTION:An insulating film 10 is formed on an N region 3 and an electrode 9 made of polysilicon is provided thereupon. When light is irradiated, a photocurrent is generated in a phototransistor (TR), and its signal charge is stored in the N region 3 being the collector of the photo TR and the source of an MOS TR. A capacitor by the MIS structure is formed newly by the insulation film 10 formed by covering at least a part of the N region 3, the electrode 9 and the N region 3, the saturated signal charge amount is increased and it is not necessary to increase the size of picture elements. For example, the insulating film 10 is made of silicon dioxide having the thickness of 500Angstrom , the electric charges to be stored in a P-N junction or over are stored and large capacitance is obtained by using a silicon nitride film.

Description

【発明の詳細な説明】 [発明の技術分野] この発明は固体撮像装置に関し、特に、飽和信号レベル
の増大および画素の高集積化を図った固体@像装置に関
するものである。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a solid-state imaging device, and particularly to a solid-state @imaging device that increases the saturation signal level and increases the integration of pixels.

[従来技術] 第1図は従来のMOS形の固体!l1li装置の一例の
等価回路を示1図である。
[Prior art] Figure 1 shows a conventional MOS solid state! FIG. 1 is a diagram showing an equivalent circuit of an example of the l1li device.

まず、第1図に示1等価回路の栴成と動作について説明
する。第1図において光電変換素子としてのフォトダイ
オード11に光が入射すると、光電流が発生し、フォト
ダイオード11の合釘12に蓄えられる。そして、信号
読出し詩には、スイッチング素子としてのMOSトラン
ジスタ13がオンし、光電流を選択的に続出ず。
First, the construction and operation of the equivalent circuit shown in FIG. 1 will be explained. In FIG. 1, when light enters a photodiode 11 as a photoelectric conversion element, a photocurrent is generated and stored in a dowel 12 of the photodiode 11. When the signal is read out, the MOS transistor 13 as a switching element is turned on, and the photocurrent is selectively output.

第2図は、第1図の等価回路で示した従来のMO8形固
体瓶像装置の模式的断面図である。
FIG. 2 is a schematic cross-sectional view of the conventional MO8 type solid bottle image device shown in the equivalent circuit of FIG.

次に、第2図に示す従来の固体撮像装置の構成について
説明する。第2図において、N型基板1上にフォトダイ
オードのアノードであるP型ウェル2が形成され、さら
にその上にフォトダイオードのカソードであると同時に
MOSトランジスタのソースでもあるN型領域3および
MOS l−ランジスタのビレ。インであるN型領域4
が形成される。
Next, the configuration of the conventional solid-state imaging device shown in FIG. 2 will be explained. In FIG. 2, a P-type well 2, which is an anode of a photodiode, is formed on an N-type substrate 1, and an N-type region 3, which is a cathode of a photodiode and also a source of a MOS transistor, and a MOS l are formed thereon. -Rangista fin. N-type region 4 which is in
is formed.

N型領域3およσ4の間の領域上にはゲート5が設けら
れ、まlC隣接する画素との分離のため、酸化II!i
!6が形成される。さらに、N型領域3下の一部分に高
1度P型領域7が形成される。
A gate 5 is provided on the region between the N-type region 3 and σ4, and is oxidized II! for isolation from adjacent pixels. i
! 6 is formed. Furthermore, a high 1 degree P type region 7 is formed in a portion below the N type region 3.

次に、第2図に示す従来の固体搬像装置の動作について
説明する。P型ウェル2〈アノード)とN型領域3(カ
ソード)とから構成されるフォトタイオード2に光が入
射すると、光電流が発生し、PN接合領域に蓄積される
。そして、信号読出し時には、N型領域3(ソース)、
ゲート5 a3よびN型領域4(ドレイン)からなるM
OSトランジスタがオンし、ソースからドレインへ光信
号量に相当する電流が流れ、ドレイン4から信号が取出
される。
Next, the operation of the conventional solid-state imager shown in FIG. 2 will be explained. When light enters the photodiode 2, which is composed of a P-type well 2 (anode) and an N-type region 3 (cathode), a photocurrent is generated and accumulated in the PN junction region. At the time of signal reading, N type region 3 (source),
M consisting of gate 5 a3 and N type region 4 (drain)
The OS transistor is turned on, a current corresponding to the amount of optical signal flows from the source to the drain, and a signal is extracted from the drain 4.

ところで上述のように構成された従来の固体撮像装置に
d3いて、光に対する高い感度をもつためには、広い面
積のフ第1・ダーイオードあるいは低い濃度のID型ウ
ェル2が必要である。しかし一方、信号の飽和信号レベ
ル(ダイナミックレンジ)を増大するためにはフ第1・
ダイオードの面積を広くするか、またはP型ウェル2の
濃度を増大することが必要である。以上の要求に応える
ため、通常はフォトダイオードのN型領域3下のP型ウ
ェル2の一部に、高濃度P型領域7を設置ノ、P壁領域
濃度の最適化を行なって、光に対する高い感度とダイナ
ミックレンジの増大とを同時に図2っている。
By the way, in order to have high sensitivity to light in the conventional solid-state imaging device d3 constructed as described above, a wide-area first diode or a low-concentration ID type well 2 is required. However, on the other hand, in order to increase the saturation signal level (dynamic range) of the signal,
It is necessary to increase the area of the diode or increase the concentration of the P-type well 2. In order to meet the above requirements, a high-concentration P-type region 7 is usually installed in a part of the P-type well 2 under the N-type region 3 of the photodiode, and the concentration of the P-wall region is optimized. Figure 2 shows high sensitivity and increased dynamic range at the same time.

しかしながら、解像度の向上のため、個々の画素、すな
わちフ第1〜ダイΔ−ドの面積を小さくした場合、上述
のように、高感度とダイナミックレンジの増大とを同時
に実現することは困難になる。
However, if the area of each pixel, that is, the area of the first to die Δ-des, is reduced in order to improve the resolution, it becomes difficult to simultaneously achieve high sensitivity and an increase in the dynamic range as described above. .

上述の欠点を解消するために、フォトダイオードに代え
てフォトトランジスタを用いる方法が考えられる。
In order to eliminate the above-mentioned drawbacks, a method of using a phototransistor instead of a photodiode can be considered.

第3図は、第2図のフォトダイオードに代えて、フォト
トランジスタを用いた例の模式的断面図であり、第2図
に比較して、MOSトランジスタのソースであり、フォ
トトランジスタのコレクタでもあるN型領域3と分離用
酸化膜6との間に、フォトトランジスタのエミッタとな
るN型領域8が設けられている点で異なっている。この
場合、フォトトランジスタの電流増幅率をhFEとする
と、光電流のhFE倍の信号電流が得られ、小さな面積
でも必要な感度を得ることが可能である。
FIG. 3 is a schematic cross-sectional view of an example in which a phototransistor is used instead of the photodiode in FIG. The difference is that an N-type region 8, which becomes the emitter of the phototransistor, is provided between the N-type region 3 and the isolation oxide film 6. In this case, if the current amplification factor of the phototransistor is hFE, a signal current that is hFE times the photocurrent can be obtained, and it is possible to obtain the necessary sensitivity even with a small area.

しかしながら、MOS t−ランジスタのしきい値およ
びフォトトランジスタの電流増幅率hrsの安定化のた
めには、高濃度P型鋼域7は、コレクタかつソースであ
るN型領域3に対して余裕をもって小さく作る必要があ
る一方、期待される信号飽和レベルすなわち飽和信号電
荷の増大のためには、高濃度P型鋼域はある程度の大き
さを確保した高濃度領域における接合リーク電流の増大
と雑音の影響を取り除かなければならず、したがって画
素の微細化は困難である。
However, in order to stabilize the threshold value of the MOS t-transistor and the current amplification factor hrs of the phototransistor, the high-concentration P-type steel region 7 must be made small enough with respect to the N-type region 3, which is the collector and source. On the other hand, in order to increase the expected signal saturation level, that is, the saturation signal charge, the high concentration P-type steel area must be large enough to eliminate the increase in junction leakage current and the effects of noise in the high concentration area. Therefore, it is difficult to miniaturize pixels.

[発明の概要] それゆえに、この発明の目的は、上述の欠点を解消し、
高感度を維持しながら飽和信号のレベルの増大を図り、
同時に高集積化を可能にした固体撮像装置を提供するこ
とである。
[Summary of the invention] Therefore, the object of the invention is to overcome the above-mentioned drawbacks and to
Increasing the saturation signal level while maintaining high sensitivity,
At the same time, it is an object of the present invention to provide a solid-state imaging device that enables high integration.

この発明は、要約すれば、従来のPN接合による接合容
量に並列に新たにMISlfl造による容量を付加する
ことによって蓄積される電荷量を増大し、それによって
飽和信号レベルを増大し、併せて高集積化が可能なよう
に構成したものである。
In summary, this invention increases the amount of charge stored by adding a new capacitance made by MISlfl in parallel to the junction capacitance made by the conventional PN junction, thereby increasing the saturation signal level and increasing the saturation signal level. The structure is such that it can be integrated.

この発明の上述の目的およびその他の目的と特徴は以下
に図面を参照して行なう詳細な説明から一層明らかとな
ろう。
The above objects and other objects and features of the present invention will become more apparent from the detailed description given below with reference to the drawings.

[発明の実施例コ 第4図はこの発明の一実施例を示す模式的断面図である
。第4図に示す例は、以下の点を除いて前述の第3図に
示した例と同じである。すなわち、N型領域3上に絶縁
膜10が形成され、さらにその上にポリシリコンからな
る電極9が設けられている。
Embodiment of the Invention FIG. 4 is a schematic sectional view showing an embodiment of the invention. The example shown in FIG. 4 is the same as the example shown in FIG. 3 above, except for the following points. That is, an insulating film 10 is formed on the N-type region 3, and an electrode 9 made of polysilicon is further provided thereon.

次に、第4図に示す実施例の動作について説明する。光
が照射されると、フォトトランジスタに光電流が発生し
、その信号電荷はフォトトランジスタのコレクタであり
、MOS t−ランジスタのソースであるN型領域3に
蓄積される。第3図の従来例では、この信号電荷はN型
領hi!3とP型ウェル2との間に形成されるPN接合
容量のみで蓄積されるが、この第4図の実施例では、N
型領域3とN型領域3の少なくとも一部を−覆って形成
された絶縁膜10と電極9とによって新たにMIS構造
による容量が形成され、上述のPN接合容量に並列に接
続された形になるので、飽和信号電荷量。
Next, the operation of the embodiment shown in FIG. 4 will be explained. When irradiated with light, a photocurrent is generated in the phototransistor, and the signal charge is accumulated in the N-type region 3, which is the collector of the phototransistor and the source of the MOS t-transistor. In the conventional example shown in FIG. 3, this signal charge is in the N-type region hi! 3 and the P-type well 2, but in the embodiment shown in FIG.
A new MIS structure capacitor is formed by the insulating film 10 and the electrode 9, which are formed to cover at least part of the type region 3 and the N-type region 3, and is connected in parallel to the above-mentioned PN junction capacitor. Therefore, the saturation signal charge amount.

が増大し、かつ画素の大きさを増大する必要がない。す
なわち、MIS構造の電極9は直流的に一定であれば問
題はなく、たとえば、絶縁l11110が500オング
ストロームの二酸化珪素であれば、PN接合に蓄え得る
以上の電荷を蓄積することができ、また、絶縁m10に
窒化シリコン脇を使用すれば、さらに大きな容量を得る
ことができる。
increases, and there is no need to increase the pixel size. That is, there is no problem as long as the electrode 9 of the MIS structure has a constant direct current. For example, if the insulation l11110 is made of 500 angstrom silicon dioxide, it is possible to store more charge than can be stored in the PN junction, and If a silicon nitride layer is used for the insulation m10, an even larger capacity can be obtained.

なお、実施例では、電極9としてポリシリコンを用いた
MIS構造の例を示したが、電極材料としては、導電性
を有するものであれば、どのような材質であろうと使用
できることは明白である。
In addition, in the example, an example of a MIS structure using polysilicon as the electrode 9 was shown, but it is clear that any material can be used as the electrode material as long as it has conductivity. .

また、この実施例では、フォトトランジスタをNPN型
のトランジスとしたが、PNP型の1〜ランジスタであ
っても同様の効果が得られる。
Further, in this embodiment, the phototransistor is an NPN type transistor, but the same effect can be obtained even if it is a PNP type transistor.

[発明の効果] 以上のように、この発明では、フォトトランジスタのコ
レクタでありかつMOS t−ランジスタのソースであ
る領域上の少なくとも一部を覆って絶縁膜と電極とを形
成し、従来のPN接合容量と並列の関係になるMIS構
造の容量を形成するように構成したので、集積度を犠牲
にせず、飽和信号電荷量すなわち飽和信号レベルを増大
することができる。
[Effects of the Invention] As described above, in the present invention, an insulating film and an electrode are formed covering at least a part of the region that is the collector of the phototransistor and the source of the MOS t-transistor, and Since the capacitor of the MIS structure is formed in a parallel relationship with the junction capacitor, the saturation signal charge amount, that is, the saturation signal level can be increased without sacrificing the degree of integration.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のMO3O3形11t (i装置の一例の
等価回路図である。第2図は従来のMO8形固体撮像装
置の模式的断面図である。第3図は従来のフォトトラン
ジスタを用いたMO8形固体m像装置の模式的断面図で
ある。第4図はこの発明の一実施例を示す模式的断面図
である。 図において、1はN型基板、2はP型ウェル、3.4.
8はN型領域、5はゲート、6は分離用酸化膜、7は高
S度P型領域、9は電極、10は絶縁膜、11はフォト
ダイオード、12はフォトダイオードの容量、13はM
OS l−ランジスタを示す。 代 理 人 大 岩 増 雄 第1 口 第21〉1 第31=T 第417 1ン
Fig. 1 is an equivalent circuit diagram of an example of a conventional MO3O3 type 11t (i device). Fig. 2 is a schematic cross-sectional view of a conventional MO8 type solid-state imaging device. Fig. 3 is a diagram using a conventional phototransistor. FIG. 4 is a schematic cross-sectional view showing an embodiment of the present invention. In the figure, 1 is an N-type substrate, 2 is a P-type well, and 3 .4.
8 is an N-type region, 5 is a gate, 6 is an isolation oxide film, 7 is a high S degree P-type region, 9 is an electrode, 10 is an insulating film, 11 is a photodiode, 12 is a capacitance of the photodiode, 13 is M
OS l-transistor is shown. Agent Masu Oiwa 1st mouth 21〉1 31st=T 417th 1st

Claims (3)

【特許請求の範囲】[Claims] (1) 第1の導電形の半導体基板上に、前記第1の導
電形とは逆導電形の第1の拡散領域が形成され、前記第
1の拡散領域中に、前記第1の導電形の第2の拡wi層
と、第3の拡散層ど、第40)拡散層とが形成され、前
記第2の拡散層はM OSl−ランジスタのドレインで
あり、前記第3の拡散層は〜40 S t−ランジスタ
のソースCあり、前記第4の拡散層は前記第3の拡散層
に隣接し、フォトトランジスタのエミッタである固体R
象装置であって、 前記第3の拡散層上の少なくとも一部分を覆って絶縁膜
どさらにその上に電極配線とを形成することにより、前
記第3の拡散層上にMIS構造を形成し1=ことを特徴
とする、固体撮像装置。
(1) A first diffusion region of a conductivity type opposite to the first conductivity type is formed on a semiconductor substrate of a first conductivity type, and a first diffusion region of a conductivity type opposite to the first conductivity type is formed in the first diffusion region. a second diffusion layer, a third diffusion layer, etc., are formed, the second diffusion layer is the drain of the MOSI transistor, and the third diffusion layer is the drain of the MOS transistor. 40 S t-There is a source C of the transistor, the fourth diffusion layer is adjacent to the third diffusion layer, and a solid R is the emitter of the phototransistor.
an MIS structure is formed on the third diffusion layer by forming an insulating film covering at least a portion of the third diffusion layer and an electrode wiring thereon; A solid-state imaging device characterized by:
(2) 前記絶縁膜は、シリコン窒化膜、またはシリコ
ン窒化膜と二酸化珪素との多層膜である、特許請求の範
囲第1項記載の固体撮像装置。
(2) The solid-state imaging device according to claim 1, wherein the insulating film is a silicon nitride film or a multilayer film of a silicon nitride film and silicon dioxide.
(3) 前記絶縁膜は、タンタル酸化膜で(ちる、特許
請求の範囲第1項記載の固体撮像装置。
(3) In the solid-state imaging device according to claim 1, the insulating film is a tantalum oxide film.
JP58151896A 1983-08-18 1983-08-18 Solid-state image pickup device Pending JPS6042988A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58151896A JPS6042988A (en) 1983-08-18 1983-08-18 Solid-state image pickup device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58151896A JPS6042988A (en) 1983-08-18 1983-08-18 Solid-state image pickup device

Publications (1)

Publication Number Publication Date
JPS6042988A true JPS6042988A (en) 1985-03-07

Family

ID=15528557

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58151896A Pending JPS6042988A (en) 1983-08-18 1983-08-18 Solid-state image pickup device

Country Status (1)

Country Link
JP (1) JPS6042988A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0295365A2 (en) * 1987-05-11 1988-12-21 Messerschmitt-Bölkow-Blohm Gesellschaft mit beschränkter Haftung Semiconductor device with capacitive read out of the charge carriers and having an integrated bias supply

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0295365A2 (en) * 1987-05-11 1988-12-21 Messerschmitt-Bölkow-Blohm Gesellschaft mit beschränkter Haftung Semiconductor device with capacitive read out of the charge carriers and having an integrated bias supply

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