JPS6042960B2 - Analog signal synthesizer - Google Patents

Abstract

PURPOSE:To obtain composite sounds of high quality by naturally combining respective phonemic element by recognizing a pattern of a phonemic-element waveform. CONSTITUTION:Since phonemic pieces of tens to hundreds mm seconds are similar in terms of the waveform at the junction part, connections can be made smooth by slightly correcting the time axis of each phonemic element. This operation is executed by ROM120 from programmed computer CPU121. On the basis of the output of counting circuit 122, CPU121 allows A/D converter 124 to digitize the M-number samples from the backmost part of input clocks and they are read from I/O port 123 and stored in memory circuit 125. Similarly, the (M+r)-number samples are read in from the front end of input clocks and the similarity between the back end of the input phonemic element and the front end of the following phonemic element is calculated by integrating the difference between corresponding sampling values.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an apparatus for synthesizing analog signals such as audio, and its purpose is to improve the quality of synthesized analog signals.

In general, the quality of speech signals (words, phrases, speech) synthesized by combining and editing phonemes, words, syllables, or even shorter speech segments is determined by the processing of connections between phonemes, which are the constituent units of speech. It can be said that it depends on.

For example, sudden changes in waveforms that occur at connections, that is, waveform discontinuities, cause harmonic noise, and the S/N of the synthesized sound
and reduce clarity. It is also known that fluctuations in the pitch frequency, which is the fundamental frequency of vocal cord vibration, deteriorate the naturalness of synthesized speech. Human hearing is extremely sensitive to changes in pitch frequency (the detection limit is said to be 0.1%), and if the pitch frequencies of combined phoneme segments are discontinuous, the synthesized speech will be difficult to hear and unnatural. becomes.
The present invention makes it possible to obtain high-quality synthesized speech by recognizing the pattern of phoneme segment waveforms and combining each speech segment in a natural manner.

As the phoneme segment waveform, there are methods to use one cut out from natural speech, for example, for each pitch section, or to use a phoneme segment waveform synthesized by another speech synthesizer, but the present invention uses a comparative method. We will clarify a method for combining phoneme segments of a short period of time, specifically several tens to hundreds of milliseconds, without discontinuities in waveforms at connections and without fluctuations in pitch frequency. For short-duration phonemes, the waveforms of adjacent phonemes should be similar at least at the joints. Therefore, by slightly modifying the time axis of each phoneme, the connection can be made smooth. It is possible to combine and go.The present invention is concerned with the connecting part of the phoneme pieces to be combined.
The degree of waveform similarity is understood in the form of signal levels, and based on this, appropriate temporal corrections are made to the time axes of phoneme segments. A detailed description of the present invention will be given below using an audio time axis conversion device as a specific embodiment thereof.

FIG. 1 is a block diagram illustrating a conventional time axis expansion device. In the figure, terminal 1 is an audio input terminal, 2 is an output terminal, 3 and 4 are N-bit analog shift registers such as BBD, and 5 is a low-pass filter (LPF).
). 6, 7, 8 and 9 are analog switches, which connect the input terminal 1 to the analog shift register 3 or 4;
Switch control is performed on the audio signal that passes through the LPF 5 and reaches the output terminal 2.

These analog switches also control the Q of a frequency divider circuit 11 that divides the write clock circuit 10 of the analog shift registers 3 and 4 by MN (MN is an integer, and m will be described later).
Opening/closing is controlled by the output and Ω output as shown in the figure. The analog shift registers 3 and 4 are alternately write clock controlled by the AND gates 12 and 13 of the Q and O outputs of the clock circuit 10 and the frequency divider circuit 11 via the 0R gates 14 and 15, and are also controlled by the read clock circuit 16 and the divider circuit. The reading clock is alternately controlled by the Q of the circuit 11 and the AND gates 17 and 18 of mutual outputs via the 0R gates 14 and 15 as well. That is, for example, an audio signal in which the time axis applied to the input terminal is compressed by m times (m>1) (such a compressed signal can be obtained by, for example, increasing the playback speed of a tape recorder to m times the recording speed). is written to the analog shift register 4 via the analog switch 8 when the Q output of the frequency dividing circuit 11 is 1. The number of bits of the shift register is N, and when MN sampling strings have been sequentially input as input audio signals, the Q output of the frequency dividing circuit 11 is inverted and becomes 0, and the switch 8 is closed. . At the same time, the O output of the frequency dividing circuit becomes 1, the switch 6 is opened, and data is written to the analog shift register 3 in the same way. At this time, as is clear from the configuration in the figure, the analog shift register 4 is clocked by the read clock circuit 16 and read out via the switch 9 which is also controlled by the analog output. During the writing period to the analog shift register 3, another analog shift register 4 performs reading in this manner, and then the frequency dividing circuit 11
When the Q and O outputs of the analog shift register 4 are inverted, the analog shift register 4 writes and the analog shift register 3 reads again. Here, when the clock frequency of the write clock circuit 10 is f1 and the clock frequency of the read clock circuit 16 is F2, if each clock frequency is determined as follows, the time axis is expanded by m times, and the audio input terminal 1 The compressed audio input to the output terminal 2 is outputted with the time axis restored.

The readout clock frequency F2 is naturally determined so as to satisfy Nyquist's Sannopling theorem for the required output audio frequency band. In the conventional device as described above, the connection timing of the phoneme pieces that are alternately outputted from the analog shift registers 3 and 4 is determined every MN/f1 second by the output of the frequency dividing circuit 11 that divides the write clock 10 by MN. - Since it is determined automatically, discontinuous waveform changes and pitch frequency fluctuations occur at the connecting portions of phoneme pieces, as shown in FIG. 4. As mentioned above, such discontinuities in waveform and pitch at the junctions of phoneme segments significantly reduce sound quality and clarity. Next, the content of the present invention that can improve the drawbacks of the conventional device will be explained with reference to the block diagram of FIG. 2.

In the same figure, 103 and 104 are analog switches 1
Analog shift registers whose opening and closing are controlled by 06, 107, 108 and 109, 110 and 116 are clock circuits with frequencies f1 and F2, respectively, and 111 is ml
This is a frequency dividing circuit, and the configuration thereof is the same as that of the conventional device shown in FIG. The present invention adds temporal correction to the connected parts of connected phoneme pieces as described above.
This is performed by a computer (arithmetic processing unit) (CPU) 121 programmed with Ml2O. A counting circuit (counter) 122 counts the leading and trailing ends of phoneme pieces in each period and instructs the CPU 12l to timing via the I/0 port 123, and the A/D converter 124 receives a conversion command signal from the clock circuit 110. Accordingly, a circuit for digitally converting an input signal and a storage circuit 125 cascaded to the CPU 12l have the function of storing these A/D converted signals and at the same time temporarily storing the arithmetic processing results of the CPU 12l. . That is, first, CPU12
Based on the output of the counting circuit 122, M samples from the last part of the input clock are digitized by the A/D converter 124, read from the I/0 port 123, and stored in the storage circuit 125. Next, when the output of the frequency dividing circuit 111 is inverted, the CPU 12l similarly reads (M+r) samples from the front end of the input clock based on the output of the counting circuit 122. CPU12l continues to be ROM1
Based on the 2O program, the similarity between the end of the input phoneme and the phoneme following the key is calculated, and it is best to calculate the squared error of each sampling sequence. The sampling sequence at the end of the phoneme is Xp (P=1
, 2, 3, . . . , M), and when the front end sampling sequence of the subsequent phoneme segment is Y9 (p = 1, 2, 3, . . . , M + r), the squared error between the two waveforms is Ru!゛I expresses the degree of similarity when Yp is superimposed with respect to the sampling waveform X, shifted by k points.
However, the calculation process based on equation (2) actually requires a huge number of calculation steps, and requires a high-performance computer to perform calculations in a short time (at least several tens of milliseconds).

Originally, equation (2) was used to examine the correlation between two waveforms with different amplitudes and levels, and therefore the standard deviations σX, σ
7, the waveform is normalized, and the error is calculated by calculating the sum of squares of the difference between the average levels X and Y. By the way, in the case of the speech synthesis apparatus of the present invention, the phoneme pieces handled have waveforms that are close in time, and therefore, it can be considered that they are originally similar in amplitude and level. In this case, the difference between the two waveforms may be calculated using equation (2) instead.

Moreover, in the case of the present invention, it is only necessary to know the timing at which the similarity between the two waveforms is maximum, and therefore, equation (3) can be further replaced with the following equation (4). That is, it is the integral of the absolute value of the difference between each corresponding sampling value,
The connection timing is determined by knowing k at which this becomes the minimum.

That is, the arithmetic processing unit 121 calculates E for k=0, 1, . . . r, and determines k for which this is the smallest. That is, as shown in FIG. 3, the least error is achieved when the M sample strings at the rear end of the preceding phoneme are superimposed from a portion shifted by k from the beginning of the succeeding phoneme. Therefore, the arithmetic processing unit 121 starts from the beginning of the subsequent phoneme ((
k0M+N) and AND through the I/0 boat.
The gate 112 or 113 is controlled to stop the write clock. Since the capacity of the analog shift register 103 or 104 is N, N bits are stored in the analog memory from the (k+M+1)th as shown in the figure, and are sequentially read out at the next read timing. As is clear from the explanation, the last M samples of the preceding phoneme and the M samples from the k+1st of the following phoneme
Since the sample has the least error and weight, the phoneme pieces continue to be output in a completely natural form. As mentioned above, (k+M+N) samples of the subsequent phoneme are taken into the analog memory, and M samples from the end are similarly sent to the A/D converter 124 and the I/D converter 124.
/0 port 123 to CPUl2l's storage device 125
Saved in This is j(M
+r) samples to check the similarity and connect them. A time chart of the above processing is illustrated in FIG. 3C. The important thing here is analog shift register 1
03 or 104 is N bits, so even if more bits (M+k+N) of samples are read, only the last N bits are stored. Although the time length of a phoneme segment is at least several tens of milliseconds, the calculation of the time shown in equation (4) can be processed with an extremely small number of steps, and a low-speed so-called microcomputer can be used.

In addition, FIG. 4 shows the reproduced audio waveform of the time axis expansion device according to the conventional method shown in FIG. 1, and FIG. The data actually processed is shown.

Both of these data are m=2, f1=40KHz. ．． f2=
20kHz. ．． This was measured under the condition that N=768. In the above description, an audio time axis expansion device has been described as a specific example, but instead of using an analog shift register as described above, a RAM may be used as a storage means, and in that case, an analog audio waveform can be stored. Needless to say, a conventional technique is used in which the signal is converted into a digital signal using an A/D converter and then input to the RAM, and the RAM output is converted into an analog signal using a D/A converter.

As described above, it goes without saying that the technique of the present invention can be used in a synthesis device for analog signals such as various voices and sounds. As described above, the device of the present invention calculates the integral value of the absolute value of the difference between the sampling value at the rear end of the preceding analog signal element and the sampling value of the succeeding analog signal element at the connection portion of the preceding analog signal element and the succeeding analog signal element. The time axes are corrected so that they are superimposed so that they are minimized.

More specifically, the present invention compares the similarity of the waveforms near the rear end of the preceding analog signal segment and near the leading end of the subsequent analog signal segment stored in the storage means, and The purpose is to output the clock of the subsequent analog signal segments so that the analog signal segments are connected as smoothly as possible. That is, the data near the rear end of the preceding analog signal element and the data near the leading end of the succeeding analog signal element are relatively shifted and compared, and the following analog signal element is the most similar to the preceding analog signal element. The data of the subsequent analog signal segment is clocked out from the storage means so that the connection is smooth. Therefore, it is possible to obtain a composite analog signal without discontinuities in analog signal waveforms or fluctuations in pitch frequency at the connection parts as in conventional devices.

[Brief explanation of the drawing]

Figure 1 shows the block diagram of a conventional analog signal synthesizer.
2 is a block diagram showing an analog signal synthesizer of the present invention; FIG. 2 is a block diagram showing a speech synthesizer of the present invention; FIG. 3 is a drawing for explaining the present invention; The figure shows the characteristics of a conventional device, and FIG. 5 shows the characteristics of the device of the present invention. 103, 104...analog signal storage device, 121
...Arithmetic processing unit.

Claims (1)

[Claims] 1. An analog signal synthesizer for editing and synthesizing using analog signal segment waveforms extracted from analog signal waveforms,
a storage device that samples and stores an input signal in accordance with clock pulses; Sequentially calculate the level difference between both sampling values based on the sampling value, calculate the sum of the absolute values of the level difference, and sequentially shift the corresponding sampling data to perform the calculation operation of the sum of the absolute values of the level difference. The storage device selects the shift amount of the sampling data that minimizes the calculated value among the calculated values by the calculation operation, and adjusts the time axis of the connected analog signal element based on the selected shift amount. and an arithmetic processing unit programmed to clock-control the analog signal segment editing type analog signal synthesis device.