JPS6042959B2 - Analog signal synthesizer - Google Patents

Abstract

PURPOSE:To obtain composite sounds of high quality by naturally combining respective phonemic element by recognizing a pattern of a phonemic-element waveform. CONSTITUTION:Since phonemic element of tens to hundreds mm seconds are similar in terms of the waveform at the junction part, connections can be made smooth by slightly correcting the time axis of each phonemic element. This operation is executed by ROM120 from programmed computer CPU121. On the basis of the output of counting circuit 122, CPU121 allows A/D converter 124 to digitize the M- number samples from the baskmost part of input clocks and they are read from I/O port 123 and stored in memory circuit 125. Similarly, the (M+r)-number samples are read in from the front end of input clocks and the similarity between the back end of the input phonemic element and the front end of the following phonemic element is calculated by using a square-law error or correlative function, thereby correcting each time axis.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an apparatus for synthesizing analog signals such as audio, and an object of the present invention is to improve the quality of synthesized analog signals.

In general, the quality of a speech signal (word, phrase, speech) synthesized by combining and editing phoneme fragments (words, syllables, or even shorter speech segments) is determined by the processing of the connections between phoneme fragments, which are the constituent units of speech. It can be said that it depends on

For example, sudden changes in waveforms that occur at connections, or discontinuities in waveforms, can cause harmonic noise and reduce the S/N of the synthesized sound.
and reduce clarity. It is also known that fluctuations in pitch and frequency, which are the fundamental frequencies of vocal cord vibration, degrade the naturalness of synthesized speech. Human hearing is extremely sensitive to changes in pitch frequency (the detection limit is said to be 0.1%), and if the pitch frequencies of connected phoneme segments are discontinuous, synthesized speech may be difficult to hear. It becomes natural. The present invention makes it possible to obtain high-quality synthesized speech by recognizing the pattern of phoneme segment waveforms and combining each speech segment in a natural manner.

As the phoneme segment waveform, there are methods to use one cut out from natural speech, for example, for each pitch interval, or to use a phoneme segment waveform synthesized by another speech synthesizer, but the present invention uses a comparative method. The present invention provides a method for combining phoneme segments of a short period of time, specifically several tens to hundreds of milliseconds, without discontinuities in waveforms and fluctuations in pitch frequency at connections. In other words, the waveforms of such short-duration phoneme segments should be similar at least at the joints between adjacent phoneme segments. Therefore, by slightly modifying the time axis of each phoneme segment, the connection parts can be smoothed. It can be combined with . The present invention grasps the degree of waveform similarity in the form of a correlation function for the connecting portions of phoneme segments to be combined, and based on this, makes appropriate temporal corrections to the time axes of the phoneme pieces. A detailed description of the present invention will be given below using an audio time axis conversion device as a specific embodiment thereof.

FIG. 1 is a block diagram illustrating a conventional time axis expansion device. In the figure, terminal 1 is an audio input terminal, 2 is an output terminal, 3 and 4 are N-bit analog shift registers such as BBD, and 5 is a low-pass filter (LP
F). Reference numerals 6, 7, 8, and 9 are analog switches, which switch-control the audio signal from the input terminal 1 to the output terminal 2 via the analog shift register 3 or the LPF 5.

These analog switches also control the Q of a frequency divider circuit 11 that divides the write clock circuit 10 of the analog shift registers 3 and 4 by MN (MN is an integer, and m will be described later).
and O output. Opening/closing is controlled as shown. Analog shift registers 3 and 4 are alternately write clock controlled by AND gates 12 and 13 of the Q and O outputs of clock circuit 10 and frequency divider circuit 11 via 0R gates 14 and 15, and are also controlled by read clock circuits 16 and . "The read clock is controlled alternately by the AND gates 17 and 18 of the Q and O outputs of the frequency dividing circuit 11 via the 0R gates 14 and 15. That is, for example, the time axis given to the input terminal 1 is multiplied by m ( m>1) (such a compressed signal can be obtained, for example, by increasing the playback speed of a tape recorder by m times the recording speed), when the Q output of the frequency dividing circuit 11 is 1, The signal is written into the analog shift register 4 via the analog switch 8.The number of bits in the shift register is N, and when the pair of sampling strings have been sequentially input as input audio signals,
The Q output of the frequency divider circuit 11 is inverted and becomes 0, and the switch 8
Close. At the same time, the O output of the frequency dividing circuit becomes 1, the switch 6 is opened, and data is written to the analog shift register 3 in the same way. At this time, as is clear from the configuration of the figure,
The analog shift register 4 is clocked by a read clock circuit 16 and read out via a switch 9 which is also controlled by the O output. During the writing period to the analog shift register 3, another analog shift register 4 performs reading in this manner, and then the frequency dividing circuit 11
When the Q and output of the analog shift register 4 is inverted, the analog shift register 4 writes again, and the analog shift register 3 performs the reading. Here, when the clock frequency of the write clock circuit 10 is f1 and the clock frequency of the read clock circuit 16 is F2, if each clock frequency is determined as follows, the time axis is expanded by m times, and the audio input terminal 1 The compressed audio input to the output terminal 2 is outputted with the time axis restored. The read clock frequency F2 is naturally determined so as to satisfy Nyquist's sampling theorem for the required output audio frequency band. In the conventional device as described above, the connection timing of the phoneme pieces that are alternately output from the analog shift registers 3 and 4 is determined by the frequency dividing circuit 11 that divides the write clock 10 by MN.
Since it is automatically determined every 1 second by the output of MN/f, discontinuous waveform changes and pitch frequency fluctuations occur at the connecting portions of phoneme units, as shown in FIG.

As mentioned above, such discontinuities in waveform and pitch at the junctions of phoneme segments significantly reduce sound quality and clarity. Next, the content of the present invention that can improve the drawbacks of the conventional device will be explained with reference to the block diagram of FIG. 2. In the figure, 103 and 104 are analog switches 106
, 107, 108 and 109, analog shift registers 110 and 116 are clock circuits with frequencies f1 and F2, respectively, and 111 is an MN frequency divider circuit. These structures are different from the conventional device shown in FIG. It's the same. The present invention adds temporal correction to the connected parts of connected phoneme pieces as described above.
This is performed by a computer (processing unit) (CPU) 121 programmed by 2O. A counting circuit (counter) 122 is a circuit that counts the leading and trailing ends of phoneme pieces in each period and gives timing instructions to the CPU 12l via an I/0 board 123, and an A/D converter 124 is a circuit that counts the leading and trailing ends of phoneme pieces in each period, and the A/D converter 124 is a circuit that counts the leading and trailing ends of a phoneme piece in each cycle and instructs the CPU 12l to timing.
A circuit that digitally converts an input signal according to a conversion command signal from 0, and a storage circuit 125 connected in series to the CPU 12l have the function of storing these A/D converted signals and at the same time temporarily storing the arithmetic processing results of the CPU 12l. It also has. That is, first, based on the output of the counting circuit 122, the CPU 12l digitizes M samples from the last part of the input clock using the A/D converter 124, reads them from the I/0 port 123, and stores them in the storage circuit 125. Next, when the output of the frequency dividing circuit 111 is inverted, the CPU 12l similarly reads (M+r) samples from the front end of the input clock based on the output of the counting circuit 122. Subsequently, the CPU 12l calculates the similarity between the rear end of the input phoneme segment and the front end of the phoneme segment that follows based on the program in the ROM 12O. Specifically, it calculates the squared error of each sampling string and calculates this. Determine the minimum connection timing. The sampling sequence at the end of the phoneme is Xp (P=1, 2,...,
M), the front end sampling of the subsequent phoneme is Yp (P=1
, 2, . . , M+r), the square error between the two waveforms is calculated by . This calculates the degree of similarity when Yp is shifted by k points and superimposed on the sampling waveform Xp, and the arithmetic processing unit 121 calculates EH by k
=0, 1, . . . , r, and determine k for which this is the smallest. That is, as shown in Figure 3,
This means that the least error will be achieved if the M sample strings at the end of the preceding phoneme are superimposed from a portion shifted by k from the beginning of the succeeding phoneme. Therefore, the arithmetic processing unit 121 takes in (k+M+N) from the beginning of the subsequent phoneme, and 1/0
AND gate 112 or 11 through boat 123
3 and stops the write clock. Since the capacity of the analog shift register 103 or 104 is N, the analog memory has (k+M
+1) bits are stored and sequentially read out at the next read timing. Since the M samples have the least error and are heavier, the phoneme pieces are continuously output in a natural form. As mentioned above, (k+M+N) samples of the subsequent phoneme are taken into the analog memory, and M samples from the end of these are similarly passed through the A/D converter 124 and the I/0 board 123 and stored in the storage device of the CPU 121. 125. This is necessary in order to check the similarity with (M+r) samples from the beginning of the subsequent phoneme and connect them. A time chart of the above processing is shown in FIG. 3C. The time length of a phoneme is at least several tens of milliseconds, and can be easily processed by an arithmetic processing device such as a so-called microcomputer.

Of course, considering the power and economy of the computer system, the amount of calculation processing should be kept to a minimum. For this purpose, equation (2) is transformed as follows. In order to grasp the similarity of waveforms, it is sufficient to use only the second term on the right side. That is, as is well known, FxY(k) defined by this formula is composed of two numerical series Xp. It is called the cross-correlation function between the two waves, and is the power between the two waves when one wave is shifted by k sample values, and the value when the two waves completely match. becomes l.

By employing equation (4), the calculation processing time is greatly shortened. Figure 4 shows the reproduced waveform of the time axis expansion device using the conventional method (Figure 1), and Figure 5 shows the same reproduced waveform by the method of the present invention (Figure 2) using a single 200 (Hz) sine wave. This is data that was actually processed about the signal. Both of these data are m=
2, f1=40KHz. sf2=20KHz. ．． N=7
It was measured under the condition of 68. In the above,
Although the audio time axis expansion device has been described as a specific example, a RAM may be used instead of using the analog shift register as described above as a storage means, and in that case, the analog audio waveform is transferred to an A/D converter. It goes without saying that the conventional technique of converting the signal into a digital signal before inputting it to the RAM and converting the RAM output into an analog signal using a D/A converter is used.

As described above, it goes without saying that the technique of the present invention can be used in a synthesis device for analog signals such as various voices and sounds. In this way, the device of the present invention focuses on the correlation function or square error near the connection between the preceding and succeeding analog signal segments, and calculates the
The time axes are corrected so that the connected portions of analog signal segments overlap at the portion where the error is least.

More specifically, the present invention compares the similarity of waveforms near the rear end of the preceding analog signal element stored in the storage means and near the front end of the subsequent analog signal element, and The purpose is to output the clock of the subsequent analog signal segments so that the signal segments are connected as smoothly as possible. That is, the data near the rear end of the preceding analog signal element and the data near the leading end of the succeeding analog signal element are relatively shifted and compared, and the following analog signal element is the most similar to the preceding analog signal element. The data of the subsequent analog signal segment is clocked out from the storage means so that the connection is smooth. Therefore, it is possible to obtain a composite analog signal without discontinuities in analog signal waveforms or fluctuations in pitch frequency at the connection parts as in conventional devices.

[Brief explanation of the drawing]

Figure 1 shows the block diagram of a conventional analog signal synthesizer.
2 is a block diagram showing an analog signal synthesizer of the present invention; FIG. 2 is a block diagram showing a speech synthesizer of the present invention; FIG. 3 is a drawing for explaining the present invention; The figure shows the characteristics of a conventional device, and FIG. 5 shows the characteristics of the device of the present invention. 103, 104...analog signal storage device, 121
...Arithmetic processing unit.

Claims (1)

[Claims] 1. An analog signal synthesis device for editing and synthesizing using analog signal segment waveforms extracted from analog signal waveforms,
(a) an input clock supply means; (b) an output clock supply means; (c) an input signal that samples and stores an input signal according to an input clock supplied from the input clock supply means; (d) storage means for outputting in accordance with the supplied output clock; a calculation means for calculating the similarity of the input signal waveform with the time axis as a variable for the sampling value;
) The output clock supplying means controls the output clock of the storage means according to the calculation result of the calculation means so that the similarity of the subsequent analog signal segment to be outputted subsequently to the preceding analog signal segment is temporally continuous. 1. A clock control signal generating means for controlling and adjusting the time axis of a subsequent analog signal segment. 2. The calculation means and the clock control signal generation means calculate a square error or a cross-correlation function for the sampling value at the relatively rear end of the preceding analog signal segment and the sampling value at the relatively leading end of the succeeding analog signal segment. The analog signal synthesis device according to claim 1, which is an arithmetic processing device programmed to perform calculations and adjust the time axis of the connected analog signal segments by controlling the output clock of the storage means based on the calculation results.