JPS6042382Y2 - Average frequency measuring device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION This invention relates to an average frequency measuring device that measures the frequency of an input signal multiple times and measures the frequency of the input signal based on the average value.

In such an average frequency measuring device, if the gate signal for average frequency measurement and the input signal are in phase, the measurement accuracy will not be improved by averaging.

From this point of view, conventionally a configuration as shown in FIG. 1 has been adopted.

That is, a noise generator 11 is provided, and the output of the noise generator modulates the phase of the clock signal from the clock generator 12 in the modulator 13, and the gate signal generator 14 modulates the phase of the clock signal from the clock signal generator 12 in synchronization with the phase-modulated clock. A signal is generated, the gate circuit 15 is controlled to open and close by the gate circuit signal, the pulse input signal from the terminal 16 is opened for a certain period of time, the gate output is cumulatively counted by the counter 17, and the averaging circuit 1
The average frequency was obtained by dividing the cumulative count value by the number of gate signals.

In this way, in the conventional average frequency measuring device, measurement accuracy is improved by changing the phase of the gate signal to randomly change the measurement phase for the input signal for each gate circuit signal.

In this way, in order to change the phase of the gate signal in this conventional device, for example, when measuring a burst input signal, that is, an intermittent signal in which the carrier wave is 100% modulated by pulses, the phase of the carrier wave within the width of the pulse is measured. Although the frequency will be measured, it is necessary to ensure that the gate circuit signal falls within the pulse width of the input pulse modulation signal even if the phase of the gate signal changes back and forth with respect to the pulse modulation signal.

Therefore, it is necessary to narrow the width of the gate signal accordingly,
In order to achieve the same measurement accuracy, it is necessary to lengthen the measurement time, that is, it is necessary to increase the number of repeated measurements to be averaged.

Furthermore, in the prior art, a modulator 13 was purposely provided to change the phase of the gate signal.

The purpose of this invention is to provide an average frequency measuring device that has a relatively simple configuration and can perform highly accurate measurements in a short time.

According to this invention, the input signal is frequency-converted by a local signal, and the frequency-converted signal is supplied to a counter through a gate circuit to measure the frequency, but the local signal is stabilized by a phase-locked loop, so-called PLL. A random signal is superimposed on the output of the phase detection circuit of the PLL.

This changes the phase of the local signal frequency randomly.

However, while the gate circuit is open and the frequency-converted input signal is counted, the oscillation phase of the local oscillator is held unchanged.

In this way, it is possible to perform the process with a relatively simple configuration and with high accuracy in a relatively short time.

For example, as shown in FIG. 2, the input signal from the input terminal 16 is frequency-converted by a frequency converter 21.

The local signal to the frequency converter 21 is a local oscillator 2 stabilized by a phase-locked loop, so-called PLL.
2 outputs are used.

That is, a voltage controlled oscillator (so-called VCO) is used as the local oscillator 22, and the output of the oscillator 22 is divided by a frequency of 17M by a frequency divider 23 as necessary. The phase is compared with the reference signal, and the phase comparison output is passed through an adder 26, which will be explained later.
Furthermore, it is given as a control signal to the VCO 22 through the phase compensation circuit 27.

In this way, the oscillation accuracy of the VCO 22 is determined by the accuracy of the reference signal generator 25, and the presence of the divider 23 provides a stabilized local signal output whose frequency is multiplied by M.

The VCO 22, frequency divider 23, phase detector 24, adder 26, and phase compensator 27 constitute a phase locked loop, so-called PLL 28.

The output of the frequency converter 21 is, for example, an input signal converted into an intermediate frequency signal by a local oscillation signal, and the signal is amplified by an amplifier 29 as necessary and sent to a gate circuit 15.
supplied to

Also, in this example, the input signal is a pulse modulated wave as shown in Figure 3A, and the gate signal is generated in synchronization with the pulse modulated wave within the period in which that signal exists. be.

Therefore, the output of the intermediate frequency amplifier 29 is also supplied to the wave detector 31, thereby obtaining an envelope detection output as shown in FIG. 3B.

In synchronization with the rise of the detected output, a gate signal of a constant width is generated from the gate signal generation circuit 14 as shown in FIG. 3C.

This gate signal is applied to the gate circuit 15 to control opening and closing of the gate circuit 15.

In order to make the gate width of this gate signal accurate, the gate signal generator 14 is determined by the accuracy of the reference signal generator 25.

The output of the gate circuit 15 is cumulatively counted by a counter 17,
The cumulative addition value is divided by the number of measurements, that is, the number of gate signals, in the average calculation circuit 18, and the division result is displayed on the display 32 as a frequency.

In this invention, a random signal generator 33 is provided, and the output of the random signal generator is superimposed on the output of the phase detector 24 of the PLL 28.

While the gate circuit 15 is open, the value of the random signal superimposed on the output of the phase detector 24 is held constant.

In this embodiment, when the output of the detector 31 falls, the output of the random signal generator 33 is transferred to the sample and hold circuit 34.
The sample is held at .

The sampled and held output is supplied to an adder 26 and superimposed on the output of the phase detector 24.

For example, the random signal generator 33 generates a signal whose amplitude changes randomly as shown in Figure 3, this signal is sampled and held by the fall of the output of the detector 31, and the sample and hold circuit 34 generates a signal whose amplitude changes randomly as shown in Figure 3E. You will get the output shown in .

The output of the sample and hold circuit 34 is constant and does not change from one fall of the output of the detector 31 to the next fall, but its level changes randomly every time the output of the detector 31 falls.

The output of this sample and hold circuit 34 is supplied to an adder 26.

Therefore, the oscillation phase of the oscillator 22 is determined by the sample and hold circuit 3.
Each time the output level from 4 changes, the phase changes randomly and oscillation continues.

Therefore, the phase relationship between the input signal of the input terminal 16 and the output of the oscillator 22 is changed randomly.

Therefore, the gate signal of the gate signal generator 14 and the amplifier 29
The output signal of , that is, the phase relationship between the input signal and the corresponding signal will be in a different state each time the gate signal occurs,
In other words, it will change randomly.

Therefore, when the frequency is measured for each gate signal and the average value is determined in this manner, the accuracy of measuring the average frequency is improved.

According to the embodiment shown in FIG. 2 described above, even if the pulse input signal is a pulse modulation wave, the input modulation signal can be used in a sufficiently wide range, that is, the phase of the gate signal can be randomly changed. Therefore, when measuring such a pulse modulated signal, the gate signal can be made sufficiently wide.

However, in the case shown in Figure 1, since the phase of the gate signal is changed randomly, it is necessary to narrow the width of the gate signal so that it is always within the pulse modulation wave, and this increases the same measurement accuracy. To obtain this, it is necessary to perform measurements many times, which increases the measurement time.

In addition, in the embodiment shown in FIG. 2, there is a PL for changing the phase of the input signal with respect to the gate signal.
Since a random signal is superimposed on the output of the L phase detector, it can be easily constructed without providing anything corresponding to the modulator 13 as shown in FIG.

Furthermore, during measurement, that is, when the gate circuit 15 is open, the phase of the oscillator 22 does not change and remains a fixed phase, so that no measurement error occurs.

In Figure 2, measurements are taken when the input signal frequency is high,
On the other hand, the frequency of the reference signal generator 25 is generally, for example, IMH.
If the input signal is from a micro fan, the frequency divider 23 is inserted into the PLL 28 to obtain a stable local signal output at a high frequency and to accurately determine the input frequency. It was made possible to measure the

However, when the input signal frequency is low, the frequency divider 23
can be omitted.

Also, when obtaining a high frequency oscillator 22, the output of the oscillator 22 is converted to a reference oscillator 25 as shown in FIG.
A harmonic phase detector may be used as the phase detector 24, and the output may be supplied to the adder 24.

Further, as the frequency converter 21, a so-called high frequency mixer may be used.

As the random signal oscillator 33, for example, in addition to a noise source using a Zener diode, a so-called clock pulse is counted by a feedback circuit type counter to generate a pseudo-random pulse, and the output thereof is converted into an analog signal. You can also do that.

In such a case where noise is generated by the clock, the supply of the clock is stopped only during the period between the pulses of the gate signal of the gate signal generator 14, and the counter 17
During the counting period, the random signal added to the adder 26 may be maintained at a constant value.

Further, in the above description, this invention was applied to the case of measuring the carrier wave frequency of a pulse modulated wave, but it is not limited to such a case, but can also be applied to the frequency measurement of a continuous wave.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a conventional average frequency measuring device.
Fig. 2 is a block diagram showing an example of the average frequency measuring device according to this invention, Fig. 3 is a waveform diagram for explaining its operation, and Fig. 4 shows a partially modified example of the frequency measuring device according to this invention. It is a block diagram. 14: Gate signal generator, 16: Input terminal, 17: Counter, 18: Averaging operation circuit, 21: Frequency converter, 2
2: Local oscillator, 24: Phase detector, 25: Reference signal generator, 26: Adder, 28: P ratio, 31: Detector, 33
: Random signal generator, 34: Sample and hold circuit.

Claims (1)

[Scope of utility model registration request] A local oscillator whose frequency is stabilized by a phase-locked loop, a frequency converter that uses the output of the local oscillator as a local signal to convert the frequency of the input signal, and the output of the frequency converter is supplied and opened and closed by a gate signal. a gate circuit; an averaging counter that counts the output of the gate circuit and averages the counted value for a plurality of gate signals; a random signal generator that generates a random signal; Average frequency measurement comprising an adder superimposed on the output of a phase detector in a locked loop, and means for holding the random signal input to the adder unchanged at least while the gate circuit is open. Device.