JPS6041843A - Response transmission control system - Google Patents

Abstract

PURPOSE:To relieve the load of processing of a control section by applying interruption to a control program after receiving plural blocks in receiving a blocked data to allow a line scanning control section to form a response telegraphic message. CONSTITUTION:A received telegraphic message from a line is written in a line control memory 11 under the control of a reception control circuit 22 and a write control circuit 10, read one by one character in a read register 12, the error is checked by an error check circuit 15 and also transferred in a main storage 6' by a transfer control circuit 17. When the read character is the end character of a block, the error check circuit 15 stores the result of error check to a line status area of the control memory 11. When a block position detecting circuit 13 detects that the block is the final block of a prescribed block, the erroneous state of each block is read from the control memory 11 and a response telegraphic message representing an affirmative or erroneous block number is transmitted from a response forming circuit 16.

Description

DETAILED DESCRIPTION OF THE INVENTION (1) Technical Field of the Invention The present invention relates to control related to a response to a transmitting side when receiving block-transmitted data in a communication control processing device.

(2) Prior art and problems FIG. 1 is a diagram illustrating a control method related to reception of block transmission in a communication control processing device. -1n are transmission blocks, 21-2n are interrupts to the control program, 3. ~3n is control program processing, 4I~4n
represents response data.

As shown in Figure 1, in the conventional system, each time one transmission block is received, the control program is interrupted.
Under this control, a response message is sent back.

In this conventional method, each time a block of data is received, the control program must perform processing to send response data, which places a heavy burden on the control unit, making it difficult to improve processing performance. There was a problem that was difficult. The problem is that each time block-transmitted data is received, the contents are examined and response data is returned, so the holding time of the communication line for a certain amount of data transmission is long, and the use of the communication line is not efficient. There was a point.

(3) Purpose of the Invention In view of the above-mentioned drawbacks of the conventional art, the present invention has been designed to reduce the burden on the control unit in sending out response data when receiving block-transmitted data in a communication control processing device, and to reduce the use of communication lines. The aim is to provide a possible method for increasing efficiency.

(4) Structure and object of the invention According to the present invention, as described in the claims, in a communication control processing device, a circuit for detecting a transmission error V and a received message group consisting of a plurality of blocks are provided. It is equipped with a circuit for detecting whether or not it is the final block, and a response message creation circuit, and has a plurality of line status areas in a control area corresponding to the line to maintain the presence or absence of a transmission error for each received block, When receiving information transmitted in multiple blocks, if the block is not the last block, the presence or absence of a transmission error is recorded in the line status area, and when the final block is received, based on the result in the line status area, If all received blocks are normal, the response message creation circuit transmits an affirmative response, and if there is a transmission error in the received block, it transmits a negative response and information identifying the block in which the transmission error occurred. A response transmission control method characterized by a small means is achieved.

(5) Embodiment of the invention FIG. 2 is a diagram illustrating control of an embodiment of the invention.
1 to +In are transmission blocks similar to 11 to 1n in FIG.
2' is an interrupt to the control program, 3' is processing of the control program, 4' is response data, 51 to 5n is a check for errors in transmitted data, 6 is main memory, 7 is a data storage area, 8 is reception Represents the status area.

In Figure 2, the communication control processing equipment is the transmission block +/
While receiving l~+/n, determine whether each transmission block is the first block or the middle block.
It monitors whether it is the final block. (The corresponding information is in the control byte in the transmission block.) On the other hand, it is checked whether there is a transmission error in the received message and the result is recorded in the reception status area 8 of the main memory 6.

The received message (transmission blocks 1'1 to I'n) is then stored in the data storage area 7 of the main memory 6. At this time, 1
Each time a transmission block is received, in addition to the presence or absence of a transmission error in the receiver message, the data storage location (address on main memory) and the number of stored characters are also recorded in the reception status area 8 of the main memory 6. put. Information on whether there is a transmission error in the received message is stored in the Ail main memory 6 communication status area 8 as well as the line status area of the line control memory in the line scanning control unit (in the control area corresponding to each line). ] is also retained.

When the final block is received and processing such as checking transmission errors for the block is completed, the line status area is referred to, and if there is no transmission error, an acknowledgment is sent, and if there is a transmission error, an acknowledgment is sent. sends a negative response and the scan code of the transmission block in which the transmission error occurred to the communication line as response data. Then, an interrupt is generated to the control program.

FIG. 3 is a block diagram showing one embodiment of the present invention,
6', 7', 8' are the same as 6.7.8 in Figure 2,
9 is an address generation circuit, 10 is a write control circuit, 11
is a line control memory, 12 is a read register, 13 is a block position detection circuit, 14 is a line status creation circuit,
15 is a transmission error check circuit, 16 is a response generation circuit, 1
7 is a transfer control circuit, +8 is a reception status control circuit, 1
Reference numeral 9 represents a control circuit, 20 an interrupt control section, 21 a transmission control circuit, and 22 a reception control circuit. Also, ■ is an interrupt signal, S is a transmission signal, and R is a reception signal.

The line control memory 11 is divided into control areas corresponding to each line, and each control area includes a communication status display (SQ), a display for each communication line (LD), and a line status area (STS).
), there is a data buffer (DBF).

In Fig. 5, the reception code from the line is received by the reception control circuit 2.
2, the data is sent to the write control circuit 10 and written into the control area of the line control memory 11. Then, the received message is read out one character at a time into the reading register 12, and a transmission error check circuit 15 checks whether there is a transmission error. In addition, the block position detection circuit 13 determines whether the received sentence is a first block, an intermediate block, or a final block.

Then, the data read into the read register 12 is transferred to the main memory 6' by the transfer control circuit 17. When the read character is the last character of the transmission block, the check result for transmission error V is written in the line status area in the control area of the line control memory 11. On the other hand, main memory 6
The start address (on the main memory 6'), data length, and transmission error check result of the stored received message are written in the reception status area 8' of '.

When the received message is the last block and the last character is read into the read register 12 and transferred to the main memory 6', when the line status is read into the read register 12,
Based on the content, a response message is created by the response creation circuit 16 and sent to the communication line from the transmission control circuit 21.

When there is no transmission error in the response message, a leading response is created, and when there is an error in the transmission block, a negative response and the block number of the transmission block in which the error occurred are created.

After the response message is sent to the communication line, the interrupt control unit 2
From 0, an interrupt is generated to the control program.

(6) Effects of the Invention According to the method of the present invention, when receiving blocked data in the communication control processing device, the control program is not interrupted every time an i transmission block is received;
In addition to receiving multiple blocks and then interrupting the control program, the creation of the response message is also performed by the line scanning control section in the communication control processing device, so the burden on the control section is lower than in the past. The effect is great because it is expected to be significantly reduced and the processing capacity will be improved. In addition, the response message is not sent every time a transmission block is received as in the past, but only needs to be sent once in response to the reception of multiple transmission blocks, which improves the efficiency of using communication lines, which is very effective. be.

[Brief explanation of the drawing]

FIG. 1 is a diagram for explaining a control method related to reception of block transmission in a communication control processing device, FIG. 2 is a diagram for explaining control according to an embodiment of the present invention, and Figure 3 is a diagram for explaining an embodiment of the present invention. FIG. 11~+n, I'l"7+'n"'transmission block,
21-2n, 2'... Interruption to control program, 51-5n, 5'... Processing of control program, 41
~4n14'...Response data, 51-5n...Check for errors in transmission data, 6.6'...Main memory, 7.7'...Data storage area, 8.8'. ...Reception status area, 9...Address creation circuit, 10...
・Write control circuit, 11...Line control memory, 12
...Read register, 13...Block position detection circuit, 14...Line status creation circuit, 15...
Transmission error check circuit, 16...Response creation circuit, 17
...Transfer control circuit, 18...Reception stage control circuit, Blind 9...Control circuit, 2θ...Interrupt control unit,
21... Transmission control circuit, 22... Reception control port

Claims (1)

[Claims] A circuit for detecting transmission errors in a communication control processing device;
and a circuit for detecting whether or not the block is the final block of a group of received messages made up of multiple blocks, and a circuit for creating a response message. It has multiple line status areas to hold information, and when receiving information transmitted in multiple blocks, the presence or absence of a transmission error is recorded in the line status area when the block is other than the final block. At the end of block reception, based on the result of the line status field, the response message creation circuit transmits an affirmative response if all the received blocks are normal, and a negative response and a negative response if there is a transmission error in the received block. A response transmission control method characterized by having means for transmitting information specifying a block in which a transmission error has occurred.