JPS6040732B2 - switching amplifier - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a switching amplifier for switching two input signals to obtain an alternative output signal.

Conventionally, there are two signal sources 1 and 2, and when using one of the signals, a mechanical switch is used, or when switching is performed by an external signal, a relay Ry is used as shown in Figure 1.
The output signal is switched by

Fixed saddle piece 3a of switch 3 for switching outputs of signal sources 1 and 2;
3b, and an output signal is obtained from the movable piece 3c of the changeover switch 3 via the output terminal 4. The changeover switch 3 is a switch activated by the electromagnetic section 5, and by inputting a switching control signal to the input terminal 6, the transistor 7 is turned on, exciting the electromagnetic section 5, and switching the output signal. In Figure 1, 8 is a current limiting resistor, 9 is a relay Ry
This is a driving power source. However, mechanical switches, relays, etc. have extremely low reliability and are not rational. In addition, as a purely electronic switching circuit, the
The device shown in FIG. 3, which can be viewed at 56 years in the morning, is known. 31 and 32 are first and second signal source input terminals, 33 is a switching signal input terminal, 34 and 35 are gate transistors,
Reference numerals 36 and 37 are transistors for cutting, and reference numeral 38 is an output terminal.

However, the device shown in FIG. 3 requires switching transistors 36 and 37, which has the disadvantage of complicating the circuit arrangement. Therefore, the present invention provides a purely electronic switching circuit which can switch output signals by external signals without using mechanical switches or relays, and which has a simple circuit configuration.

Hereinafter, one embodiment of the present invention will be described based on FIG. 2a.

10 and 11 are PNP transistors of opposite polarity and N
A signal from a signal source 1 is input to the base of the PNP transistor 10 via a DC cut capacitor 12 and an input terminal 13, and the NPN transistor 1
The base of 1 has a DC cut capacitor 14 and input terminal 1.
A signal from the signal source 2 is inputted via the signal source 5 and the signal source 2.

Furthermore, the emitter of the PNP transistor 10 is connected to a power supply terminal 17 via a resistor 16, and the emitter of the PNP transistor 11
The collector of is directly connected to the power supply terminal 17, and a positive voltage (10 Vcc) is applied to the terminal 17. The collector of the PNP transistor 10 and the emitter of the NPN transistor 11 are connected to ground via a resistor 18. The bases of both transistors 10 and 11 and the DC cut capacitors 2 and 14 are connected through resistors 19 and 20, respectively, and the connection point C between resistors 19 and 20 is connected through resistor 21. It is connected to the power supply terminal 17 via the power supply terminal 17 . Further, a switch 22 is interposed between the connection point C and the ground, and controls the DC potential of the connection point C on and off to select an output signal. A signal selected from the signal sources 1 and 2 is output from a connection point 2 between the collector of the PNP transistor 10 and the emitter of the NPN transistor 1 via a DC cut capacitor 23 and an output terminal 24.
The operation of the above embodiment will be explained.

When the switch 22 is turned on and the connection point C is set to the ground potential, the resistor 21 acts as a current limiting resistor, and P
A base current flows through the NP transistor 10 via the resistor 19.

In this case, since the PNP transistor 10' is emitter-grounded, its amplification degree A is approximately determined by the ratio of the resistors 16 and 18, and if the resistors 16 and 18 have the same resistance value, almost 100% DC feedback is achieved. Therefore, A=1
It is. Therefore, the signal source 1 input from the input terminal 13
The signal is generated from the collector of the PNP transistor 10 to the output terminal 24 via the DC cut capacitor 23.

Furthermore, the emitter of the NPN transistor 11 is connected to the collector of the PNP transistor 10;
N transistor 1 The base of 1 is resistor 20, switch 2
2, so no base current is flowing. Therefore, the NPN transistor 11 does not become a load on the PNP transistor 10, and the NPN transistor 1 does not affect the PNP transistor 10 in any way. When the switch 22 is turned off, N
A base current flows through the PN transistor 11 via the resistors 21 and 20, and the NPN transistor 11 becomes operational.

Therefore, the signal of signal source 2 input from input terminal 15 is N
It is generated at the output terminal 24 via the emitter of the PN transistor 11 and the DC cut capacitor 23. In this case NP
Since the N transistor 11 has a common collector, approximately A=
It is 1. When the switch 22 is in the off state, the PNP
The transistor 10 is connected to the power supply voltage (
10 Vcc) is applied and is in a reverse bias state, so it is in an off state and no current flows. Therefore, P
The NP transistor 0 does not serve as a load on the NPN transistor 11 and does not have any influence on the NPN transistor 11. Therefore, by turning the switch 22 on or off, the output signals of the signal sources 1 and 2 are selectively output to the output terminal 24. Next, another embodiment will be described based on FIG. 2b.

In FIG. 2b, 25 is a control clock that switches the state of the output terminal 26 to logic level "H" or "L" at a preset time, and the output signal of the output terminal 26 causes the PN
The operating states of the P transistor 10 and the NPN transistor 11 are controlled on and off, and the signal generated at the output terminal 24 is selectively controlled to be the signal source 1 output signal or the signal source 2 output signal. When the output terminal 26 of the control clock 25 is at the logic level "H", the NPN transistor 11 operates, and the signal from the signal source 1 is generated at the output terminal 24. Also, output terminal 2
6 is at the logic level "L", the PNP transistor 10 operates, and the signal from the signal source 2 is generated at the output terminal 24. As explained above, according to the switching amplifier of the present invention,
The emitter of the first transistor and the collector of the second transistor are connected to one power supply directly or through a resistor, and the collector of the first transistor and the collector of the second transistor are connected to one power supply directly or through a resistor. and the emitters of the transistors are connected to each other, a load resistor is provided between this connection point and the other fly source, and first and second output signals are applied to the bases of the first and second transistors, respectively. , 1st
Since the same control voltage is applied to the base of the second transistor and the output signals of the first and second signal sources are selectively output from the connection point, switching between the two input signals is electronically performed. It is highly reliable as there are no mechanical parts.
Moreover, since transistors with opposite polarities are used for the first and second transistors serving as gate transistors, there is no need for switching transistors 36 and 37 as seen in the conventional device shown in FIG. 3, and the circuit foundation is simplified. It is simple and has extremely great industrial value.

[Brief explanation of the drawing]

Figure 1 is a circuit diagram showing a conventional signal switching circuit, Figure 2a
2 is a circuit diagram showing one embodiment of the present invention, FIG. 2b is a circuit diagram showing another embodiment of the present invention, and FIG. 3 is a purely electronic switching circuit diagram of a slave. 1...First signal source, 2...Second signal source, 10... ...PNP transistor, 1 1.・・・
...NPN transistor, 13, 14...Input state,
24...Output terminal. Figure 1 Figure 2 Figure 3

Claims (1)

[Claims] 1 have first and second transistors with opposite polarity, the emitter of the first transistor and the collector of the second transistor are connected to one power supply directly or through a resistor, and the collector of the first transistor and the collector of the second transistor are connected to one power supply directly or through a resistor. The emitters of the two transistors are connected to each other, a load resistor is provided between this connection point and the other power supply, and first and second output signals are applied to the bases of the first and second transistors, respectively. ,
A switching amplifier configured to apply the same control voltage to the bases of the first and second transistors and to selectively output the output signals of the first and second signal sources from the connection point.