JPS5836855B2 - switching circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a switching circuit that selectively outputs one of a plurality of input signals. It is an object of the present invention to provide a switching circuit with high input impedance and low output impedance, which selectively outputs input signals with little passing loss.

Conventionally, it has been common to use a diode bridge circuit or a differential amplifier combination circuit as a switching circuit.

However, the diode bridge circuit has drawbacks such as low input impedance, requiring a large amount of power for control, and requiring a large number of elements.

On the other hand, the combinational circuit of a differential amplifier requires a large number of transistors to achieve high input impedance and low output impedance, and adjustment is required to set the passing losses of the two input signals to be selectively output to be equal. It had the disadvantage of having

The present invention eliminates all of the above-mentioned drawbacks, and an example thereof will be described below with reference to the drawings.

FIG. 1 is a specific circuit diagram showing an embodiment of the switching circuit according to the present invention, and 1 and 2 are input terminals for signals to be selectively output.

Further, 3 is a control signal input terminal, and 4 is an output terminal from which an input signal from the input terminal 1 or 2 is taken out.

The signal coming into input terminal 1 is an NPN I-ranjisk Trt which is base biased by resistors R and R2.
The signal that enters the other input terminal 2 is supplied to the base of the
NPN base biased by resistor R3R4? It is supplied to the base of transistor Tr2.

The collectors of transistors Tr1 and Tr2 are resistors R5 R
The emitters of the transistors Tr, Tr2 are connected to the positive DC power supply voltage input terminal through the resistor R9 RIO and the collector of the switching NPN t-transistor Tr3 r Tr4. connected with.

The emitters of the transistors Tr3, Tr, are grounded via a common resistor Rtt, and are connected to the output terminal 4.

Further, the control signal input terminal 3 is connected to the base of the transistor Tr through a resistor divider circuit consisting of a resistor R1 and Ftts, while the control signal input terminal 3 is connected to the base of the transistor Tr through a resistor Rl4.
Connected to the base of 4.

Transistor Tr is a phase inversion transistor because the control signal from control signal input terminal 3 is applied to the bases of transistors Tr3 and Tr4 with opposite polarities, and in principle, the base inputs of transistors Tr3 and Tr are reversed. Since any polarity is sufficient, this transistor Tr5 may be omitted, and the switching circuit can therefore be configured with four transistors Tr1 to Tr4.

Further, a resistor R15 t R16 is connected in series between the base of the transistor Tr3 and the positive DC power supply voltage input terminal, and a connection point between the resistors R15 and R16 is coupled to the collector of the transistor Tr5.

Next, to explain the operation of the above circuit, the control signal input from input terminal 3 is at the same potential level (H level) as the positive DC power supply voltage, and after being divided by resistors R1 and R13, transistor Tr5 The polarity of the signal is inverted and applied to the base of the transistor Tr3, while the signal is applied to the base of the transistor Tr4 via the resistor R14.

As a result, the transistor Tr5 operates in the saturation region,
Since its collector potential is approximately at the ground level (L level), the transistor Tr3 operates in an inactive region (becomes non-conductive).

Due to the inactive region operation of the transistor Tr3, the impedance between its collector and emitter becomes sufficiently larger than that of the resistor R9, so that the emitter of the transistor Tr connected to the collector of the transistor 'l''r3 is as follows.
A voltage determined by resistors R and R7 will be applied.

Here, the resistance values of the resistors R and R2 are the transistor Tr
Since the base potential of transistor Tr1 is selected to be higher than the emitter potential at this time and higher than the conditions described later, the transistor Tr1 operates in an inactive region.

Therefore, when an H level control signal enters the input terminal 3, both transistors Tr and Tr3 operate in the inactive region, so that the human input signal from the input terminal 1 is attenuated and blocked by the transistors Tr 1 + Tr 3 .

At this time, the human input signal from input terminal 1 is approximately the reverse bias impedance between the base and emitter of transistor Tr1, the parallel resistance of resistor R7 1 R9, and the transistor T
Attenuation occurs over two stages of impedance versus resistance R11 during operation in the inactive region between the collector and emitter of r3.

Therefore, even if the input signal is a high frequency signal, a sufficient degree of attenuation can be obtained by the circuit from the input terminal 1 to the output terminal 4.

On the other hand, the transistor Tr4 to which the H level control signal is applied to its base operates in the saturation region, and the transistor Tr4
becomes conductive, and the resistance R8 1RIO IRIt J
A voltage determined by R14 is applied to the emitter of transistor Tr2.

Here, since the base potential of the transistor Tr2 at this time is set in advance by the resistors R3 and R4 to be a potential higher than the electric potential obtained by adding the forward voltage VBE to the emitter potential, at this time the base potential of the transistor Tr2 performs active region operation, resistors R8, R1o, and the impedance between the collector and emitter when the t-transistor Tr4 is conductive, and the resistors Rl4 and Rl1 each act as emitter resistors, resulting in a low output impedance, and the input signal from input terminal 2 is output. It is taken out from terminal 4.

Here, since the collector-emitter impedance of the transistor Tr4 when operating in the saturation region is extremely small compared to the resistor R1, the voltage gain of the output versus input of the output terminal 4 and the input terminal 2 is approximately 1.

Next, when the input level of the control signal input terminal 3 becomes L level, the transistor Tr5 operates in an inactive region, and the impedance between its collector and emitter becomes high.

Therefore, the base current is supplied to the transistor Tr3 via the resistor R15 and Rta. The transistor Tr3 operates in the saturation region.

As a result, the voltage applied to the emitter of transistor Tr1 is applied to resistors R7, R,, R,5, R16, Rll
It is almost determined by

The transistors Tr,
Since the base potential of the transistor Tr1 is set by the resistors R1 and R2, the transistor Tr1 operates in the active region.

At this time, the resistors R7Rt5+ R46, Rg, and R11 act as emitter resistances of the transistor Tr1, resulting in a low output impedance, and since the saturation region impedance (on resistance) of the transistor Tr3 is negligibly small compared to the resistor R11, the terminal 1 The gain of the circuit between and 4 is approximately 1.

As a result, a signal entering the input terminal 1 passes through the transistor Tr1 in the active region and the transistor Tr3 in the saturation region, and is extracted from the output terminal 4 with less loss.

On the other hand, when the input level of the control signal input terminal 3 becomes L level, the base potential of the transistor Tr4 becomes L level, so that the transistor Tr4 operates in an inactive region.

Therefore, there is a resistor at the emitter of transistor Tr2.

, R8.

However, the base potential of the transistor Tr2 is the resistor R3,
Since the emitter potential is set to be lower than the emitter potential at this time by R4, the transistor Tr2 also operates in an inactive region.

Therefore, the attenuation of the output from output terminal 4 versus the input from input terminal 2 is the reverse bias impedance between the base input and emitter of transistor Tr2 versus resistance R8? Since it is attenuated in two stages: the resistance value determined by RIO and the inactive region operating impedance of transistor Tr4 versus resistor R11, it becomes a sufficiently large value.

As a result, the signal entering the input terminal 2 is sufficiently attenuated and cut off by the transistors Tr2 and Tr4, both of which operate in an inactive region, so that the signal is not taken out from the output terminal 4.

As described above, by switching the input level of the control signal input terminal 3, the operating modes of the transistors Tr3 and Tr4, one of which operates in a saturated region and the other in an inactive region, are switched, and the transistor Tr3 and Tr4 operate in a corresponding manner. 1
+ The voltage applied to the emitter of Tr2 also changes, and the operating modes of the transistors Try and Tr2, one of which operates in an active region and the other in an inactive region, also change.

As a result, the signal taken out from the output terminal 4 is changed from the signal that entered the input terminal 1 (or 2) to the input terminal 2 (or 1
) is switched depending on the signal that comes into the terminal.

In addition, when taking out the human input signal of the input terminal 1 from the output terminal 4, the transistor Tr1 is the active region, and the transistor Tr
3 operates in the saturation region, and both transistors Tr2 and Tr4 operate in the inactive region, while input terminal 2
When taking out the input signal from the output terminal 4, the transistor Tr2 operates in the active region, the transistor Tr4 operates in the saturation region, and the transistors Tr and Tr3 operate in the inactive region.

Therefore, the circuit section that passes the input signal has an extremely low output impedance, and the circuit section that blocks the input signal has a high output impedance and high isolation due to the inactive region operation.

Furthermore, the base currents of the transistors Tr1 and Tr2 on the signal input side are large, and the transistors Tr 1 tTr
By using a large current amplification factor for transistors Tr1 and Tr2, changes in the base current can be ignored with respect to changes in the emitter currents of transistors Tr1 and Tr2. By setting the base potentials of each transistor to be equal, the output voltage for switching, etc. Fluctuations can be made extremely small, and furthermore, by setting the emitter potentials of both transistors Tr1 and Tr2 to be equal, it is possible to eliminate fluctuations in the DC voltage during switching.

FIG. 2 shows another embodiment of the switching circuit according to the present invention, and the same parts as those in FIG. 1 are given the same reference numerals and the explanation thereof will be omitted.

In contrast to the embodiment shown in FIG. 1 which selectively outputs input signals to input terminals 1 and 2, this embodiment selectively outputs input signals to input terminals 1, 2, 5, and 6. It selectively outputs one of the input signals.

7, 8, 9 and 10 are control signal input terminals, respectively, for switching NPN transistors TrB v Tr3 r
A control signal is input to cause only one of the transistors Tr4 and Trg to operate in the saturation region, and to cause the remaining transistors to operate in the inactive region.

As a result, the same operation as in Fig. 1 is performed, for example, the input terminal 7
When only the control input of the transistor T is at H level and the control inputs of input terminals 8, 9 and 10 are all at L level, the transistor T
r B operates in the saturation region, and transistors Tr3 and Tr
4 and Trg are all operated in the inactive region, and the transistor Tr8 is operated in the saturation region.
Only r6 operates as an active region, and transistor Tr1
+ Since Tr2 and Tr7 operate in the inactive region, only the signal that has entered the input terminal 5 is selectively switched and outputted from the output terminal 4.

In this way, the circuit shown in FIG. 2 can selectively output any one of the four input signals, and according to the principle of operation, according to the circuit of the present invention, the input signal is supplied to the base of the input transistor ( In Figure 2, Tr 1 + Tr
2 + Tr 6 and Tr7), and a switching transistor (Tr 3 e Tr4 'Tr8 and T
By adding a pair of transistors (corresponding to rg) by an arbitrary logarithm, it is possible to selectively switch and output any one of a plurality of arbitrary input signals.

Note that the input signal to be outputted by switching may be either an analog signal or a digital signal, and in each of the above embodiments, an NPN transistor is used as a transistor, but by making the polarity of the DC power supply voltage negative, etc.
It is clear that a similar operation can be achieved using a PNI-transistor.

As described above, the switching circuit according to the present invention includes: a first transistor whose base is supplied with an input signal; a first resistor connected between the emitter of the first transistor and a power input terminal; A second resistor is connected between the emitter of the first transistor and ground, and a collector is connected to a connection point between the emitter of the first transistor and the first and second resistors, and a control signal is input to the base. A plurality of circuits each consisting of a plurality of second transistors are provided, the emitters of the plurality of second transistors are connected in common, and only an arbitrary one of the plurality of second transistors is controlled by the control signal. operate in the saturation region while the others operate in the inactive region, and among the plurality of first transistors, only the first transistor whose emitter is connected to the collector of the second transistor operating in the saturation region operates in the active region. At the same time, the input signal of the first transistor operating in the active region is switched and outputted from the emitter of the second transistor operating in the saturation region, with the other transistors operating in the inactive region. have

■ The base input signal of the first transistor that operates in the inactive region is transmitted over two stages because both the first transistor and the second transistor whose collector is connected to the emitter operate in the inactive region. Passage of the input signal can be blocked with a sufficiently large degree of attenuation, and the degree of separation is high.

(2) The first transistor operating in the active region is of the emitter follower type and therefore has a high input impedance.

(2) Since the emitter follower output is taken out from the emitter of the second transistor operating in the saturation region, the output impedance is low.

■ High hFE transistor can be used in the first stage,
By setting the base potentials of the plurality of first transistors to the same potential, fluctuations in DC voltage during switching can be eliminated.

(2) Switching control is performed by supplying control signals to the bases of each of the plurality of second transistors, so switching can be controlled with low power.

(2) Compared to conventional diode bridge circuits and differential amplifier combination circuits, a switching circuit having the features (1) to (4) above can be constructed with an extremely small number of transistors.

[Brief explanation of drawings]

FIG. 1 is a specific circuit diagram showing one embodiment of the switching circuit according to the present invention, and FIG. 2 is a specific circuit diagram showing another embodiment of the switching circuit according to the present invention. 1, 2, 5, 6... Input terminal, 3, 7, 8.1
0... Control signal input terminal, 4... Output terminal, Tr - Tr... NPN } transistor. 19

Claims (1)

[Claims] 1 A plurality of circuits each consisting of a first transistor whose base is supplied with a human power signal and a second transistor whose collector is connected to the emitter of the first transistor and whose base receives a control signal, The emitters of the second transistors of the plurality of transistors are commonly connected, and the control signal causes only one of the plurality of second transistors to operate in the saturation region, and the others to operate in the inactive region, and A switching circuit that switches and outputs a base input signal of the first transistor connected to the collector of the second transistor that operates in the saturation region from the emitter of the second transistor that operates in the saturation region, The emitter of the first transistor is connected to the first power supply terminal via the first resistor, and the emitter of the second transistor is connected to the first power supply terminal via the first resistor.
is connected to the second power supply terminal through a resistor, and among the plurality of first transistors, only the first transistor whose emitter is connected to the collector of the second transistor which operates in the saturation region 1. A switching circuit characterized in that the switching circuit is configured to operate in an active region and operate other components in an inactive region to obtain a switching output.