JPS6039236A - Circuit for transferring data displayed on liquid crystal panel - Google Patents

Abstract

PURPOSE:To reduce consuming heat generated in the inside of a device by constituting a data transfer circuit of a logic circuit small in scale comprising high speed CMOSes to make the current consumption almost zero. CONSTITUTION:A signal level of a communication instruction from an external device 1 is fed to an interface circuit 2 of a device 11 in which a liquid crystal panel 10 is incorporated and the circuit 2 converts the signal into the internal signal level. This signal is converted by a CPU3 into an internal processing instruction, which is fed to a decoder circuit 4, a chip selector circuit 5, a serial data circuit 6, a serial clock circuit 7 and a instruction data designating circuit 8. Further, the content decoded by the circuit 4 is fed to the circuits 5-8. A panel 10 is driven by a signal outputted from the circuits 5-8 via a liquid crystal driver 9. Then a data transfer circuit consists of a logic circuit comprising high speed CMOSes so as to reduce the consuming heat generated in the inside of the device 11.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a data transfer circuit for liquid crystal panel display.

Conventional data transfer circuits for liquid crystal panel display have been prepared in a 1-chinoff configuration as programmer pull error 0 devices.

However, in conventional configurations, many logic circuits are bipolar driven or yMos driven, and have the disadvantage of having to flow a constant 711" current with a current consumption of about 50 to 100 mA. In particular, the convector As a device that requires a small space as a device terminal, the heat consumption generated internally has often been a problem.

This technology solves the above-mentioned drawbacks, and the data transfer circuit is made up of 8 small-scale logic circuits, and by configuring the small-scale logic circuit with, for example, a high speed build CMO 8, the current consumption can be reduced to zero. The purpose is to reduce the heat consumption generated inside the device.

The smell and sewage invention will be explained in detail with reference to FIGS. 1, 2, 3, 4, and 5. Figure 1 is a block diagram of a data transfer circuit for a liquid crystal panel display according to the present invention, Figure 2 is a flowchart of a data transfer routine for a liquid crystal panel display, and Figure 6 is a flowchart of a data transfer routine for a liquid crystal panel display.
The figure is a flowchart of the LCD display routine, Figure 4 is a timing chart of data transfer for LCD panel display, and Figure 5 is an external view of a device equipped with the circuit of the present invention.
In the figure, 1 is an external device for displaying communication commands on the liquid crystal display panel 10, 2 is an interface OO path that converts the signal level of the communication command from the external device 1 into a signal level inside the device, and 31- is an external device. A CPU 4 that converts communication commands from the device 1 into internal processing commands is a decoder circuit that selects a chip selector circuit 5, a serial data circuit 6, a serial clock circuit 7, and a command/data designation circuit 8. Note that the chip selector circuit 5, the serial data circuit 6, and the serial clock circuit 7itcp
It is connected to the data bus of u3, and data signals from CPU3 are supplied to each. A liquid crystal driver receives data signals from the 9-digit chip selector circuit 5, the serial data circuit 6, the serial clock circuit 7, and the command/data designation circuit 8, and drives the liquid crystal panel 10 to display a display; It is a device.

Note that S is a serial clock signal c″B that is output from the serial data circuit 6 and is used to transfer the serial data signal shown on the liquid crystal panel 1avce, or the serial data signal S, in 1-bit units to the internal register of the liquid crystal driver 9.
is a chip selector circuit that selects a target chip from among the eight liquid crystal drivers 9, and C/D is a command/data designation signal that specifies whether the signal serially transferred to the liquid crystal driver 9 is a command or data. and 1
indicates a command, and indicates data. ``■The liquid crystal driver 9 receives the mouth signal, processes it internally, and then uses the logic K.
BUSY is a busy signal that rises from IK from O.
If the signal is not in the 1 state, the serial data signal S will not be sent.

Next, the operation will be explained. From Figures 2, 3, and 4, in step
Set the counter inside PU3. For example, if there are 6 digits, set the counter to 6. In step (2), the chip selector circuit 5 is operated to set the blindness of the liquid crystal driver 9 to /'o #vc so that the target liquid crystal display panel 10 can display. In step ■, as a time waiting routine, a time is set to wait for the BUSY of the liquid crystal driver 9 to rise from 01 to ``1#.'' Step ■ is a liquid crystal display routine, which consists of the steps from step ■ in Figure 3. The processing routine up to O is shown.

In step (2), the number of bits required to display one digit is set in a counter. For example, since the embodiment has an 8-bit configuration, the counter Vc8 is set. In step 2, the serial data circuit 6 is selected by the decoder circuit 4Vc, and only 1 bit of the serial data is MSB (D
7) to the serial data port of the liquid crystal driver 9. From step serial clock circuit 7■
Outputs the nokurusu, and synchronizes with the liquid crystal Drino (
The serial data D7 is input to the internal register -9. In step (2), one bit is moved to the internal register of 0PU5 in order to take in the next data (D6). Subtract 1 from the step counter value 8 to make it 7. In step [phase], whether the 8 bits to be transferred are a command or a data signal is designated by the command/data designation circuit 8Vc. In step 0, the process returns to step (2) until the counter value becomes OK, and when the counter value becomes 0, the process goes to 5TOP. This repeated operation is completed when an 8-bit signal can be sent. When the liquid crystal display routine in step (2) is completed, the process moves to Nutezob OVc and the counter value is decremented by 1. Next step 6
In Φ, step the above operation until the counter value becomes 0.■
After repeating from step 0 to step 0 and transferring 6 bytes to the liquid crystal display (-9), the process moves to the next step 0, and F8PC raises the output of the chip selector circuit 5 to "19", thereby making it possible to display a 6-digit display on the liquid crystal display.

As described above, according to the present invention, the data transfer circuit of the liquid crystal panel display is configured with a small scale logic circuit, and each logic circuit uses a low power C such as a high speed CMOS. For a device used as a terminal device for the 11th time, it has the effect of preventing wasteful heat generation and improving thermal f! reliability in terms of quality.

[Brief explanation of drawings]

FIG. 1 is a data transfer circuit diagram of a liquid crystal panel display according to the present invention. FIG. 2 is a flowchart of a data transfer routine for liquid crystal panel display. FIG. 3 is a flowchart of the liquid crystal display routine. FIG. 4 is a timing diagram of data transfer for liquid crystal panel display. FIG. 5 is an external view of the device. 1... External device 2... Interface circuit 6... CPU 4... Decoder circuit 5... Chip selector circuit 6... Serial data Circuit 7...Serial data circuit 8...Command/data specification circuit 9...
・Liquid crystal driver 10...Liquid crystal panel 11...Device side Applicant: Tateji Seiko Co., Ltd. Figure 2, Figure 3

Claims (1)

[Claims] CP that converts communication commands from external devices into internal processing commands
U, a liquid crystal panel that displays the communication command, a liquid crystal driver that drives the liquid crystal panel, a chip selector circuit, a serial data circuit, a serial clock circuit, and a command necessary for transferring the communication command to the liquid crystal driver. It includes a designation circuit, a decoder circuit that selects the chip selector circuit, the serial data circuit, the serial clock circuit, and the command data designation circuit.
A liquid crystal panel display data transfer circuit capable of displaying communication commands on the liquid crystal panel according to internal processing commands of the PU.