JPS6038071B2 - Display time switching device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a display time switching device, for example, in a display device such as a television receiver, which can automatically switch the display time such as a time display according to the type of switching operation of the display device.

For example, information such as a channel number and time may be displayed on the screen of a television receiver.

In this case, it is necessary to control whether or not to display the information, and this can be done by providing a switch for display control, or by synchronizing with display recall operations, channel switching operations, power-on operations, etc. There is a method of displaying the above information on the screen for a certain period of time after these operations. In the latter case, if the display time after operation is set constant, it takes time to heat the cathode of the picture tube, especially when turning on the power, and it takes a certain amount of time for the screen to stabilize.
This has the disadvantage that even if the information display time is constant, the actual display time is short, and a means that can obtain a constant display time depending on each operation is desired. This invention has been made based on the above circumstances, and its purpose is a display time switching device that can change the display time of information displayed on a display according to the type of power-on operation or channel switching operation. It provides:

An embodiment of the present invention will be described below with reference to the drawings.

In FIG. 1, A is a signal generated when the television receiver is in a transient state when the power is turned on, and when a channel switching operation or a recall operation is performed during normal operation. The signal is supplied to the selection circuit 12.

This time setting circuit 11 is reset by the operation signal A, for example, and displays a plurality of display modes depending on the time length from the time of reset. A control signal is sent to the 0 diamond selection circuit 12. This selection strategy 1
Reference numeral 2 selects a plurality of signals having different time lengths according to the operation signal A, and the output signal B of this selection circuit {12 is supplied to the information signal generation circuit 13. This information signal generation circuit 13 generates a video signal such as time and channel number, and the output signal of this information signal generation circuit 13 is transmitted to a television receiver, etc. according to the time length selected by the selection circuit 12. is displayed on the cathode ray tube display 14. Next, a specific example of the time setting circuit 11 and the selection circuit 12 will be explained with reference to FIG. 2.

That is, the OR circuit 21 is supplied with an initialization signal f (a signal when the power is turned on) corresponding to the operation signal A and a channel switching signal g. The output signals of the OR circuits 21 are each supplied to a reset terminal R of a 4-bit binary counter 22 constituted by a flip-flop circuit. A clock signal h of 1 [Hz] is supplied to the clock pulse input state CK of the counter 22 through one input terminal of the NAND circuit 23, and in response to this clock signal, the output terminals Q, Q2, Q3, Q4 are A time signal is output to the selection circuit 12. The selection circuit 12 is composed of a flip-flop circuit 24, AND circuits 25, 26, an OR circuit 27, and a NAND circuit 28. That is, the output signals of the output terminals Q and Q4 of the counter 22 are supplied to one input terminal of the AND circuits 25 and 26, respectively, and the output signal of the flip-flop circuit 24 is supplied to the other input terminal from the output terminals Q and 8, respectively. Supplied. The flip-flop circuit 24 is supplied with the initialization signal f and the channel control signal g, and its output state is inverted. Furthermore, the output signals of the AND circuits 25 and 26 are output from the OR circuit 2.
The output signal of the OR circuit 27 is supplied to the NAND circuit 28 together with the output signal of the output terminal Q2 of the counter 22. The output signal B of this NAND circuit 28 is supplied to the information signal generation circuit 13 and also to the other input terminal of the NAND circuit 23. The operation of the above configuration will be explained using FIG. 3.

First, when the power is turned on, the initialization signal f is supplied to the reset terminal R of the counter 22 via the OR circuit 21, and the counter 22 is placed in the reset state.

At the same time, the initialization signal f is applied to the flip-flop circuit 24, and a "1" level signal is supplied from the output terminal 8 to the AND circuit 26, which selects and outputs the output signal of the output terminal Q4 of the counter 22. However, at this time, since the output signals of the counter 22 are all at the "0" level, the output signals of the AND circuits 25, 26 and the OR circuit 27 are "0".
" level, and the output signal B of the NAND circuit 28 becomes "1" level. This signal controls the information signal generation circuit 13 to display information on the display 14, and also opens the NAND circuit 23 and causes the counter 22 to display a 1 [1] level. HZ]'s h.Tsuku signal h
and start counting. Then, when the clock signal h is counted, for example, in the skin area (1st position), the output terminals Q2 and Q4 of the counter 22 are both "1".
level, and the output signal B of the NAND circuit 28 becomes "0" level. This signal then controls the information signal generating circuit 13 to erase the information from the display bag 14, close the NAND circuit 23, and stop the counter 22 from counting. Next, when the channel is switched, the channel switching signal g is sent to the counter 22 via the OR circuit 21.
V is supplied to the reset terminal R of the counter 22, and the counter 22 is placed in a reset state.

At the same time, the channel switching signal g is also supplied to the flip-flop circuit 24, the output state is inverted, and a "1" level signal is supplied from the output terminal Q to the AND circuit 25, and the output terminal Q3 of the counter 22 is supplied with a "1" level signal. Select and output the output signal. However, at this time, since the output signals of the counter 22 are all at the "0" level, the output signals of the AND circuits 25, 26 and the OR circuit 27 are at the "0" level, and the output signal B of the NAND circuit 28 is at the "1" level. Become. This signal controls the information signal generating circuit 13 to display information on the display 14, and also opens the NAND circuit 23 and supplies the clock signal h of 1 [Hz] to the counter 22 to start counting. Then, when the clock signal h is counted for example 6 times (6 seconds), the output terminal Q of the counter 22 is
2 and Q3 both become “1” level, and the NAND circuit 28
The output signal B of is at the ".0" level. This signal then controls the information signal generation circuit 13 to erase the information from the display device 14, closes the NAND circuit 23, and stops the counter 22 from counting. According to Yokinari mentioned above, when the power is turned on, the information is displayed for 1 inkstone, and when the channel is switched, the information is displayed for 6 seconds, so if the cathode heating time of the picture tube is, for example, 4 seconds, the actual The information is displayed for 6 seconds, and the display time is the same when the power is turned on and when switching channels.

It goes without saying that the information display time is not limited to the above embodiment, and can be set depending on the cathode heating time.

Furthermore, it can also be used in operations other than when the power is turned on, for example, to switch the display time between channel switching and display recall operations.

Various other modifications can be made without departing from the gist of the present invention. For example, the counter 22 is constructed of a flip-flop circuit, but this can be implemented using, for example, a monostable multi-noise circuit that outputs an output signal for a certain period of time after operation. A vibrator etc. may also be used.

As described in detail above, according to the present invention, it is possible to provide a display time switching device that can vary the display time of information displayed on a display according to the power-on operation and channel switching operation of the display.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the display time switching device according to the present invention, FIG. 2 is a circuit diagram showing the main parts of FIG. 1,
FIG. 3 is a waveform diagram shown to explain the operation of FIG. 2. 1 1...Time setting circuit, 12...Selection circuit,
13... Information signal generation circuit, 14...
display. Figure 1 Figure 2 Figure 3

Claims (1)

[Claims] 1. An information signal generation circuit that generates a plurality of information signals, a cathode ray tube display that displays information based on the information signals, an operation signal source that turns on the power or switches channels of the cathode ray tube display, and the operation signal a time setting circuit that is driven by being supplied with an operation signal of a source and generates a plurality of display control signals having different time lengths; a selection circuit that selects a long display control signal and supplies it to the information signal generation circuit to control the supply time of the information signal to the cathode ray tube display. Device.