JPS6037576Y2 - Group performance training device - Google Patents

Description

[Detailed Description of the Invention] This invention relates to a group performance training device that allows a parent device to effectively give instructions to each group of child devices that are set up as a group.

For group performance lessons, one parent device used by the teacher,
Each student uses multiple handsets, and the teacher teaches while giving instructions to each handset or all at once.

This instruction is given by voice from a microphone, but if the handset is playing or if the student's attention is distracted, the instructions may not be thorough.

This idea was created in view of the above points, and in particular, before giving instructions by voice, etc., a preliminary warning instruction is given to the handset to which instructions should be given, so that group training can proceed more effectively. It is an object of the present invention to provide a group performance training device that enables the performance of a group performance.

That is, the device according to this invention groups and sets the slave devices into a plurality of slave device groups, sets a group selection instruction switch group and a simultaneous instruction switch on the base device side, and operates the switch group or the simultaneous instruction switch. In response to this, the instruction circuit for each slave unit group is activated selectively or all at once, and a call alarm instruction signal is supplied to the instruction circuit.

An embodiment of this invention will be described below with reference to the drawings.

FIG. 1 shows the configuration, mainly showing the configuration on the base unit side.

That is, the base device is equipped with an electronic musical instrument 11 played by the teacher, and a microphone 12 that gives audio instructions to the child device. are collectively sent to the instruction transmission circuit 15 via amplifiers 13 and 14, respectively.
join to.

On the other hand, on the handset side, A□, A2, """An, Bl-B
2,...BAnlCl, C2,...C
For example, three groups A and BXC are set as shown by n, and instruction transmission circuits 15A and 15B are set for each group.
, 15C are set.

That is, the signal of the instruction transmission circuit 15 is distributed in parallel to the instruction transmission circuits 15A to 15C of each group, and is transmitted to the amplifier 17A of each slave unit group via gates 16A, 16B, and 16C each consisting of an FET or the like. , 17B, and 17C.

This device also includes selection switches 18A, 18B, and 18C for selecting and instructing each slave unit group to call.
A switch 19 for giving a simultaneous instruction, and a switch 20 for giving an emergency instruction are provided, and each switch 1
8A to 18C, 19, and 20 generate logic rIJ signals with a power supply of 1 V when turned on.

The signals from the selection instruction switches 18A to 18C are transmitted through OR circuits 21A to 21C, respectively.
A gate signal is applied to each of the switches 16A to 16C to open the gate, and an OR circuit 22 collectively detects the operation state of any of the switches 18A to 18C.

Further, the output signals from the simultaneous and emergency switches 19 and 20 are supplied to an OR circuit 23, and the output signals from this OR circuit 23 are supplied to each of the OR circuits 21A to 21C. and an initial clear signal IC are both supplied to the NOR circuit 24.

The output signal from the NOR circuit 24 is supplied to a differentiating circuit 25.

This differential circuit 25 generates a differential pulse signal when the output signal from the NOR circuit 24 falls from logic 11yo to 70J, and this differential puffless signal is generated by Q1 to Qn.
It is supplied as a reset R command to the binary counter 26 having an output bit digit of .

The binary counter 26 is incremented by a clock CL supplied through an AND circuit 27. A signal is provided as a gate signal.

That is, except for the maximum count state where the most significant bit of the binary count value information of the counter 26 is 111, the AND circuit 2
7 is given a gate signal, and the counter 26 receives the clock C.
Start counting L.

The output signals from the lowest and second digits Q1 and Q2 of this counter 26, together with the output signal from the inverter 28, are supplied as gate signals to AND circuits 29 and 30. circuit 27
The clock CL from the

Further, the clock CL from the AND circuit 27 is supplied to the AND circuit 31 together with the output signal from the inverter 28,
The AND circuit 31 is further supplied with an output signal from the emergency instruction switch 20 as a gate signal.

The output signals from the AND circuits 29 and 30 are respectively supplied to AND circuits 32 and 33. The AND circuit 32 is supplied with the output signal from the simultaneous instruction switch 19 as a gate signal, and the AND circuit 33 is supplied with an OR circuit. The output signal from 22 is given as a gate signal.

The output signals from the AND circuits 31 to 33 are supplied to the OR circuit 34, and the output signal from the OR circuit 34 is
The output signal from the oscillator 35 of the alarm sound source is applied as a gate signal to the gate 36, and the alarm instruction signal taken out through the gate 36 is transmitted to the instruction transmission circuit 15.
It will lead you to.

That is, in a state configured as described above, when an initial signal IC is generated, this initial signal I
C is supplied to the binary counter 26 as a reset pulse via the NOR circuit 24 and the differentiation circuit 25.

Therefore, Qn of the counter 26 becomes "0" and the clock C
The counter 26 is counted up by L.

The counter 26 stops when the Qo output reaches rIJ.

In this state, for example, when the selection instruction switch 18A is operated to give an instruction to the handset group A, a gate signal is given to the gate 16A via the OR circuit 21A in the closed state.

At the same time, a signal is applied to the NOR circuit 24 via the OR circuit 22, its output falls, a pulse signal is obtained from the differentiating circuit 25, and the binary counter 26 is reset.

That is, the output of that digit Qn becomes r( ), the gate of the AND circuit 27 is opened by the output of the inverter 28, and the counter 26 is incremented by the clock CL.

Then, in response to the generation of an output signal from digit Q2 of the counter 26, a signal corresponding to the clock CL is taken out from the AND circuit 30, and is passed through the AND circuit 33 and the OR circuit 34 whose gate is opened by the output of the OR circuit 22. A gate signal is given to 36.

Here, when the clock CL supplied to the AND circuit 27 is in the state shown in FIG.
1. The output signals of Q2, . . . Qn are as shown in the same figure.

Therefore, the output signal from the AND circuit 33 that detects the clock CL corresponding to the output of Q2 is 03 in the same figure.
The signal from the oscillator 35 is taken out from the gate 36 in response to the signal G3, and the instruction transmission circuit 15
will be supplied to

Therefore, the gate 1 opened by the output of the OR circuit 21A
6A, this signal is transmitted to each slave machine A of slave machine group A, A
2, .

This warning instruction continues until the count of the counter 26 is incremented, the output of the digit Q becomes 111, and the gate of the AND circuit 27 is closed.The time should be set to about 2 to 3 seconds. good.

Similarly, when switches 18B and 18C are operated, a warning instruction is issued to handset groups B and C, calling attention to each handset group and ensuring that instructions from the teacher using microphone 12 are thoroughly followed. It will be done effectively.

Furthermore, when it is desired to give an instruction to all slave devices at the same time, the simultaneous instruction switch 19 is operated.

When this switch 19 is turned on, an output signal is generated from the OR circuit 23, the output of the NOR circuit 24 falls, and the binary counter 26 is reset, and the signal is sent to the gates 16A to 16G via the OR circuits 21A to 21C. The gate signals are applied all at once, and the gate signal is further applied to the AND circuit 32.

Therefore, from this AND circuit 32, the AND circuit 2
In response to the output signal from 9 and the output of digit Q1 of the binary counter 26, the signal shown at 62 in FIG. It begins to generate sound.

Furthermore, when the emergency switch 20 is operated, an output is generated in the OR circuit 23 in the same manner as described above, and a gate signal is also given to the AND circuit 31, and from this AND circuit 31, a G circuit is output to the circuit shown in FIG. 2 corresponding to the clock CL. The signal shown is taken out and the gate 36 is controlled.

Therefore, an intermittent emergency sound-like warning instruction sound is generated for all slave units, which is effective in calling the attention of all students at once, and ensuring the teacher's attention throughout. This will lead to thorough implementation.

Although not specifically shown in the embodiment, when generating the above-mentioned warning instruction sound, it is effective to separate it from the musical sound signal on the handset side, and this warning instruction can be Of course, it is not limited to a warning light display, and may also be used as a warning light display.

As described above, according to this invention, for multiple slave devices,
It is possible to effectively call the attention of students by giving warning instructions to groups or all at once, and the teacher's caution instructions can be clearly communicated to students through microphones, etc. .

Therefore, group training can be carried out very efficiently.

[Brief explanation of the drawing]

FIG. 1 is a block diagram illustrating a training device according to an embodiment of the invention, and FIG. 2 is a signal waveform diagram illustrating the device. 11...Electronic musical instrument, 12...Microphone, 15.15A-15C...Instruction transmission circuit, 16A-16C, 36...Gate, 18A-
18C...Selection instruction switch, 19...
- Simultaneous instruction switch, 20... Emergency instruction switch, 26... Binary counter, 35...
...Oscillator (alarm sound source).

Claims (1)

[Claims for Utility Model Registration] (a) One base unit and a plurality of slave units subordinate to the base unit; (b) A plurality of coupling means for separately coupling the base unit and the plurality of slave units; (C) Opening/closing control means, which is set on the base unit side and includes a plurality of handset selection instruction switches that individually control opening and closing of the plurality of coupling means, and a simultaneous instruction switch that controls opening and closing of the plurality of coupling means all at once. (d) warning signal generating means for calling and supplying a warning instruction signal to the plurality of coupling means for a certain period of time in response to the operation of the selection instruction switch or the simultaneous instruction switch; Teaching equipment.