JPS6037043A - Display device for program state - Google Patents

Abstract

PURPOSE:To enable a person to recognize a general movement of an overall program by regarding a program as a group of task performing functions then displaying the states of execution of these tasks. CONSTITUTION:An optional address of a main memory 5 is supplied by a person through an input circuit 1, and at the same time the addresses of the task state words within a program are supplied in the same number as the tasks together with the task numbers. Then a central processor 4 is started to execute the programs stored in the memory 5. An address comparator 2 always intercepts the signals of a memory writing control line 6 and an address bus 7 and fetches the addressed flowing through the bus 7 every time the control signal of the line 6 is turned on. This address is compared with the address of a task state word. Then the task number is informed to a display circuit 3 when the coincidence is obtained from said comparison. The circuit 3 fetched the task word flowing on a memory bus 8 and performes a display in accordance with the contents of the relevant task state word.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a device that displays the execution status of a program executed on a microcomputer system in real time.

In a system that uses a microcomputer, the programs executed on the microcomputer include multiple task programs that perform different functions depending on the type of event notified by an interrupt, etc., as well as task program operation control and hardware control. Generally, programs are divided according to their role, such as a monitor program that performs various tasks.

Conventionally, when verifying the correctness of such a program or discovering a malfunction in the program, a device commonly called a system analyzer or in-circuit emulator is connected to the microcomputer system. , a group of instruction codes executed within a specific range of a program was traced by humans setting specific addresses and conditions in main memory in advance) It displayed the contents of main memory and registers.

This method is based on the recognition that a collection of instruction codes is a program, so it is possible to understand the operating status at the instruction code level, but it is difficult to understand the operating status at the instruction code level. It is difficult for humans to get a broad picture of the state of program parts, and program testing requires a great deal of time and effort.

The present invention does not regard a program as a collection of instruction codes, but rather as a collection of functions (tb) that perform a certain role called tasks, and displays the execution status of these tasks to allow humans to recognize the overall movement of the entire program. make it possible.

That is, the present invention provides a microcomputer system consisting of a central processing unit and a main memory, by adding a circuit for inputting a plurality of arbitrary addresses of the main memory, an address comparison circuit, and a display circuit. Execution status f, disaster time display O Next, embodiments of the present invention will be described with reference to the drawings.

A human inputs the addresses of the task status words in the program along with the task numbers by the number of tasks into the input circuit 1 for inputting arbitrary addresses of the main memory. Thereafter, by activating the central processing unit 4, the program stored in the main memory 5 is executed. Address comparison circuit 2
constantly intercepts the signals on the memory write control line 6 and address bus 7, receives the address flowing through the address bus 7 every time the control signal on the memory write control line 6 turns ON, and transfers it to the address bus 7. Compare with the address of the task state word. If a matching address is detected, the task number is notified to the display circuit 3, and the display circuit 3 receives the data flowing on the memory bus 8, that is, the task status word at the time of receiving the notification, and displays the task status. Display according to the content of the word. The contents of the task state word include, for example, a state in which no task has been generated, a task in execution state, a task wait state, a task ready state, and the like.

By repeatedly performing the operations after starting the central processing unit 4 as described above, it is possible to display the task execution status in real time. Me% I
By adding an input circuit, an address comparison circuit, and a display circuit to a microcomputer system consisting of J It is possible to recognize the problem from a global perspective, and if there is a defect in the program, the problem can be narrowed down in a short time, so the time and effort for program testing can be reduced.

[Brief explanation of the drawing]

The figure shows an embodiment of the present invention. ... Central processing unit, 5 ... Main memory, 6 ... Memory write control line, 7 ... Address bus, 8 ...
・・・Memory bus・

Claims (1)

[Claims] In a microcomputer system consisting of a central processing unit and a main memory, a circuit that inputs a plurality of addresses of task state words in a program into the main memory, and a number of addresses flowing during execution of the program,
The program includes an address comparison circuit that compares the input address and produces an output when the two match, and a display circuit that displays the content of data flowing on the memory bus at the time the output is received. A program status display device characterized by displaying the execution status of a program in real time.