JPS59163654A - Debug device - Google Patents

Abstract

PURPOSE:To improve the debug efficiency by referring several times the memory of an actual device computer in a simple procedure and therefore eliminating the need for registration of the reference address value of each time. CONSTITUTION:An interface circuit 8 of a debug device 1 is connected to a processor 11 of an actual device computer 10 via a control bus 12, an address bus 13 and a data bus 14. A processor 2 is connected to the circuit 8 via a debug device system 9, and at the same time a memory 3 storing a reference memory address is connected to the circuit 8. The addresses are registered to the memory 3 from a keyboard 5 connected to a key input control circuit 7, and a display device 4 is connected to a bus 9 via a display control circuit 6. Then the memory address stored in the memory 3 is referred to several times in a simple procedure. As a result, the registration of the address value is eliminated for each reference to the memory address. This improve the debug efficiency.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of the Invention) The present invention relates to a debugging device for debugging a device equipped with a processor such as a microprocessor.
In particular, the present invention relates to a debugging device that allows memory contents at a predetermined address to be referenced multiple times with a simple operation while debugging a program.

(Background of the Invention) Generally, during debugging of a program in a computer system, etc., in order to find out what value the contents of a certain area of memory or the contents of a register, etc. There may be times when it is necessary to refer to the

Further, when a computer system program is executed in a loop, it may be necessary to refer to the contents of the same area each time the loop is executed.

Conventionally, when debugging a program, if you want to refer to the entire contents of a predetermined address in memory, you can use a debug device connected to the computer that executes the program, that is, the actual computer, or a debug device installed in the back computer. The contents of the area were displayed.

In this case, in order to refer to the contents of a certain address in the memory, the user inputs the address to be referenced each time using a keyboard or the like and then presses a request key or the like.

However, in the conventional form, even if the same reference address is referenced many times, for example, when it is necessary to refer to the contents of the same address every time the program loops once, Even if there were, it would be necessary to set the address data each time it is referenced, which would make the operation of the debugging device complicated. In addition, in the conventional method, even if the same reference address is referenced multiple times, the operator must memorize the reference address or write it on memo paper, etc., which reduces debugging efficiency. Purpose of the Invention) An object of the present invention is to improve the efficiency of debugging by making it possible to refer to the memory of an actual computer multiple times through a simple procedure in a debugging device, in view of the above-mentioned problems with the conventional type. .

(Structure and Effects of the Invention) The present invention provides 1. In a debugging device for debugging a program of an actual computer system, an address register for storing a destroyed memory address is used, and the content data of the address register is used as an address. This is based on the concept of reading out and displaying the memory contents of the actual device control.By using such a concept, when referring to the same memory address, the reference address value can be changed each time the reference is made. This simplifies key operations on the debugging device, and eliminates the need for
This eliminates the need for the programmer to memorize memory addresses or write them down on memo paper, making debugging extremely efficient.

(Explanation of Examples) Hereinafter, the present invention will be explained in detail with reference to the drawings.

FIG. 1 schematically shows a debugging device according to an embodiment of the present invention. The debugging device 1 shown in the figure includes a processor 2, a memory 3, a display 4 including a numeric display, a keyboard 5, a display control circuit 6, a key manual control circuit 7, and an interface circuit 8. The processor 2, memory 3, display control circuit 6, key manual control circuit 7, and interface circuit 8 are interconnected via a system bus 9 of the debug device. Further, the display control circuit 6 is connected to the display 4, and the key manual control circuit 7 is connected to the keyboard 5. Reference numeral 10 denotes a computer system t, ie, a real computer, which is the target of program debugging, and includes a processor 11 and a memory (not shown). The processor 11 and the memory are connected to a control bus 1.
2, an address bus 13, and a data bus 14. The system bus of the real and imaginary computer 10 is connected to the debug device 1 via an interface circuit 8.

The operation of the debugging device shown in Fig. g1 will be explained with reference to Fig. 2. In the debugging device 1 of FIG. 1, a predetermined address in the memory 3 or a register in the processor 2 is an address register A for storing a reference address.
This register AR'M is used as RM, and the address of the memory of the actual computer 10 to be referenced is set in this register AR'M. When referring to the memory address of the actual controller 10, the computer 10 is put into a halt state, etc., and a request key provided on the keyboard 5 of the debugging device 1 is pressed. As a result, the AT9 address signal and the control signal are input to the memory of the actual computer 10 via the interface circuit 8 by the movement of the processor 2 in the debugging device 1, and the memory is read. The data obtained by reading is input to the debugging device 1 side via the data bus 14 of the actual computer and the interface circuit 8 of the debugging device 1, and is displayed on the display 4 via the display control circuit 6. In this way, the contents of any address in the memory of the actual controller 10 can be referenced from the debug device 1.

However, in the debugging device of the present invention, by setting the reference address 1 in the address register,
Thereafter, by simply pressing the request key, the memory contents of the real computer 10 indicated by the reference address value can be referenced any number of times.

That is, when referring to a new address as shown in FIG. 2, the request key is pressed after entering the new reference address value from the keyboard 5 in the address register (Start 1), but the value has already been set. Reference At9
When referring to the contents of the address 9 address that is the same as the address, the request key is immediately pressed without entering the reference address each time the reference is made (Start 2). When the request key is pressed, the presence or absence of a number entered from the keyboard is determined, and if there is a number entered, the entered data is stored in the address register, and the updated content value of the address register is stored. indicate. On the other hand, if the request key is pressed without a new number being entered, the contents of the address register are read and displayed without being updated.
In either case, the memory contents of the computer are read out using the address indicated by the content value of the address register, and the read data is displayed on the display.

In this way, the debugging device according to the present invention has the following features:
It is a good idea to set the reference address value only when making the first reference to the address register.If you refer to the same address from now on, there is no need to set the reference address value each time you refer to it, and key operations when debugging become easier. When the circuit is opened, it is no longer necessary for the radar to write down the reference Aviles or write it on a memo paper, making it possible to debug efficiently.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing the configuration of a debugging device according to an embodiment of the present invention, and FIG. 2 is a flowchart for explaining the operation of the debugging device shown in FIG. 1...debug device, 2...processor,
3...Memory, 4...Display, 5...
... Keyboard, 6 ... Display control circuit, 7 ... Key human control circuit, 8.
...Interface circuit, 9...System bus, 10...Actual computer, 11...
...Processor, 12...Control bus, 13...At9 address path, 14...
・Data bus. Patent applicant Tateishi Electric Co., Ltd. Agent Patent attorney Tatsuo Ito Agent Patent attorney Tetsuya Ito

Claims (1)

[Claims] A debug device that debugs a program by extracting address signals, data signals, and control signals from an actual computer user system, and the debug device includes an address register that stores a reference memory address, and an address register that stores at trace data. , a control means for referencing the memory of the actual computer at the address indicated by the contents of the address register, and a request key for activating the control means. When the memory address of the real computer is set by the means, the set address value is stored in the address register, and the address value is used to refer to the memory of the real computer when the request key is pressed. ,
1. A debugging device characterized in that when a request key is pressed without setting a memory address, the memory of an actual computer is referenced using an Ability value already stored in the address register.