JPS6034129B2 - memory controller - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a flexible disk (flexible disk).
sc, floppy disk
sc)), magnetic bubble device
It relates to data transfer between a sequential access memory device such as a BLE device and a computer.

In the above-mentioned memory device, data is stored in the order of consecutive addresses to form fixed length unit blocks, and the blocks are also arranged consecutively in the order of the addresses.
The memory is configured to be accessed sequentially in address order.

In order to read or write data to such a memory device, after accessing the desired first address once, the required length of data at consecutive addresses must be accessed all consecutively. Reading or writing is convenient because only one access is required. However, there is no memory control device that controls such a proposal or write when partially modifying the memory contents of a sequential access memory device. Hereinafter, the case of controlling a flexible disk device will be explained as an example.

In conventional systems, a computer specifies a track number of a flexible disk device and a sector number within that track, reads data stored in the specified sector, and inputs it into the computer. After performing desired data processing, the processed data is written again to the same sector. After inputting one sector of data into a computer and processing the data, in order to write to the original sector again, it is necessary to wait until the sector comes under the recording magnetic head, and this waiting time may be longer.

When processing a large amount of data, access one sector for reading, then access that sector for writing, then access the following sector for reading, then write to that sector. The user must repeat the operation of accessing the device to store the data, which lengthens the cumulative waiting time and increases the number of accesses, which has the disadvantage of affecting the lifespan of the device and disc sheet. This invention was made to eliminate the drawbacks of the conventional ones as described above, and is a memory control device that can reduce the number of accesses and update data stored in a flexible disk device at high speed. is intended to provide.

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the present invention, in which 1 is a computer, 11 is a computer interface, 2 is a computer instruction processing section, 3 is a memory device control section, 4 is a memory control section in the control device, and 5 is a computer interface. Memory section in the control device, 6 is a memory device, 6
1 is a memory device interface. It is assumed that the memory device 6 is a flexible disk device, the memory medium is a flexible disk sheet (hereinafter simply referred to as a sheet), and consecutive sectors within this sheet are assigned consecutive addresses.

Furthermore, the memory section 5 in the control device has a capacity to temporarily store data for one track on a sheet. FIG. 2 is an explanatory diagram showing the order of operation of the circuit in FIG. 1, and FIG.
A state is created in which one track worth of data in the memory device 6 is written into the memory section 5 through the processing of the computer instruction processing section 2 according to an instruction from the memory device 6 under the control of the memory device control section 3 and the memory control section 4 in the control device. show.

At this time, the sector address in the memory section 5 is the address specified by the computer 1. Figure 2b is calculator 1
This shows a state in which the memory control device issues an issue command and the memory control device transfers data at the initially specified address (n sectors) from the memory unit 5 to the computer. If the data in sector n is to be left as it is without any data processing, the computer 1 sends the next extraction command to the memory control unit in the control device via the computer instruction processing unit 2. Give to 4. This instruction increments the sector address (in
(crement), the n11 sector outside is addressed, and the state shown in FIG. If the data in the n+1 sector is data that requires data processing, the computer 1 issues a write command after performing the necessary data processing. In response to a write command, the sector address is not incremented and indicates sector n+1, resulting in the state shown in FIG. written to the sector.
The computer 1 repeats the above operations; in other words, the computer 1 simply issues a read command for sectors whose contents do not need to be changed, and reads the data retrieved by the read command for sectors whose contents should be changed. By issuing a write command after performing necessary data processing, data for one track can be updated.

Next, FIG. 2e shows a state in which one track's worth of data updated as described above and stored in the memory section 5 is written into a track of a sheet in the memory device 6.

If a write command is issued from the computer 1 to the memory unit 5 even once during data transmission between the computer 1 and the memory unit 5, writing to this sheet is performed after processing up to the last sector of the track is completed or in advance. This is performed when processing for a specified number of sectors is completed or when an instruction is received from the computer 1. If no write command has ever been issued from the computer 1 to the memory unit 5, it means that all data can remain as they were, so there is no need to perform the operation shown in FIG. 2e. Note that the time when the computer 1 writes to the memory unit 5 and the time when it is actually written to the memory device 6 do not match, so the memory control device constantly monitors the state of the memory device 6 and detects any abnormality. It has a function to convey that information to computer 1. As is clear from the above explanation, according to the present invention, when changing the contents of one track, the access to that track only needs to be made twice as shown in FIG. 2a and FIG. Doesn't require time.

Therefore, compared to conventional devices, the load on the disk sheet and disk drive device can be significantly reduced. Even when the data transfer speed between the computer 1 and the memory section 5 is slower than the transfer speed between the memory section 5 and the memory device 6,
With the device of the present invention, data can be transferred without causing data overruns or the like.

Further, the memory area required on the computer 1 side for this work can be reduced to the minimum necessary amount, for example, one sector. In the above embodiment, the unit of data stored in the memory section 5 in the control device is one track worth of data.
Although the data length processed by the computer 1 is set to one sector, the unit and data length can be set arbitrarily. Furthermore, the computer 1 shown in FIGS. 1 and 2 includes all devices capable of executing predetermined data processing. Furthermore, although a flexible disk device has been described as an example of the memory device 6, the device of the present invention can be similarly utilized in devices having a similar access mechanism, such as a magnetic bubble memory device. As described above, according to this invention, it is possible to transfer data to and from a sequential access memory device at high speed, and by reducing the frequency of use of the memory device and memory medium, it is possible to improve the lifespan, reliability, etc. In addition, the above-mentioned effect can be easily obtained without significantly changing the conventional interface between computers.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG. 2 is an explanatory diagram showing the order of operation of the circuit shown in FIG. 1... Computer, 2... Computer instruction processing unit, 3... Memory device control unit, 4...
Memory control unit in control device, 5...Memory unit, 6
...Memory device. In addition, in the figures, the same reference numerals indicate the same or equivalent parts. Figure 1 Figure 2

Claims (1)

[Claims] 1. A memory unit for temporarily storing information of a predetermined length having consecutive addresses, and a sequential access memory device that sequentially accesses information of consecutive addresses in address order. means for storing the information in the memory section; means for reading information at a desired address from among the information stored in the memory section, performing desired data processing by a computer, and then writing it into the address; and means for continuously writing information of the predetermined length in consecutive addresses of the sequential access memory device.