JP2001209577A - Information recording and reproducing device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an information recording and reproducing device with use of the cache method which permits the most efficient use of cache memory, irrespective of an access pattern transmitted from a host computer, in addition, a recording and reproducing controller, and a data recording and reproducing controller. SOLUTION: An information recording and reproducing device is divided into a data transfer controller which receives the write data transmitted from a host computer, and a plurality of segments, then there are provided a cache data memory which temporarily holds the write data received by the transfer controller, segment connection memory stored with connected information indicating the state of a logical connection of the segment, a buffer memory controller for managing the write data held by the cache data memory, and a recording and reproducing controller for recording the write data held by the cache data memory into a record medium, then the buffer memory controller updates the connected information in a manner to mary the logical connection state in the segment.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an information recording apparatus for temporarily increasing the speed of a recording / reproducing process by temporarily storing transfer data in a cache memory when transferring data between a host computer and a recording medium. It relates to a playback device.

[0002]

2. Description of the Related Art In an information recording / reproducing device such as an optical disk device used as an external storage device of a host computer, writing and reading of data to and from a recording medium is slower than a transfer speed with the host computer. For this reason, in recent years, a cache memory as a temporary data storage location is provided in an information recording / reproducing apparatus, and data is transferred via the cache memory, thereby speeding up a recording process and a reproducing process. Things are becoming more common.

In an information recording / reproducing apparatus having such a cache memory, when a data read request is issued from a host computer, the requested data is read from a recording medium and further data is read ahead. A so-called read-ahead cache is performed.

When a data write request is received from the host computer, a write completion response is returned to the host computer when the data to be written is stored in the cache memory, and then the data stored in the cache memory is transferred to the recording medium. A so-called write-back type cache in which writing is performed is performed.

[0005] Such an information recording / reproducing apparatus generally uses a ring buffer system in which a cache memory is used continuously and repeatedly, so that data is read from a single continuous area on a recording medium, and a single buffer is used. Although there is a cache effect for writing to consecutive areas, there is a problem that a sufficient cache effect cannot be obtained when accesses to a plurality of discontinuous areas on the recording medium occur alternately. Was.

In view of this, a method has been considered in which a cache memory is divided into a plurality of ring buffers and used. Such a cache system using a plurality of ring buffers, for example, in the case where two ring buffers are used, the effect of the cache even when accesses to two distant areas on the recording medium occur alternately. And the processing speed can be improved.

[0007]

However, when the cache memory is divided into a plurality of ring buffers, if the number of ring buffers is smaller than the number of non-contiguous areas on the recording medium being accessed, all of the Cannot correspond to the ring buffer, so that the effect of the cache is reduced. Conversely, when the number of ring buffers is larger than the number of discontinuous areas on the recording medium being accessed, unused ring buffers are generated, so that the cache memory cannot be used effectively. Therefore, in the cache method using a plurality of ring buffers, the number of the plurality of ring buffers, the size of each ring buffer, and the access pattern from the host computer (access to a single continuous area or a plurality of non-continuous areas) Access), there is a problem that a sufficient cache effect cannot be obtained.

[0008] The present invention has been made in view of this point,
It is an object of the present invention to provide an information recording / reproducing apparatus using a cache system which can effectively use a cache memory irrespective of an access pattern from a host computer.

[0009]

An information recording / reproducing apparatus according to the present invention comprises a data transfer controller for receiving write data transferred from a host computer, and a write data received by the transfer controller which is divided into a plurality of segments. A cache data memory for temporarily storing, a segment connection information memory for storing connection information indicating a logical connection state of the segment, and a buffer memory controller for managing the write data stored in the cache data memory. A recording and reproduction controller that records the write data held in the cache data memory on a recording medium,
The buffer memory controller updates the connection information to change the logical connection state of the segment, thereby achieving the object.

The buffer memory controller may change a used segment to the unused segment so as to secure a sufficient number of unused segments to process the write data. The memory controller may update the connection information so as to logically connect the unused segments.

[0011] The buffer memory controller may update the connection information so that the plurality of segments holding the write data having consecutive logical block addresses (LBA) are logically connected.

[0012] The recording / reproducing controller may collectively record the write data held in the plurality of logically connected segments and having the continuous logical block address (LBA) on the recording medium.

[0013] The segment connection information memory may store the connection information as a unidirectional list.

The segment connection information memory may store the connection information as a bidirectional list.

The information recording / reproducing apparatus may further include a cache management information memory for storing management information of the write data held in the cache data memory for each segment.

The management information includes a valid data flag that is set when valid data is stored in the segment, and unwritten data that has not yet been written to the recording medium in the segment. And a dirty flag that is set when there is an error.

At least two of the cache data memory, the segment connection information memory, and the cache management information memory may be configured as a single memory.

Another information recording / reproducing apparatus according to the present invention includes a data transfer controller for receiving a read request transferred from a host computer, a recording / reproducing controller for reading read data corresponding to the read request from the recording medium, and A cache data memory that is divided into segments and temporarily stores the read data reproduced by the recording and reproduction controller, a segment connection information memory that stores connection information indicating a logical connection state of the segment, A buffer memory controller that manages the read data held in the cache data memory, wherein the data transfer controller transfers the read data held in the cache data memory to the host computer, and Mori controller, the connection information is updated so as to change the logical connection state of the segments, the objective is achieved.

The plurality of segments may be configured such that the buffer memory controller changes a used segment to the unused segment so as to secure a sufficient number of unused segments to process the read data, The memory controller may update the connection information so as to logically connect the unused segments.

[0020] The segment connection information memory may store the connection information as a unidirectional list.

[0021] The segment connection information memory may store the connection information as a bidirectional list.

The information recording / reproducing apparatus may further include a cache management information memory for storing management information of the read data held in the cache data memory for each segment.

The management information includes a valid data flag that is set when valid data is stored in the segment, and unwritten data that has not yet been written to the recording medium in the segment. And a dirty flag that is set when there is an error.

At least two of the cache data memory, the segment connection information memory, and the cache management information memory may be configured as a single memory.

Still another information recording / reproducing apparatus according to the present invention includes a data transfer controller for receiving write data transferred from a host computer, and a data transfer controller which is divided into a plurality of segments and temporarily stores the write data received by the transfer controller. A segment data memory for storing segment information indicating the segment segmentation state; a segment connection information memory for storing connection information indicating the logical connection state of the segment; A buffer memory controller that manages the write data held in a memory; and a recording / reproducing controller that records the write data held in the cache data memory on a recording medium, wherein the buffer memory controller includes the segment memory. The split state and the division information to the changing the logical connection state and the connection information to update each said object is achieved by its.

In one embodiment of the invention, the plurality of segments have a size sufficient for the buffer memory controller to process one of the unused segments for the write data.
It may be divided into an unused segment and a second unused segment.

[0027] The buffer memory controller may update the connection information so that the plurality of segments holding the write data having consecutive logical block addresses (LBA) are logically connected.

[0028] The recording / reproducing controller may collectively record the write data held in the plurality of logically connected segments and having the continuous logical block address (LBA) on the recording medium.

[0029] The segment connection information memory may store the connection information as a unidirectional list.

[0030] The segment connection information memory may store the connection information as a bidirectional list.

[0031] The information recording / reproducing apparatus may further include a cache management information memory for storing management information of the write data held in the cache data memory for each of the segments.

The management information includes a valid data flag that is set when valid data is stored in the segment, and unwritten data that has not yet been written to the recording medium in the segment. And a dirty flag that is set when there is an error.

At least two of the cache data memory, the segment division information memory, the segment connection information memory, and the cache management information memory may be configured as a single memory.

Still another information recording / reproducing apparatus according to the present invention includes a data transfer controller for receiving a read request transferred from a host computer, a recording / reproducing controller for reading read data corresponding to the read request from the recording medium, A cache data memory that is divided into a plurality of segments and temporarily holds the read data reproduced by the recording and reproduction controller, a segment division information memory that stores division information indicating a division state of the segment, A segment connection information memory that stores connection information indicating a logical connection state; and a buffer memory controller that manages the read data held in the cache data memory. The read data held in memory is transferred to the host computer, and the buffer memory controller changes the division information and the connection information so as to change the division state and the logical connection state of the segment. Each is updated, thereby achieving the above object.

[0035] The plurality of segments may have a size sufficient for the buffer memory controller to process one of the unused segments for the read data.
It may be divided into an unused segment and a second unused segment.

[0036] The segment connection information memory may store the connection information as a unidirectional list.

[0037] The segment connection information memory may store the connection information as a bidirectional list.

[0038] The information recording / reproducing apparatus may further include a cache management information memory for storing management information of the read data held in the cache data memory for each of the segments.

The management information includes a valid data flag that is set when valid data is stored in the segment, and unwritten data that has not yet been written to the recording medium in the segment. And a dirty flag that is set when there is an error.

At least two of the cache data memory, the segment division information memory, the segment connection information memory, and the cache management information memory,
It may be configured as a single memory.

Still another information recording / reproducing apparatus according to the present invention comprises a data transfer controller for receiving write data transferred from a host computer, and a temporary storage for dividing the write data received by the transfer controller into a plurality of segments. A cache data memory, a segment connection information memory for storing connection information indicating a logical connection state of the segment, a buffer memory controller for managing the write data held in the cache data memory, and the cache A recording / playback controller that records the write data held in the data memory on a recording medium, wherein the buffer memory controller updates the connection information to change the logical connection state of the segment, writing The data includes repetition data that repeats the same data for a predetermined number of repetitions, and the recording / reproducing controller is configured to store the repetition number information indicating the number of repetitions and the connection information in the cache data memory based on the connection information. The write data is recorded on the recording medium, whereby the object is achieved.

[0042] The repetition number information may be stored in the segment connection information memory.

The cache data memory may hold only one of the same data among the repetition data.

The information recording / reproducing apparatus according to the present invention includes a segment connection information memory for storing segment connection information, and can logically change the segment connection state in the cache data memory.

[0045]

BEST MODE FOR CARRYING OUT THE INVENTION An information recording / reproducing apparatus according to an embodiment can divide a cache data memory into a plurality of segments and change the connection of the segments freely and dynamically. Therefore, it is possible to configure a plurality of ring buffers, increase the size of the ring buffer by adding a segment to the ring buffer, or reduce the size of the ring buffer by removing a segment from the ring buffer.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(Embodiment 1) FIG. 1 shows a configuration of an information recording / reproducing apparatus 100 according to Embodiment 1 of the present invention.
The information recording / reproducing apparatus 100 includes a data transfer controller 1
01, the cache data memory 102, the cache management information memory 103, and the segment connection information memory 1
04, a recording / reproducing controller 105, and a buffer memory controller 106. The data transfer controller 101 is connected to a host computer 108 via an interface cable 109, and is connected to a SCSI or ATA
(ATAPI) and the like to control command exchange and data transmission / reception (protocol control). The cache data memory 102 stores data to be recorded on the recording medium 107,
Alternatively, the data read from the recording medium 107 is temporarily stored. FIG. 2 shows an example of the cache data memory 102 composed of n segments 201. The cache data memory 102 stores a plurality of segments 20
1

The cache management information memory 103 stores information related to data stored in the segments 201 for each segment 201. As shown in FIG. 3, the cache management information memory 103 stores a valid data flag 301 and a dirty flag 302 for each segment.
And logical block address (LBA) information 303 are stored. The valid data flag 301 is set when valid data exists in the segment. The dirty flag 302 is set when unwritten data that has not been written to the recording medium 107 exists in the segment. The logical block address (LBA) information 303 indicates which logical block address (LBA) on the recording medium 107 stores the data corresponding to the segment.

FIG. 4 shows the segment connection information memory 104.
Is a configuration example when is configured as a unidirectional list. FIG.
Shows a configuration example when the segment connection information memory 104 is configured by a bidirectional list. The segment connection information memory 104 stores connection information of each segment 201 of the cache data memory 102. The segment connection information memory 104 can be configured using, for example, a unidirectional list or a bidirectional list. Segment connection information memory 104
The advantage of having a unidirectional list is that segment 2
01 can reduce the size of the storage area required to store the connection information. On the other hand, an advantage of configuring the segment connection information memory 104 with a bidirectional list is that when the connection information of the segment 201 is changed, processing for removing the specified segment becomes easy, in particular.

FIG. 6 shows an operation example of updating the connection information of the segment and removing the designated segment. Referring to FIG. 6, the process of removing the designated segment when the segment connection information memory 104 is configured using the bidirectional list is performed by connecting the segment 1, the segment 5, the segment 2, the segment 4, and the segment 3 in this order. The case where the segment 5 is removed from the ring buffer from the state where the ring buffer is formed will be described as an example.

Referring to FIG. 6, first, number 1 is obtained by referring to the previous segment number of segment 5, and the next segment number of segment 1 is changed from number 5 to number 2 which is the next segment number of segment 5. change. Subsequently, the number 2 is obtained by referring to the next segment number of the segment 5, and the previous segment number of the segment 2 is changed from the number 5 to the number 1 which is the previous segment number of the segment 5. Now segment 5 from the ring buffer
Is removed, and the segment 1, segment 2, segment 4, and segment 3 become a ring buffer connected in this order.

The previous segment of segment n is Prev
(N), the next segment after segment n is Next (n)
In general, the process of removing the segment p is represented by N
Next (p) is stored in ext (Prev (p)),
The processing is to store Prev (p) in Prev (Next (p)). The processing for inserting the segment q after the segment p is performed by adding Ne to Next (q).
xt (p), p in Prev (q), N
The procedure is to store q in ext (p). However,
n, p and q are natural numbers.

Referring again to FIG. 1, the recording / reproducing controller 105 stores the data read from the recording medium 107 in the cache data memory 102, and stores the data stored in the cache data memory 102 in the recording medium 10
Write to 7. Buffer memory controller 10
Reference numeral 6 includes, for example, a central processing unit and manages cache data.

FIG. 7 is a flowchart showing a read process of the information recording / reproduction 100 according to the first embodiment. The operation of the information recording / reproducing 100 when a read request is issued from the host computer 108 will be described with reference to the flowchart of FIG.

In step S701, the buffer memory controller 106 determines whether there is an unprocessed remaining block in response to a read request from the host computer 108.
The processing after 702 is performed. If there is no unprocessed remaining block, the read processing ends.

In step S702, the cache data memory 10 is referenced with reference to the cache management information memory 103.
It is determined whether the data of the logical block address (LBA) requested by the host computer 108 exists in the cache data memory 102, and if the corresponding data exists in the cache data memory 102, the process proceeds to step S703, where the data transfer controller 101 Stores the relevant data in the cache data memory 102 into the host computer 1
08. Thereafter, the process proceeds to step S709.

On the other hand, if it is determined in step S702 that there is no data of the logical block address (LBA) requested by the host computer 108 in the cache data memory 102, the number of blocks read from the recording medium 107 is determined in step S704. calculate. The number of blocks to be read is the sum of the number of blocks requested from the host computer 108 and the number of blocks to be read ahead (read ahead). After calculating the number of blocks to be read, the process proceeds to step S705.

In step S705, step S704
It is determined whether there is enough unused segment 201 in the cache data memory 102 to process the data of the number of blocks to be read obtained in step (1). This determination is made by referring to the valid data flag 301 of the cache management information memory 103. That is, valid data flag 3
A segment in which 01 is not set is an unused segment.

If there is not enough unused segments 201 in step S705, the process proceeds to step S706, where the used segments are changed to unused segments, and sufficient unused segments are secured. The selection of an in-use segment to be changed to an unused segment may be performed, for example, in the order of the oldest segment at the time when the valid data flag 301 is set, or by prioritizing the segment in which the dirty flag 302 is not set. Perform in ascending order. When a used segment to be changed to an unused segment is determined, the cache management information corresponding to the segment in the cache management information memory 103 is referred to. If the dirty flag 302 is not set, the valid data flag 301 is set. Reset and change to an unused segment. Dirty flag 302
Is set, the data of the segment is written to the recording medium 107, and then the dirty flag 302 is written.
And the valid data flag 301 are reset to change to an unused segment.

If it is determined in step S705 that there is a sufficient unused segment, or if a sufficient unused segment can be secured in step S706, the flow advances to step S707 to update the contents of the segment connection information memory 104, Logically connect those unused segments. Thereafter, the process proceeds to step S708.

In step S708, data is read from the recording medium 107 to the unused segment connected in step S707 using the recording / reproducing controller 105, and the cache management information corresponding to the segment in the cache management information memory 103 is stored. Update. That is, the valid data flag 301 of the cache management information
Is set, and which logical block address (LBA) data of the recording medium 107 is read is stored in the logical block address (LBA) information 303 of the cache management information. If the data read from the recording medium 107 is data of a block requested by the host computer 108, the data transfer controller 101 simultaneously transfers the data to the host computer 108.

Step S703 or step S
When the processing of step 708 is completed, the process proceeds to step S709, where the number of remaining blocks to be processed and the logical block address (LBA) to be processed next are updated, and the process returns to step S701. When these processes are repeated and the number of remaining blocks becomes 0 and the read process is completed, the data transfer controller 1
01 notifies the host computer 108 of the end of the processing.

Next, the operation when a write request is issued from the host computer 108 will be described with reference to the flowchart of FIG.

In step S801, it is determined whether there is an unprocessed remaining block in response to a write request from the host computer 108, and if there is an unprocessed remaining block, the process from step S802 is performed. If there is no unprocessed remaining block, the write processing ends.

In step S802, the cache data memory 10 is referenced with reference to the cache management information memory 103.
It is determined whether the data of the logical block address (LBA) requested by the host computer 108 exists in the cache data memory 2. If the corresponding data exists in the cache data memory 102, the process proceeds to step S 806.

If it is determined in step S802 that there is no data of the logical block address (LBA) requested by the host computer 108 in the cache data memory 102, the number of blocks requested by the host computer 108 is determined in step S803. It is determined whether there are enough unused segments 201 in the cache data memory 102 to process the data. This determination method is the same as that in step S705 of the read processing.

If there is not enough unused segments 201 in step S803, the process proceeds to step S804, and the used segments are changed to unused segments to secure sufficient unused segments. This process is the same as step S706 of the read process.

If it is determined in step S803 that there are sufficient unused segments, or if sufficient unused segments can be secured in step S804, the flow advances to step S805 to update the contents of the segment connection information memory 104, and Connect unused segments. Thereafter, the process proceeds to step S806.

In step S806, the data transfer controller 101 transfers data from the host computer 108 to the cache data memory 102. The transfer destination segment in the cache data memory 102 at this time is determined when the data of the logical block address (LBA) requested by the host computer 108 is found in the cache data memory 102 in step S802 (S802). YES), it becomes the segment in which the data is stored. If it is determined in step S802 that there is no data of the logical block address (LBA) requested by the host computer 108 in the cache data memory 102 (NO in S802), the transfer destination segment is the segment connected in step S805. Becomes When the data transfer from the host computer 108 to the cache data memory 102 is completed, the information in the cache management information memory 103 is updated. That is, the valid data flag 301 and the dirty flag 302 of the cache management information are set, and the logical block address (LBA) transferred from the host computer 108 is set.
Is stored in the logical block address (LBA) information 303. When these processes are completed, the process advances to step S807.

In step S807, the number of remaining blocks to be processed and the logical block address (LB) to be processed next
A), and returns to step S801. When these processes are repeated and the number of remaining blocks becomes 0 and the write process is completed, the end of the process is notified to the host computer 108 and the data transferred to the cache data memory 102 during the idle time of the process is used as the recording medium 107.
, That is, data of the segment 201 in which the dirty flag 302 is set, is written to the recording medium 107.

Here, a specific operation example in the first embodiment will be described. Referring to FIG. 9, consider a case where cache data memory 102 is divided into eight segments each having a size capable of holding 16 blocks of data per segment.

Five write requests from host computer 108 (3 from logical block address (LBA) = 0)
2 blocks, logical block address (LBA) = 200
Block, logical block address (LBA) from
= 32 blocks from 32, logical block address (L
When (BA) = 500 and 16 blocks from the logical block address (LBA) = 64) are received, the cache data memory 102 stores data requested to be written by the host computer 108 as shown in FIG. Is stored.

As shown in FIG. 10, after that, the contents of the segment connection information memory 104 are updated, and the logical block address (LBA) = 0 stored in the segment of the segment number 1 and the segment of the segment number 2 is updated. 32 blocks from the logical block address (LBA) = 32 stored in the segment with segment number 4 and the segment with segment number 5 and the logical block address (LBA) stored in the segment with segment number 7 = 32 The 16 blocks from 64 are connected to the data of 80 blocks (= 32 blocks + 32 blocks + 16 blocks) from logical block address (LBA) = 0. Recording / playback controller 105
Writes 80 blocks of data from the logical block address (LBA) = 0 to the recording medium 107 continuously.
The recording / reproducing controller 105 controls the logical block address (LBA) stored in the segment of segment number 3
Also, 16 blocks of data from the logical block address (LBA) = 500 stored in the segment with the segment number 6 are written to the recording medium 107.

As described above, the logical block address (LB)
Even in the case where continuous data of A) is divided and transferred from the host computer 108, after storing the transferred data in an unused segment, the connection state of the segment is dynamically changed to change the logical block address ( LB
By making the continuous data of A) logically connected, it is possible to perform a recording operation that makes the best use of the cache data memory 102.

In the first embodiment, the cache data memory 102, the cache management information memory 103, and the segment connection information memory 104 have been described as separate memories, but the present invention is not limited to this. Cache data memory 102 and cache data management information memory 1
03 and the segment connection information memory 104 may be configured as a single memory.

(Embodiment 2) FIG. 11 shows a configuration of an information recording / reproducing apparatus 1100 according to Embodiment 2 of the present invention. The information recording / reproducing apparatus 1100 includes a data transfer controller 101, a cache data memory 102, a cache management information memory 103, a segment connection information memory 104, a recording / reproducing controller 105, a buffer memory controller 106, and a segment division information memory 1104. including. The difference between the first embodiment and the information recording / reproducing apparatus 100 described above with reference to FIG. 1 is that a segment division information memory 1104 is included. The same components as those of the information recording / reproducing apparatus 100 of the first embodiment are denoted by the same reference numerals. A detailed description of these components will be omitted.

The cache data memory 102 stores data to be recorded on the recording medium 107 or
And temporarily stores the data read from. Cache data memory 102 may be divided into a plurality of different sized segments.

FIG. 12 shows the segment division information memory 11.
04 shows the contents of the segment division information. The segment division information memory 1104 has a cache data memory 1
02, segment division information 1201 indicating the segment division state is stored for each segment. The segment division information 1201 includes a buffer address 1202 and a segment size 1203. The segment division state is dynamically changed by the buffer memory controller 106 based on a read request and a write request from the host computer 108.

Referring to the flowchart shown in FIG.
The operation when a read request is made from the host computer 108 will be described. The flowchart in FIG. 13 is different from the flowchart in FIG. 7 for explaining the operation when a read request is made in the first embodiment and the step S1307.
Are the same as those in the flowchart of FIG. Therefore, only the processing content of step S1307 will be described.

In step S 1307, first, the buffer memory controller 106 determines an unused segment such that when the data of the number of blocks to be read calculated in step S 704 is stored, all the segments are not filled with data and free space is available. It is divided into a part where data is satisfied and a part where data is not satisfied. For example, when storing 32 blocks of data for an unused segment that can store 80 blocks of data, 32
Unused segments are divided into segments that can store data for blocks and segments that can store data for 48 blocks. The segment division processing is performed by updating the contents of the segment division information memory 1104. After that, the contents of the segment connection information memory 104 are updated, an unused segment is connected, and the process proceeds to step S708.

Referring to the flowchart shown in FIG.
The operation when a write request is made from the host computer 108 will be described. The flowchart of FIG. 14 is different from the flowchart of FIG. 8 for explaining the operation when a write request is made in the first embodiment and step S1405.
Are different from those in the flowchart of FIG. Therefore, only the processing content of step S1405 will be described.

In step S 1405, first, when the data to be transferred from the host computer 108 is stored in the cache data memory 102, the unused segments that are not completely filled with the data but can be vacated are replaced with the data-filled portions. Is divided into parts where is not satisfied. The segment division processing is performed by updating the contents of the segment division information memory 1104. Thereafter, the contents of the segment connection information memory 104 are updated to connect an unused segment, and step S8 is performed.
Proceed to 06.

Here, a specific operation example of the information recording / reproducing apparatus 1100 according to the second embodiment will be described. FIG.
9 shows an example of storing data in the cache data memory 102 at the time of a write operation in the second embodiment.

First, it is assumed that the entire cache data memory 102 is one unused segment (segment number 1) as an initial state. Then, five write requests from the host computer 108 (that is, logical block address (LBA) = 0 to 32 blocks, logical block address (LBA) = 200 to 16 blocks, logical block address (LBA) = 32 to 32 blocks, logical Block address (LBA) = 500 to 16 blocks and logical block address (LBA) = 64 to 16
Block) is received. At this time,
The segment division information in the segment division information memory 1104 and the contents of data in the segment change as shown in FIG.

Referring to FIG. 15, first, when a write request for data of 32 blocks from logical block address (LBA) = 0 is transferred from host computer 108,
The segment of segment number 1 is divided into a segment of segment number 1 and a segment of segment number 2. Data of 32 blocks from logical block address (LBA) = 0 is stored in the segment of segment number 1. Next, logical block address (LBA) = 2
When a write request for data of 00 to 16 blocks is transferred from the host computer 108, the segment number 2
Is divided into a segment of segment number 2 and a segment of segment number 3. Data of 16 blocks from logical block address (LBA) = 200 is stored in the segment of segment number 2.

Further, a logical block address (LBA)
When a write request for data of = 32 to 32 blocks is transferred from the host computer 108, the segment of segment number 3 is divided into a segment of segment number 3 and a segment of segment number 4. Data of logical block address (LBA) = 32 to 32 blocks are stored in the segment of segment number 3. When a write request for data of 16 blocks from logical block address (LBA) = 500 is transferred from the host computer 108, the segment of segment number 4 is divided into a segment of segment number 4 and a segment of segment number 5. Logical block address (LB
A) = 500 to 16 blocks of data are stored in the segment with segment number 4. When a write request for data of logical block address (LBA) = 64 to 16 blocks is transferred from the host computer 108, the segment of segment number 5 is divided into a segment of segment number 5 and a segment of segment number 6. Logical block address (LBA) = 64 to 16 blocks of data are stored in the segment with segment number 5.

As shown in FIG. 16, the segment connection information in the segment connection information memory 104 is updated so that the segment of the segment number 1, the segment of the segment number 3 and the segment of the segment number 5 are connected. The recording / reproduction controller 105 continuously writes 80 blocks of data from the logical block address (LBA) = 0 to the recording medium 107. That is, the recording / reproduction controller 105 sets the logical block address (LBA) stored in the segment of the segment number 1 to 0 to 32.
Block data, logical block address (LBA) stored in segment number 3 = 32 to 3
Logical block address (LBA) stored in the data of 2 blocks and the segment of segment number 5 = 64
To 16 blocks of data are continuously written to the recording medium 107.

The recording / reproducing controller 105 calculates the 16-block data from the logical block address (LBA) = 200 stored in the segment of the segment number 2 and the logical block address (LBA) = 500 stored in the segment of the segment number 4 Is also written to the recording medium 107.

As described above, in the second embodiment, data transferred by one write request from host computer 108 can be managed as a single segment, and the process of updating segment connection information can be simplified. There is an advantage.

In the second embodiment, the cache data memory 102 and the cache data management information memory 10
3, the segment connection information memory 104 and the segment division information memory 1104 have been described as separate memories.
The present invention is not limited to this. At least two of the cache data memory 102, the cache data management information memory 103, the segment connection information memory 104, and the segment division information memory 1104 may be configured as a single memory.

(Embodiment 3) FIG. 17 shows Embodiment 3 of the present invention.
9 is a flowchart showing an operation of a write process in FIG. The information recording / reproducing device according to the third embodiment is the same as information recording / reproducing device 100 according to the first embodiment. The third embodiment is different from the first embodiment in that the write process is executed using the segment repetition count information.

Referring to FIG. 17, data to be described later with reference to FIG. 18 is stored in cache data memory 102 in S1701. In step S1702, segment connection information is set in the segment connection information memory 104, and segment repetition count information is set in the segment connection information memory 104. In step S1703, the data in the cache data memory 102 is recorded on the recording medium 107 based on the segment connection information set in the segment connection information memory 104 and the segment repetition number information set in the segment connection information memory 104.

FIG. 18 is an explanatory diagram of an example of data recorded on a recording medium according to the third embodiment. In FIG. 18, the data of the five blocks represented by A are all the same, and the data of the three blocks represented by B are all the same.

FIG. 19 shows an example of the contents of cache data memory 102 during a write operation in the third embodiment. As shown in FIG. 19, the cache data memory 102 stores data represented by A for one block and data represented by B for one block.

FIG. 20 shows an example of segment connection during a write operation in the third embodiment. As shown in FIG. 20, the number of repetitions of the segment of segment number 1 is 5
And the number of repetitions of the segment with the segment number 2 is set to 3. The number of repetitions of each segment is set in the segment connection information memory 104 as shown in FIGS. The number of repetitions of each segment may be set in the cache management information memory 103. The segment connection state is set in the segment connection information memory 104 so that the segment following the segment with the segment number 1 becomes the segment with the segment number 2.

When the above setting is completed, the recording medium 107
Start recording to. Segment connection information memory 104
After the segment data of segment number 1 (data represented by A) is repeatedly recorded five times based on the segment repetition number information and the segment connection information set in, the segment data of segment number 2 is recorded. (Data represented by B) is recorded three times.

As described above, according to the third embodiment, there is no need to store a plurality of the same data in cache data memory 102, so that cache data memory 10
2 can be used effectively.

[0098]

As described above, according to the present invention, in an information recording / reproducing system using a cache memory, a cache area is divided into a plurality of segments, and connections of the divided segments are dynamically changed. It is possible to provide an information recording / reproducing apparatus using a cache method that can effectively use a cache memory irrespective of an access pattern from a host computer.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of an information recording / reproducing apparatus according to Embodiment 1 of the present invention.

FIG. 2 is a diagram showing segment division of a cache data memory according to the first embodiment of the present invention;

FIG. 3 is a diagram showing contents of each cache management information in a cache management information memory according to the first embodiment of the present invention;

FIG. 4 is a diagram showing an example in which the segment connection information memory according to the first embodiment of the present invention is configured by a unidirectional list;

FIG. 5 is a diagram showing an example in which the segment connection information memory according to the first embodiment of the present invention is configured by a bidirectional list;

FIG. 6 is a diagram showing an operation example of updating connection information of a segment and removing a specified segment according to the first embodiment of the present invention;

FIG. 7 is a flowchart showing an operation of a read process according to the first embodiment of the present invention;

FIG. 8 is a flowchart showing an operation of a write process according to the first embodiment of the present invention;

FIG. 9 is a diagram showing an example of the contents of a cache data memory during a write operation according to the first embodiment of the present invention;

FIG. 10 is a diagram showing an example of segment connection during a write operation according to the first embodiment of the present invention;

FIG. 11 is a block diagram showing a configuration of a second embodiment of the present invention.

FIG. 12 is a diagram showing contents of each segment division information in a segment division information memory according to the second embodiment of the present invention;

FIG. 13 is a flowchart illustrating an operation of a read process according to the second embodiment of the present invention;

FIG. 14 is a flowchart illustrating an operation of a write process according to the second embodiment of the present invention;

FIG. 15 is a diagram showing an example of data storage in a cache data memory during a write operation according to the second embodiment of the present invention;

FIG. 16 is a diagram showing an example of segment connection during a write operation according to the second embodiment of the present invention;

FIG. 17 is a flowchart illustrating an operation of a write process according to the third embodiment of the present invention;

FIG. 18 is an explanatory diagram of an example of data recorded on a recording medium according to Embodiment 3 of the present invention.

FIG. 19 is a diagram showing an example of the contents of a cache data memory during a write operation according to the third embodiment of the present invention;

FIG. 20 is a diagram showing an example of segment connection during a write operation according to the third embodiment of the present invention.

FIG. 21 is a diagram showing an example in which a segment connection information memory according to Embodiment 3 of the present invention is configured by a unidirectional list;

FIG. 22 is a diagram showing an example in which a segment connection information memory according to the third embodiment of the present invention is configured by a bidirectional list;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 101 Data transfer controller 102 Cache data memory 103 Cache management information memory 104 Segment connection information memory 105 Recording / playback controller 106 Buffer memory controller 107 Recording medium 1104 Segment division information memory

Claims (35)

[Claims] A data transfer controller that receives write data transferred from a host computer; a cache data memory that is divided into a plurality of segments and temporarily holds the write data received by the transfer controller; A segment connection information memory for storing connection information indicating a logical connection state; a buffer memory controller for managing the write data held in the cache data memory; and a record of the write data held in the cache data memory An information recording / reproducing apparatus, comprising: a recording / reproducing controller for recording on a medium; wherein the buffer memory controller updates the connection information so as to change the logical connection state of the segment. 2. The buffer memory controller changes a used segment to the unused segment so as to secure a sufficient number of unused segments to process the write data. The information recording / reproducing apparatus according to claim 1, wherein the connection information is updated so as to logically connect the unused segments. 3. The buffer memory controller according to claim 1, wherein the connection information is updated so that the plurality of segments holding the write data having consecutive logical block addresses (LBA) are logically connected. Information recording and reproducing device. 4. The recording / reproduction controller, wherein the write data held in the plurality of logically connected segments and having the continuous logical block address (LBA) is collectively recorded on the recording medium. 3. The information recording / reproducing apparatus according to 3. 5. The information recording / reproducing apparatus according to claim 1, wherein the segment connection information memory stores the connection information as a unidirectional list. 6. The information recording / reproducing apparatus according to claim 1, wherein the segment connection information memory stores the connection information as a bidirectional list. 7. The information recording / reproducing apparatus according to claim 1, wherein the information recording / reproducing apparatus further comprises a cache management information memory for storing management information of the write data held in the cache data memory for each of the segments. 8. The management information includes a valid data flag that is set when valid data is stored in the segment, and unwritten data that has not yet been written to the recording medium in the segment. The information recording / reproducing apparatus according to claim 7, further comprising: a dirty flag set when the information is set. 9. The information recording / reproducing apparatus according to claim 1, wherein at least two of the cache data memory, the segment connection information memory, and the cache management information memory are configured as a single memory. 10. A data transfer controller for receiving a read request transferred from a host computer; a recording / reproducing controller for reading read data corresponding to the read request from the recording medium; A cache data memory for temporarily storing the read data reproduced by the above, a segment connection information memory for storing connection information indicating a logical connection state of the segment, and the read data stored in the cache data memory A buffer memory controller that manages the data transfer controller, wherein the data transfer controller transfers the read data held in the cache data memory to the host computer; An information recording / reproducing apparatus that updates the connection information so as to change a logical connection state of the connection. 11. The buffer memory controller according to claim 11,
The used segments are changed to the unused segments so as to secure a sufficient number of unused segments to process the read data, and the buffer memory controller logically connects the unused segments. The information recording / reproducing apparatus according to claim 10, wherein the connection information is updated in advance. 12. The segment connection information memory stores the connection information as a unidirectional list.
An information recording / reproducing device according to the above. 13. The segment connection information memory stores the connection information as a bidirectional list.
An information recording / reproducing device according to the above. 14. The information recording / reproducing apparatus according to claim 10, wherein the information recording / reproducing apparatus further comprises a cache management information memory for storing management information of the read data held in the cache data memory for each of the segments. 15. The management information includes a valid data flag that is set when valid data is stored in the segment, and unwritten data that has not yet been written to the recording medium in the segment. 15. The information recording / reproducing apparatus according to claim 14, further comprising: a dirty flag set when the information is set. 16. The information recording / reproducing apparatus according to claim 10, wherein at least two of the cache data memory, the segment connection information memory, and the cache management information memory are configured as a single memory. 17. A data transfer controller that receives write data transferred from a host computer, a cache data memory that is divided into a plurality of segments and temporarily holds the write data received by the transfer controller, A segment division information memory that stores division information indicating a division state; a segment connection information memory that stores connection information that indicates a logical connection state of the segment; and manages the write data held in the cache data memory. A buffer memory controller; and a recording / reproducing controller for recording the write data held in the cache data memory on a recording medium, wherein the buffer memory controller is configured to divide the segment and the logical connection state of the segment. An information recording / reproducing apparatus that updates the division information and the connection information so as to change the state. 18. The buffer memory controller according to claim 18,
A first unused segment having a size sufficient to process one of the unused segments into the write data;
18. The information recording / reproducing apparatus according to claim 17, wherein the information is divided into a second unused segment. 19. The buffer memory controller,
The information recording / reproducing apparatus according to claim 17, wherein the connection information is updated so that the plurality of segments holding the write data having consecutive logical block addresses (LBA) are logically connected. 20. The recording / reproducing controller, wherein the write data held in the plurality of logically connected segments and having the continuous logical block address (LBA) is collectively recorded on the recording medium. 19
An information recording / reproducing device according to the above. 21. The segment connection information memory stores the connection information as a unidirectional list.
An information recording / reproducing device according to the above. 22. The segment connection information memory stores the connection information as a bidirectional list.
An information recording / reproducing device according to the above. 23. The information recording / reproducing apparatus according to claim 17, wherein the information recording / reproducing apparatus further comprises a cache management information memory for storing management information of the write data held in the cache data memory for each of the segments. 24. The management information includes a valid data flag that is set when valid data is stored in the segment, and unwritten data that has not yet been written to the recording medium in the segment. 24. The information recording / reproducing apparatus according to claim 23, further comprising: a dirty flag set when the information is set. 25. At least two of the cache data memory, the segment division information memory, the segment connection information memory, and the cache management information memory,
The information recording / reproducing apparatus according to claim 17, wherein the information recording / reproducing apparatus is configured as a single memory. 26. A data transfer controller for receiving a read request transferred from a host computer, a read / write controller for reading read data corresponding to the read request from the recording medium, and a read / write controller divided into a plurality of segments. A cache data memory for temporarily storing the read data reproduced by the above, a segment division information memory for storing division information indicating the division state of the segment, and a connection information indicating a logical connection state of the segment. A segment connection information memory, and a buffer memory controller that manages the read data held in the cache data memory. The data transfer controller stores the read data held in the cache data memory. To the host computer, wherein the buffer memory controller updates the division information and the connection information so as to change the division state and the logical connection state of the segment, respectively. 27. The buffer memory controller,
A first unused segment having a size sufficient to process one of the unused segments into the read data;
27. The information recording / reproducing apparatus according to claim 26, wherein the information is divided into a second unused segment. 28. The segment connection information memory stores the connection information as a unidirectional list.
An information recording / reproducing device according to the above. 29. The segment connection information memory stores the connection information as a bidirectional list.
An information recording / reproducing device according to the above. 30. The information recording / reproducing apparatus according to claim 26, wherein the information recording / reproducing apparatus further comprises a cache management information memory for storing management information of the read data held in the cache data memory for each of the segments. 31. The management information includes a valid data flag that is set when valid data is stored in the segment, and unwritten data that has not yet been written to the recording medium in the segment. 31. The information recording / reproducing apparatus according to claim 30, further comprising: a dirty flag set when the information is set. 32. The information recording according to claim 26, wherein at least two of the cache data memory, the segment division information memory, the segment connection information memory, and the cache management information memory are configured as a single memory. Playback device. 33. A data transfer controller that receives write data transferred from a host computer, a cache data memory that is divided into a plurality of segments and temporarily holds the write data received by the transfer controller, A segment connection information memory for storing connection information indicating a logical connection state; a buffer memory controller for managing the write data held in the cache data memory; and a record of the write data held in the cache data memory A recording / reproducing controller for recording on a medium, wherein the buffer memory controller updates the connection information so as to change the logical connection state of the segment, and the write data repeats the same data in a predetermined manner Return Information for recording the write data held in the cache data memory on the recording medium based on the repetition number information indicating the repetition number and the connection information. Recording and playback device. 34. The information recording / reproducing apparatus according to claim 33, wherein the repetition number information is stored in the segment connection information memory. 35. The information recording / reproducing apparatus according to claim 33, wherein the cache data memory holds only one of the repeated data items.