JPS6034074B2 - External regulation electronic clock - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an externally regulated electronic timepiece having a function of automatically adjusting the time of the timepiece.

Conventionally, the following methods have been used to automatically adjust the time on a clock.

'a} Operate the master clock (standard clock) at an arbitrary time to enter the transmitting state.

'b} Insert the slave clock into the loop antenna of the master clock.

．． {c) The slave clock receives a time adjustment signal from the master clock.

(d} Correct the slave clock. 'e- Automatically cancel the transmission status of the master clock.

However, although this conventional method does not require any operations on the slave clock side, it does require the effort of approaching the master clock to adjust the time, as described above (a) operating the master clock, {b} inserting it into the loop antenna. However, it cannot be said that the correction is completely automatic.The present invention was made to eliminate the above-mentioned drawbacks of the conventional system, and the correction is made unconsciously without any operation on the master clock side. However, the purpose of the present invention is to minimize the increase in power consumption due to the addition of a correction function.In other words, the present invention has a system in which a master clock, which can be called a standard clock, always sends a time correction signal at regular time intervals. The slave clock operates its receiving circuit for only a few seconds at the same time interval, and automatically adjusts when it comes within the distance range where the time adjustment signal of the master clock can be received. The circuit is configured to have a longer downtime than the receiving circuit downtime before modification.An embodiment of the present invention will be described below with reference to the drawings.
FIG. 1 is a block diagram of the slave clock of the present invention. A receiving section 1 is connected to a frequency dividing section 2, and a signal from the frequency dividing section is sent to a counter 3 and a synchronous clock section 9. The counter 3 is connected to the decoder and driver 4, and at the same time to the timer 1 12 and the timer 13. The decoder and driver are connected to the display section 5. It is connected to the timer 1 and the timer power supply control section 14. The power supply control section is connected to a receiving circuit and a waveform shaping section, the receiving antenna 6 is connected to a receiving circuit 7, and further connected to a waveform shaping section 8. From the waveform shaping section, a synchronization clock section 9 and a signal detection section 1 are connected. get shot. A synchronous clock section is also connected to the signal detection section, the signal detection section is connected to a correction control section 11, and the correction control section is connected to a counter 3 and a timer 13. Next, the operation shown in FIG. 1 will be explained.

First, the signal obtained by the receiving section 1 is frequency-divided by the frequency dividing section 2, and the divided signal is counted by the counter 3.
This is converted into a signal such as seconds, converted by a decoder and driver 4, and sent to the display section 5 to display the time. The signal received by the receiving antenna 6 and the receiving circuit 7 passes through the waveform shaping section 8 and then is sent to the signal detecting section 10.

) At this time, it is also sent to the synchronous clock section 9 at the same time.
Here, signal detection is synchronized. A frequency divided signal of an appropriate frequency is sent from the frequency dividing section to the synchronous clock section 9.

The correction signal detected at 10 is extracted by a correction control section 11, and sent to the outside of the counter 3 to correct the hours, minutes, seconds, etc.

The 12 timer 1 is connected to the 14 power supply control section to operate the receiving circuit 7 and the waveform shaping section 8 for a fixed period of time (for example, 3 seconds) at fixed intervals (for example, 30 minutes).

Timer 13 0' This is to measure the rest time of the receiving circuit after the time of the child's clock is adjusted.In addition to the hours, minutes, and seconds signals from the counter 3, it is connected to the correction control section 11, and is connected to the correction control section 11. A signal indicating that the timer has changed is sent from the correction control section to the timer, and the signal from the correction control section starts operation.

The power supply control unit 14 determines whether to operate the reception circuit 7 and the waveform shaping unit 8, and the control is performed by the power supply control unit 12.
According to the timer of Tire-1 and 13.

FIG. 2 is a block diagram of a master clock that is to become a standard clock.

The clock section 15 is connected to a display section 16, a timer 17, and a correction signal generating section 18. The timer 17 is connected to a modified signal generator 18, and the modified signal generator 18 is connected to a transmitter 22. The transmitting section 22 is connected to the display section 16 and the transmitting antenna 23. Next, the operation shown in FIG. 2 will be explained.

Since the clock section No. 15 is required to be accurate as a standard clock, the clock is adjusted at least once a day by, for example, a radio time signal.

The display section 16 shows the time and signal transmission status.

The timer 17 is used to control the transmission of a time correction signal for a certain period of time (for example, 6 minutes) at a certain time interval (for example, 30 minutes), and is connected to the correction signal generation section 18. .

The timer 17 and the correction signal generator 18 take out the control clock 19 from the time section.

A correction signal generating section 18 generates a time correction signal from the time data 20 and a carrier signal 21, and sends it to a transmitting section 22.

The transmitting unit 22 transmits the time adjustment signal and at the same time displays the fact that it has been transmitted on the display unit 16 using an LED or the like.

FIG. 3 is a diagram showing an example of the operation of the above-mentioned master clock and slave clock, and 24 shows a state in which a time adjustment signal is being transmitted from the master clock.

25 indicates that the receiving section of the child clock is in operation.

Reference numerals 26 and 27 indicate the flow of time adjustment signals when the slave clock approaches within a distance range where it can receive the time adjustment signal from the master clock.

28 is a rest period of the receiving circuit.

Next, the operation will be explained.

The master clock transmits a signal for a fixed period of time (6 minutes in this example) at fixed time intervals (30 minutes in this example). Here, using sand with a signal transmission time of 6 as an example,
This is because, if both the master clock and the slave clock are quartz clocks, it is considered that, given the accuracy of current quartz clocks, a time adjustment signal can be sufficiently received at this time interval.
On the other hand, the receiving section of the child clock operates for a fixed period (3 seconds in this example) at the same fixed intervals (30 minutes in this example) as the master clock. Since the slave clock is carried like a wristwatch, it is not always within the range where it can receive the time adjustment signal from the master clock, but in cases 26 and 27 when the slave clock came within the receiving distance. Only the time will be corrected. Furthermore, when the time is adjusted at 26, the reception part of the child clock will be displayed for a certain period of time (2 Misaki time in this example) as at 28.
Pause. As described above, the present invention has a function in which a time adjustment signal is always transmitted from the master clock at regular intervals, and the receiving section of the slave clock operates at the same regular intervals, but the receiving section is inactive for a fixed period after the time is adjusted. Because it has a 'a-', there is no need to operate the master clock to adjust the time.

(b} Therefore, if the slave clock is carried within the range (several meters) within which the time adjustment signal from the master clock can reach, the time of the slave clock will be automatically adjusted without being conscious of it at all.

'c} Furthermore, the increase in current consumption of the slave clock due to the provision of a receiving circuit, etc. is slight.

This has the following effects, and it is possible to achieve higher precision in mobile watches through external regulation.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of a child watch (portable watch) which receives a time adjustment signal according to the present invention, Fig. 2 is a block diagram of a master watch which can also be called a standard watch, and Fig. 3 is an example of the operation of the present invention. FIG. 1...Transmission department, 2...Branch section, 3...
Counter, 4... Decoder and driver, 5... Display unit, 6... Receiving antenna, 7... Receiving circuit, 8... Waveform shaping unit, 9... ... Synchronous clock section, 10... Signal detection section, 11...
...Modification control section, 12... Timer-1, 13.
...Timer 0, 14...Power control section,
15...Clock part, 16...Display part, 17...
...Timer, 18...Correction signal generation section, 1
9... Control clock, 20... Time data, 21... Carrier signal, 22... Transmitting unit, 23... Transmitting antenna, 24... ... Time adjustment signal transmission period, 25 ... Operation period of the slave clock receiving circuit and waveform shaping section 26 and 27 ...
Flow of the time adjustment signal when the slave clock approaches within the distance range where it can receive the time adjustment signal, 28... Inactive period of the reception circuit and waveform shaping section of the slave clock. Figure 1 Figure 2 Figure 3

Claims (1)

[Claims] 1. A master clock (standard clock) that transmits time adjustment signals for a fixed period of time at regular time intervals, and a fixed time interval that is the same as that of the master clock but shorter than the time interval at which time adjustment signals are transmitted. an externally regulated electronic timepiece comprising a slave clock having a receiving circuit controlled to receive a time adjustment signal from a master clock; a timer circuit connected to a correction control circuit, a power supply control circuit connected to the timer circuit, and the receiving circuit controlled by the power supply control circuit; The externally regulated electronic device is characterized in that the timer circuit is set via a correction control circuit, the power supply control circuit is stopped for a predetermined time longer than the predetermined time interval, and the receiving circuit is operated after the elapse of the predetermined time. clock.