JPS6030000B2 - electronic cash register - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention is an electronic cash register in which receipts and journals are printed using a single printer.

As a subsidiary, the cash register is equipped with a printer dedicated to printing paper sheets and a printer dedicated to journal printing, and during registration operations, the same data is printed on receipt paper and journal paper at the same time, and the receipt is cut out. At the same time, the journal is rolled up and stored as business records.

However, having two printers increases the size of the cash register and also makes it expensive. Furthermore, since the two printers perform printing operations at the same time, the striking sound of the hammers resonates and is noisy, causing discomfort to the customer. Furthermore, when setting receipt paper and journal paper in the printer, insert one end of the receipt paper into the receipt issuing port so that the receipt paper is fed out from the receipt issuing port, and wrap one end of the journal paper around the take-up shaft. Since the journal paper must be wound onto the take-up shaft each time a printing operation is completed, these setting operations are time-consuming and troublesome.
This invention was made to eliminate the above-mentioned drawbacks, and the journal as a business record can be used after the registration process is completed.
For example, this invention was created by focusing on the need after the day's work is completed, and the purpose is to simultaneously print a receipt at the time of registration and temporarily store the printed content in memory. After the registration process is completed, the contents of this memory are read out and printed as a journal.This allows a single printer to print out receipts and journals. To provide a cash register which is economical, reduces hammer impact noise, and simplifies recording paper setting work.

Hereinafter, the present invention will be described in detail with reference to an embodiment shown in the drawings. Figure 1 is an external perspective view of the cash register. In the figure, reference numeral 1 is a mode switch for specifying modes such as bank deposit, inspection, and settlement, 2 is an amount key used for the number of pupils of the amount, and 3 is for identifying the product. Department key used for classification registration by group, sales area, etc. 4 is a journal creation key used to start printing on the journal after registration is completed, 5 is a digital display section, 6 is a sheet or journal Indicates the recording paper used. FIG. 2 shows a system configuration diagram of the cash register, and reference numeral 7 is a CPU (central processing unit), which is connected to a tally memory circuit 8 and a journal via a data bus line DB that transfers data. and a memory circuit 9 for each. The closing memory circuits 8 and 9 are constituted by RAM (Random Access Memory) and have a predetermined storage capacity. The tally memory circuit 8 stores, for example, sales data by department, number of items, sales data by person in charge, etc., and the journal memory circuit 9 stores the contents printed on the receipt at the time of registration after the registration is completed. It is temporarily stored until it is printed as a journal. The CPU 7 is connected to the totalizing memory circuit 8 via the address bus line AB, and the CPU 7 is connected to the totalizing memory circuit 8 via the address bus line AB.
PU7 is connected to multiplexer 10 via address bus line AB. A direct memory access controller (hereinafter simply referred to as DMAC) 11, which will be described later, is further connected to the multiplexer 1 via a bus line JAB. multiplexer 10
The address selected in is input to the journal memory circuit 9. The aggregation memory circuit 8 is designated for reading/writing according to the reading/writing signal R/W sent from the CPU 7. Further, the journal memory circuit 9 is selected for reading/writing according to the read/write signal R/W sent from the CPU 7 via the multiplexer 0.
Data from is written. Data in the journal memory circuit 9 is read out via the journal data bus line JOB and input to the multiplexer 13.
The data read into the data bus buffer 12 is input to the data bus line DB. A 1/0 port 14 is connected to the CPU 7 via a data bus line DB and an address bus line AB. Also CPU7
is connected to the multiplexer 13 via the data bus line DB.
is connected. The data selected by multiplexer 13 is input to print buffer 15 in 1/0 port 14. The 1/0 boat 14 has a print buffer 15, a display buffer 6, an input buffer 17, a status buffer 18, and a zero detection circuit 19 described later.
This print buffer 15 includes a print section 20 and a display buffer 1.
6 is a display section 21, the input buffer 17 is an input section 22,
The status buffers 18 are each connected to an alarm unit 23 such as a buzzer.

The printing unit 20 is configured to print a receipt or journal on recording paper using a line printer (not shown). Then, the print position signal T of the print drum (not shown) is sent from the print unit 20 to the 1/0 boat 14, and from the 1/0 boat 14, the print position signal T and the data in the print buffer 15 are matched internally. A print drive signal MD generated by the above is sent to the printing section 20, and a predetermined hammer in the printing section 20 is driven in accordance with this print drive signal MD, thereby performing a printing operation. Further, the input section 22 operates to input the key input signal KI to the input buffer 17 in the 1/0 port 14 in accordance with the timing signal KP from the 1/0 port 14 when a key is operated. In addition, the display section 21
is the segment signal SG obtained by decoding the digit signal DG of the 1/0 port 14 and the data in the display buffer 16.
The display operation is performed according to the following. Figure 3 shows the above DMAC
2 is a circuit configuration diagram showing details of I1, which includes an address counter 24, an END detection circuit 25, and a flip-flop 26. FIG.

This address counter 24 is given a journal print start command a output from the CPU 7 by operating the journal creation key 4, and by this start command a, the address counter 24 is cleared and the flip-flop 26 is set. . Address counter 24 above
is configured to count up according to count-up signals b and b' outputted from the printing section 20 and the zero detection circuit 19 of the 1/0 port 14. This count-up signal b is output as a journal in the printing section 20 every time one line is printed on the recording paper, and the count-up signal b' is output when the zero detection circuit 19 detects that the data in the print buffer 15 is zero. Sometimes output. The amount of recording paper consumed can be reduced by providing this zero detection circuit 19 and providing a so-called zero skip mechanism that skips and prints zeros, which are unnecessary data as a journal. The count of the address counter 24 is supplied as an address signal to the multiplexer 10 via the bus line JAB, and its contents are EN
The signal is supplied to the D detection circuit 25. This END detection circuit 25 detects when the count becomes equal to the storage capacity of the journal memory circuit 9, for example, 100 addresses.
This is detected and a detection signal is output, and the flip-flop 2
6 is reset. The output signal of this flip-flop 26 is output as the journal print designation signal c, and this designation signal c is applied to the CPU 7, multiplexers 10 and 13, data bus buffers 12 and 1.
/0 boat 14, respectively. The above specified signal c
The period in which is output indicates that the data in the journal memory circuit 9 is being output to the print buffer 5 under the control of DMACI I, and during this period, the data in the journal memory circuit 9 is being output to the print buffer 5 from the CPU 7. Output of data is prohibited. The multiplexer 10 also receives the specified signal c.
When the address bus line AB is not given, the address on the address bus line AB is output, and when it is given, the address of the address counter 24 is output.
The multiplexer 13 outputs data from the CPU 7 when the designation signal c is not applied, and outputs data from the journal memory circuit 9 when it is applied. Furthermore, the above specified signal c
is given to the 1/0 port 14, the print buffer 5 is designated, and the data read from the journal memory circuit 9 is sequentially written to the print buffer 5. Furthermore, the zero detection circuit 19 operates and the print buffer 1
The data in 5 is ze. Detect whether or not. Next, the operation of the cash register configured as described above will be explained in detail with reference to the flowchart shown in FIG.

When performing normal monetary registration, first change the mode switch and set it to the "registration" state. Note that the journal creation key 4 is not operated at the time of registration, but is operated, for example, after one day's registration work is completed. Therefore, at the time of registration, the flip-flop 26 of DMACI I is in a reset state, and DMACI I is in a state in which it does not output the journal print designation signal c. In this state, by inserting the amount key 2 and inputting sales data, and then operating the department key ÷ 3 to input departmental numerical data, the departmental data in step S. Registration processing is performed. That is, when the amount key 2 is operated, sales data is input into the input buffer 17 of the 1/0 boat 14, and CP is input from this buffer 7.
It is input to accumulator A of U7. Then, when the department key 3 is operated, the departmental sales total data in the memory circuit 8 for aggregation is read out to the CPU 7, this data and the sales data in the accumulator A are added in the CPU, and this addition result is totalized. The data is transferred to the memory circuit 8' and stored, and the process moves to the next step S2.
Here, sales data is read out from the accumulator A of the CPU 7 in response to the operation of the department key 3, and is transferred to the print buffer 15 via the multiplexer 13.
That is, since the journal print designation signal c is not applied to the multiplexer 13, the data transferred from the accumulator A is supplied to the print buffer 15 of the 1/0 port 14 via the multiplexer 13. And 1/○
The boat exchanges signals T and MD with the printing section 20, drives the printer of the printing section 20, and prints sales data and departmental numerical data on the recording paper 6 as a receipt. In step S3, the sales data stored in the accumulator A of the CPU 7 is supplied to the display buffer 6 of the 1/0 boat 14. The contents of the display buffer 6 are displayed in the display section 2.
1 and displayed. Furthermore, in step S4, CP
The sales data stored in accumulator A of U7 is transferred to journal memory circuit 9. At this time, the multiplexer Kawako is not given the journal print designation signal c, so the address JMA output from the CPU 7 is
is applied to the journal memory circuit 9 via the multiplexer 10. Therefore, the journal memory circuit 9 is
Sales data is written to the address specified by JMA. Then, in the next step S5, JMA is incremented by 11 in order to designate the next address within the CPU 7. In the next step S6, the CPU 7 determines whether or not the JMA signal has reached the storage capacity of the memory circuit 9. If it is determined that the JMA signal has reached the storage capacity, the CPU 7 moves to the next step S7. Here, the overflow signal from CPU7 is 1.
/0 is given to the boat 14, and the alarm unit 23 is driven via the status buffer 18 to generate an alarm sound, which the operator can sense. Next, when the day's registration work is completed and a journal is to be created, the journal creation key 4 is operated after the mode switch 1 is switched to the "inspection" position.

By operating the creation key 4, the CPU 7 outputs a journal print start command a, which is applied to the DMACI I to execute step S8. By outputting this print start command a, the address counter 2 of DMACI I is
The count value of 4 is cleared and the DMACI
Since the journal print designation signal c is outputted from I, the cash register starts printing out the journal data written in the journal memory circuit 9 on the recording paper. That is, the journal memory circuit 9 receives the reading instruction and also receives the DMACI I
The value of the address counter 24 is applied via the multiplexer 10. Therefore, the journal data is sent from the journal memory circuit 9 via the multiplexer 13 to 1
The output signal is supplied to the print buffer 15 of the /0 port 14. At this time, the zero detection circuit 19 detects whether the content of the print buffer 5 is zero or not. If the content is zero, no printing operation is performed and the count value of the DMAC II address counter 24 increases to 11. and the next address is specified. When the value is not zero, the printer of the printing section 20 performs a printing operation. When this printing operation is performed, the count value of the DMAC II counter 24 is increased to 11, and the next address is designated. In this way, the journal memory circuit 9 is sequentially read out according to the address designation from DMAC II and printed on recording paper to create a journal. Therefore, when registering money, the registration data is printed on the receipt, and this registration data is sequentially stored in the journal memory circuit 9 as journal data, and after the registration process is completed, the journal data is read from the closing memory circuit 9. Since the cash register is issued and printed as a journal on recording paper, the cash register only needs to be equipped with a printer. In addition, the journal memory in the above embodiment is removable from the main body of the cash register, and when this memory reaches the limit to which data can be written, it is removed and stored as business records, and the empty You may want to replace the memo.

Further, in order to prevent the data in the journal memory circuit from being destroyed due to an accident such as a power outage, a protective power supply for this memo stream may be provided separately.

Further, in the above embodiment, the print data for the receipt is stored as is in the journal memory circuit, but the present invention is not limited to this. It is also possible to selectively store only specific types of data necessary for the journal.

As described above, the cash register according to the present invention is not limited to the above embodiments, and various changes may be made without departing from the scope of the present invention.

As explained in detail above, the present invention is an electronic cash register that prints out print data on recording paper as a receipt and a journal, and when registering money, prints data as EO on the recording paper and prints out the receipt. It is equipped with a printer for issuing the receipt, and a storage means for temporarily storing the print data for the journal inputted with the issuance of the receipt,
After the monetary registration is completed, the journal is issued by printing the print data outputted from the storage means on recording paper using the printer according to the operation of a specific key.

Therefore, according to the present invention, since receipts and journals can be issued using a single printer, the size of the cash register itself can be reduced, and the cost of the printer can be reduced compared to conventional ones. It is economical. Further, since two printers perform printing operations simultaneously as in the conventional printer, it is possible to prevent the impact sounds from resonating, so that the customer does not feel uncomfortable. Furthermore, it is not necessary to separately provide journal paper in addition to receipt paper, and therefore, there is no need to set journal paper, and work efficiency is significantly improved.

[Brief explanation of the drawing]

The drawings show an embodiment of the cash register according to the present invention. FIG. 1 is an overall perspective view of the cash register, FIG. 2 is a system configuration diagram, and FIG. 3 is a direct memory access system. FIG. 4 is a circuit configuration diagram showing details of the control (DMAC) and a flowchart showing the operation of the cash register. 4... Journal creation key, 9... Journal closing circuit, 20... Printing section. Figure 1 Figure 2 Figure 3 Figure 4

Claims (1)

[Claims] 1 Equipped with a means for inputting sales data, a storage means for sequentially storing the inputted sales data, and a receipt printing means for printing the sales data on a receipt each time the sales data is input, and when registering the sales data, An electronic type that creates a journal by creating a receipt by the receipt printing means and printing the sales data in the storage means by the receipt printing means when a specific key is pressed after the registration of sales data is completed. Cash register machine.