JPS6028315A - Input filter - Google Patents

Input filter

Info

Publication number
JPS6028315A
JPS6028315A JP13585783A JP13585783A JPS6028315A JP S6028315 A JPS6028315 A JP S6028315A JP 13585783 A JP13585783 A JP 13585783A JP 13585783 A JP13585783 A JP 13585783A JP S6028315 A JPS6028315 A JP S6028315A
Authority
JP
Japan
Prior art keywords
circuit
trap
filter
input
input filter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13585783A
Other languages
Japanese (ja)
Inventor
Eiji Tsubono
坪野 英二
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP13585783A priority Critical patent/JPS6028315A/en
Publication of JPS6028315A publication Critical patent/JPS6028315A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/01Frequency selective two-port networks
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/01Frequency selective two-port networks
    • H03H7/17Structural details of sub-circuits of frequency selective networks
    • H03H7/1741Comprising typical LC combinations, irrespective of presence and location of additional resistors
    • H03H7/1758Series LC in shunt or branch path
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/01Frequency selective two-port networks
    • H03H7/17Structural details of sub-circuits of frequency selective networks
    • H03H7/1741Comprising typical LC combinations, irrespective of presence and location of additional resistors
    • H03H7/1791Combined LC in shunt or branch path

Abstract

PURPOSE:To improve intermodulation distortion and cross modulation disturbance by connecting a series resonance circuit between an input signal path and a ground terminal, applying a voltage to a switching diode of the resonance circuit so as to attain the on/off control thereby allowing the said circuit to be operated as a trap circuit. CONSTITUTION:A trap circuit 4 is added to an input filter 1. In applying a voltage to a terminal V2 of the circuit 4 at the reception of a low frequency channel so as to float a terminal V1 or so as to bring the potential to zero volt, a diode D2 is conductive, a diode D1 is nonconductive, the equivalent circuit of the circuit 4 is shown in Fig. (a) and the transmission characteristic of the filter has a trap characteristic at a frequency f02 as shown in Fig. (a'). In applying a voltage to the terminals V1, V2 at the reception of an intermediate channel, the equivalent circuit is as shown in Fig. (b) and the transmission characteristic of the filter 1 has a trap characteristic at frequencies f01, f02 as shown in Fig. (b'). Thus, the pass band width of the filter 1 is made narrower and intermodulation distortion, cross modulation disturbance or the like caused by a multi-signal input is improved.

Description

【発明の詳細な説明】 〔発明の利用分野〕 本発明は、ケーブルテレビ用コンバータf−−すの入力
回路に設けた入力フィルタに関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to an input filter provided in an input circuit of a cable television converter f--.

〔発明の背景〕[Background of the invention]

かかる入力フィルタとしての従来の広帯域入力バンドバ
スフィルタは、fユーナ入力端子に到達した信号(fヤ
ンネル)全数を、減衰させることなく、該フィルタに接
続されたRF増幅器、或すは、周波数変換器に供給する
ため、前記RF増幅器、或いは周波数変換器において、
多波人力による相互変調歪と混変調妨害特性の劣化を生
ずるという欠点があった。
A conventional wide-band input bandpass filter as such an input filter is capable of transmitting the entire signal (f channel) that reaches the f yun input terminal without attenuating the RF amplifier or frequency converter connected to the filter. In the RF amplifier or frequency converter to supply
This method has the disadvantage of causing intermodulation distortion and deterioration of intermodulation interference characteristics due to multiwave manual input.

〔発明の目的〕[Purpose of the invention]

本発明の目的は、前記した従来技術の欠点をなくシ、相
互変調歪と混変調妨害の改善を可能にした入力フィルタ
を提供することにある。
SUMMARY OF THE INVENTION It is an object of the present invention to provide an input filter that eliminates the drawbacks of the prior art described above and makes it possible to improve intermodulation distortion and intermodulation interference.

〔発明の概要〕[Summary of the invention]

チューナの入力端に到達した信号は、入力フィルタを通
過し、非直線要素の高い周波数変換器、或いはRF増幅
器に入力される。一般に、前記非直線回路は、種々の歪
を包含しておシ、入力信号数が、n波の時には、2波入
力されたときに比して相互変調歪で10Ao1g(n−
1)dB 、混変調妨害で20Log(n−1) dB
 、歪成分が劣化する。従って、非直線回路へ入力され
る信号数を減少せしめれば。
The signal reaching the input end of the tuner passes through an input filter and is input to a high frequency converter with a non-linear element or an RF amplifier. In general, the nonlinear circuit includes various types of distortion, and when the number of input signals is n waves, the intermodulation distortion is 10Ao1g (n-
1) dB, 20Log(n-1) dB with cross-modulation interference
, the distortion component deteriorates. Therefore, the number of signals input to the nonlinear circuit can be reduced.

相互変調歪、混変調妨害等の各種歪の改善が得られる。Various distortions such as intermodulation distortion and cross-modulation interference can be improved.

そこで、本発明によるフィルタは、広帯域バンドパスフ
ィルタ内の信号系路と接地端子間に、インダクタ4スと
容量とスイッチングダイオードの直列接続よシなる直列
共振回路を少くとも1個以上付加接続し、前記スイッチ
ングダイオードに電圧を印加してオン・オフ制御するこ
とによが、前記直列共振回路をトラップ回路として動作
可能にしたものである。
Therefore, the filter according to the present invention additionally connects at least one series resonant circuit, such as a series connection of an inductor, a capacitor, and a switching diode, between the signal path and the ground terminal in the broadband bandpass filter, By applying a voltage to the switching diode and controlling it on and off, the series resonant circuit can be operated as a trap circuit.

〔発明の実施例〕[Embodiments of the invention]

以下、本発明の一実施例を第1図及び第2図によシ説明
する。
An embodiment of the present invention will be described below with reference to FIGS. 1 and 2.

第1図は本発明の一実施例を示す回路構成図である。同
図において1は本発明による入力フィルタを示し、2は
従来より用いられている広帯域バンドパスフィルタ、3
は周波数変換器等の非直線回路を示し、4は本発明の特
徴とするトラップ回路を示す。バンドパスフィルタ2に
、インダクタンスL+ 、 L2 、容量c、 、 c
2 、スイッチングダイオードD、、D2がそれぞれ図
示の如く直列接続されたトラップ回路4を付加するもの
である。R1−R5はバイアス用抵抗、C3はバイパス
コンデンサを示す。
FIG. 1 is a circuit configuration diagram showing an embodiment of the present invention. In the figure, 1 indicates an input filter according to the present invention, 2 indicates a conventional wideband bandpass filter, and 3 indicates an input filter according to the present invention.
4 shows a non-linear circuit such as a frequency converter, and 4 shows a trap circuit which is a feature of the present invention. In the band pass filter 2, inductance L+, L2, capacitance c, , c
2, a trap circuit 4 is added in which switching diodes D, , D2 are connected in series as shown in the figure. R1-R5 are bias resistors, and C3 is a bypass capacitor.

低域チャンネル受信時には、該トラップ回路4の端子v
2に電圧を印加し、端子V1を開放或いは0ボルトとす
ると、ダイオードD2は導通、ダイオードD1は非導通
となシ、該トラップ回路の等価回路は第2図(a)に示
した回路となる。このときアドミッタンスt2は (但し ω=2πf) で表わされ、広帯域フィルタ2とトラップ回路4を接続
したフィルタ1の伝送特性は、 f’o2= 1/2π舊■−−−−(2)にトンラグ特
性を有する第3図(a)となる。
When receiving a low frequency channel, the terminal v of the trap circuit 4
When a voltage is applied to the trap circuit 2 and the terminal V1 is opened or set to 0 volts, the diode D2 becomes conductive and the diode D1 becomes non-conductive, and the equivalent circuit of the trap circuit becomes the circuit shown in Fig. 2 (a). . At this time, the admittance t2 is expressed as (where ω=2πf), and the transmission characteristic of the filter 1, which connects the broadband filter 2 and the trap circuit 4, is f'o2= 1/2π舊■---(2) The result is shown in FIG. 3(a), which has a lag characteristic.

中域チャンネル受信時には、該トラップ回路の端子vI
 # v2に電圧を印加すると、ダイオードD、、D。
When receiving a mid-range channel, the terminal vI of the trap circuit
# When voltage is applied to v2, diodes D,,D.

が導通状態となシ、等価回路は第2図(b)と表わされ
、アドミッタンス:foは となる。このときのフィルタ1の伝送特性は、f a 
+ == 1 /2yr 5可’ −−−−(4)fo
2: 1/2πd77 −=−(5)(但し、fg 1
< f62. ) Kトンラグ特性を有する第3図(b)となる。
When is in a conductive state, the equivalent circuit is shown in FIG. 2(b), and the admittance fo becomes. The transmission characteristic of filter 1 at this time is f a
+ == 1 /2yr 5 possible' -----(4) fo
2: 1/2πd77 -=-(5) (However, fg 1
<f62. ) Figure 3(b) shows Kton lag characteristics.

高域チャンネル受信時には、端子V、に電圧を印加し、
端子v2を開放或h//′ioボルトとすると、等価回
路は第2図(C)、アドミッタンスt1はとな少、フィ
ルタ1);j f’o、 = 1/2πIT;回−−−−(7)如トラ
ップ特性を有する第3図(c)となる。
When receiving a high frequency channel, apply voltage to terminal V,
If terminal v2 is open or set to h//'io volts, the equivalent circuit is shown in Fig. 2 (C), the admittance t1 is very small, filter 1);j f'o, = 1/2πIT; times---- (7) As shown in FIG. 3(c), the trap characteristic is as shown in FIG.

このようにトラップ回路4を付加することによって、フ
ィルタ1の通過帯域幅を狭くすることが可能とな少、非
直1回路3への入力信号数を、受信信号に影響を与える
ことなく、少くでき、それに伴な−、多信号入力による
相互変調歪、混変調妨害等の妨害特性の改善が可能とな
る。
By adding the trap circuit 4 in this way, it is possible to narrow the passband width of the filter 1 and reduce the number of input signals to the non-direct 1 circuit 3 without affecting the received signal. Accordingly, it becomes possible to improve interference characteristics such as intermodulation distortion and cross-modulation interference due to multi-signal input.

次釦本発明の他の実施例を第4図、第5図および第6図
によシ説明する。
Next button Another embodiment of the present invention will be explained with reference to FIGS. 4, 5, and 6.

第4図は1本発明の他の実施例を示す回路構成図である
。同図において1は本発明によるフィルタを示し、2は
広帯域バンドパスフィルタ、3は周波数変換器等の非直
線回路、4はトラップ回路を示す。
FIG. 4 is a circuit diagram showing another embodiment of the present invention. In the figure, 1 represents a filter according to the present invention, 2 represents a broadband bandpass filter, 3 represents a non-linear circuit such as a frequency converter, and 4 represents a trap circuit.

第5図は、該トラップ回路4のB、端子にバンド切換え
用電圧を印加しBH端子を開放とした時のトラップ回路
部4の高周波等価回路を示す。ここでCd2はダイオー
ドD2の逆バイアスによる等価容量である、ここで によ)C1〜C2,L、〜L2の定数を選ぶことにょル
、第6図(b)の実a8で示す特性となる。ここで。
FIG. 5 shows a high frequency equivalent circuit of the trap circuit section 4 when a band switching voltage is applied to the B terminal of the trap circuit 4 and the BH terminal is left open. Here, Cd2 is the equivalent capacitance due to the reverse bias of the diode D2. By selecting the constants of C1 to C2, L, and ~L2, the characteristic is shown by a8 in Figure 6(b). . here.

(EL)は高域チャンネル受信時のフィルタ波坦で5は
、L2.C2の直列共振によるドラッグである。同様に
(b)は低域チャンネル受信時のフィルタ波形で6はL
2.C2,Cd2によるトラップ、7はLl、C,によ
るトラップである。
(EL) is the filter waveform when receiving a high frequency channel, and 5 is the L2. This is the drag due to series resonance of C2. Similarly, (b) is the filter waveform when receiving the low frequency channel, and 6 is the L
2. A trap is caused by C2, Cd2, and 7 is a trap caused by Ll, C.

このようにトラップ回路4の定数を(6)式に設定する
ことによ多低域チャンネル受信時のトラップ減衰量を増
大させることができ、非直線回路3への入力信号レベル
を、受信信号に影響を与えることなく、小さくすること
ができた。
By setting the constant of the trap circuit 4 according to equation (6) in this way, it is possible to increase the amount of trap attenuation when receiving multiple low-frequency channels, and the level of the input signal to the nonlinear circuit 3 can be changed to the received signal. I was able to make it smaller without any impact.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、非直線回路に入力される信号数を減ら
すことが可能となるので、多信号入力による相互変調歪
、混変調妨害等の妨害特性の改善の効果がある。
According to the present invention, it is possible to reduce the number of signals input to a non-linear circuit, thereby improving interference characteristics such as intermodulation distortion and cross-modulation interference due to multi-signal input.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例を示す回路図、第2図(a)
 、(b) + (c)は第1図の回路におけるトラッ
プ回路部の等価回路を示す回路図、第3図(a) 、 
(b) 。 (Q)は第2図(a) 、 (b) 、 (Q)に対応
した本発明の一実施例の総合伝送特性を示す特性図、第
4図は本発明の他の実施例を示す回路図、第5図は第4
図の回路におけるトラップ回路部の等価回路を示す回路
図、−第6図(a)は第4図の回路において高域チャン
ネル受信時のフィルタ特性図、第6図(b)は同じく低
域チャンネル受信時のフィルタ特性を示す特性図、であ
る。 符号説明 1・・・入力フィルタ、2・・・広帯域バンドパスフィ
ルタ、3・・・非直線回路、4・・・トラップ回路、5
〜8・・・トラップ波形 01〜C2・・・低誘電率容量、C3・・・高誘電率容
量り、〜L、・・・インダクタンス% DI〜D2・・
・スイッチングダイオード、R1〜Rg・・・抵抗s 
BLsBH・・・バンド切換え用電圧端子 才1図 一才Z図 (α) (b) (す ’f’317 第5圀
Fig. 1 is a circuit diagram showing an embodiment of the present invention, Fig. 2(a)
, (b) + (c) is a circuit diagram showing an equivalent circuit of the trap circuit section in the circuit of Fig. 1, Fig. 3 (a),
(b). (Q) is a characteristic diagram showing the overall transmission characteristics of one embodiment of the present invention corresponding to FIGS. 2(a), (b), and (Q), and FIG. 4 is a circuit showing another embodiment of the present invention. Figure 5 is the 4th
A circuit diagram showing an equivalent circuit of the trap circuit section in the circuit shown in the figure. - Figure 6 (a) is a filter characteristic diagram when receiving a high frequency channel in the circuit of Figure 4, and Figure 6 (b) is a diagram showing the filter characteristics for the low frequency channel in the circuit shown in Figure 4. FIG. 3 is a characteristic diagram showing filter characteristics at the time of reception. Description of symbols 1...Input filter, 2...Broad band pass filter, 3...Non-linear circuit, 4...Trap circuit, 5
~8...Trap waveform 01~C2...Low dielectric constant capacitance, C3...High dielectric constant capacitance, ~L,...Inductance% DI~D2...
・Switching diode, R1 to Rg...resistance s
BLsBH・・・Voltage terminal for band switching

Claims (1)

【特許請求の範囲】 1)ケーブルテレビ用コンバータチューナの入力回路に
設けた入力フィルタにおいて、入力信号の経路と接地端
子の間に、インダクタンスと容量とスイッチングダイオ
ードの直列接続よシなる直列共振回路を少なくも1組接
続し、前記ダイオードをオン・オフ制御することによル
前記直列共振回路をトラップ回路として動作可能にした
ことを特徴とする入力フィルタ。 2、特許請求の範囲第1項に記載の入力フィルタにおい
て、前記直列共振回路を少くとも2組もち、かつ前記ス
イッチングダイオードにバンド切換え用電圧を印加した
ことによシ前記直列共振回路の一方を動作させトラップ
を形成させるととも釦、同時に他方のスイッチングダイ
オードに印加される逆方向電圧によ多生じた接合容量と
残シの直列共振回路とによシ前記トラップ周波数の近傍
に別のトラップを形成せしめ信号減衰量を増大させたこ
とを特徴とする入力フィルタ。
[Claims] 1) In the input filter provided in the input circuit of the cable TV converter tuner, a series resonant circuit consisting of a series connection of an inductance, a capacitance, and a switching diode is provided between the input signal path and the ground terminal. An input filter characterized in that the series resonant circuit can operate as a trap circuit by connecting at least one set of diodes and controlling the on/off of the diodes. 2. In the input filter according to claim 1, the input filter has at least two sets of the series resonant circuits, and one of the series resonant circuits is switched by applying a band switching voltage to the switching diode. When the button is activated to form a trap, another trap is created in the vicinity of the trap frequency due to the junction capacitance generated by the reverse voltage applied to the other switching diode and the remaining series resonant circuit. An input filter characterized in that the amount of signal attenuation that is formed is increased.
JP13585783A 1983-07-27 1983-07-27 Input filter Pending JPS6028315A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13585783A JPS6028315A (en) 1983-07-27 1983-07-27 Input filter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13585783A JPS6028315A (en) 1983-07-27 1983-07-27 Input filter

Publications (1)

Publication Number Publication Date
JPS6028315A true JPS6028315A (en) 1985-02-13

Family

ID=15161392

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13585783A Pending JPS6028315A (en) 1983-07-27 1983-07-27 Input filter

Country Status (1)

Country Link
JP (1) JPS6028315A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63244913A (en) * 1987-03-30 1988-10-12 Sony Corp Inductor switching circuit
JPH0565116U (en) * 1992-02-05 1993-08-27 デイエツクスアンテナ株式会社 Amplifier for joint hearing facility with frequency characteristic correction circuit
JPH07321586A (en) * 1994-05-20 1995-12-08 Kokusai Electric Co Ltd Variable frequency band filter
JP2009545240A (en) * 2006-07-28 2009-12-17 フリースケール セミコンダクター インコーポレイテッド Reconfigurable impedance matching and harmonic filter system

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63244913A (en) * 1987-03-30 1988-10-12 Sony Corp Inductor switching circuit
JPH0565116U (en) * 1992-02-05 1993-08-27 デイエツクスアンテナ株式会社 Amplifier for joint hearing facility with frequency characteristic correction circuit
JPH07321586A (en) * 1994-05-20 1995-12-08 Kokusai Electric Co Ltd Variable frequency band filter
JP2009545240A (en) * 2006-07-28 2009-12-17 フリースケール セミコンダクター インコーポレイテッド Reconfigurable impedance matching and harmonic filter system

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