JPS60259009A - Fm signal processing circuit - Google Patents

Fm signal processing circuit

Info

Publication number
JPS60259009A
JPS60259009A JP11438384A JP11438384A JPS60259009A JP S60259009 A JPS60259009 A JP S60259009A JP 11438384 A JP11438384 A JP 11438384A JP 11438384 A JP11438384 A JP 11438384A JP S60259009 A JPS60259009 A JP S60259009A
Authority
JP
Japan
Prior art keywords
circuit
mute
voltage
current
resistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11438384A
Other languages
Japanese (ja)
Other versions
JPH0252444B2 (en
Inventor
Masaru Hashimoto
勝 橋本
Hajime Mori
盛 一
Yoshio Ito
芳雄 伊藤
Tsuneo Sakai
酒井 恒夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ARUPAIN KK
Toshiba Corp
Alpine Electronics Inc
Original Assignee
ARUPAIN KK
Toshiba Corp
Alpine Electronics Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ARUPAIN KK, Toshiba Corp, Alpine Electronics Inc filed Critical ARUPAIN KK
Priority to JP11438384A priority Critical patent/JPS60259009A/en
Publication of JPS60259009A publication Critical patent/JPS60259009A/en
Publication of JPH0252444B2 publication Critical patent/JPH0252444B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03GCONTROL OF AMPLIFICATION
    • H03G3/00Gain control in amplifiers or frequency changers without distortion of the input signal
    • H03G3/20Automatic control
    • H03G3/30Automatic control in amplifiers having semiconductor devices
    • H03G3/34Muting amplifier when no signal is present or when only weak signals are present, or caused by the presence of noise signals, e.g. squelch systems
    • H03G3/341Muting when no signals or only weak signals are present

Abstract

PURPOSE:To simplify the integrated circuit by converting a meter voltage used for a meter drive circuit into a current and transmitting it through a current mirror circuit so as to give a mute amount and a mute sensitivity from one pin. CONSTITUTION:The meter voltage as the result of level detection of an output of an FM intermediate frequency amplifier and driving a meter drive circuit 27 by a DC detection voltage is converted into a current IS by a transistor Q1 and a resistor RS and this curren is transmitted as a KIS by the current mirror circuit in the constitution of a mute drive circuit 28, and a series circuit comprising a variable resistor 31 and a reference voltage source 32 is connected to a pin 30 for an externally mounted component. The gain of the gain variable control amplifier 29 is controlled by the variable resistor 31 so as to adjust the mute sensitivity and to set the mute amount by a voltage value of a reference voltage source 32. One pin is enough two pins for externally mounted components for conventional mute amount and mute sensitivity so as to simplify the integrated circuit.

Description

【発明の詳細な説明】 〔発明の技術分野〕 この発明は、FM信号処理回路に関しう例えばカーラジ
オ等のFM中中間周波段集積−路に使用されるもので、
特に弱電・界入力時にはFM検波出力を徐々に低下し、
無信号時の雑音レベルをある設定した値にする回路に係
るものである。
[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to an FM signal processing circuit, and is used, for example, in an FM intermediate frequency stage integration circuit such as a car radio.
Particularly when weak electric fields are input, the FM detection output is gradually reduced.
This relates to a circuit that sets the noise level to a certain value when there is no signal.

〔発明の技術的背景〕[Technical background of the invention]

従来、入力電界強度に応じてFM検波出力のレベルを徐
々に変化させてミュート状態又はミュート解除状態を作
るFM中間周波増幅回路がある。この踵の回路は、その
電界強度対信号レベル検波出力の特性が第5図に示すよ
うに々る。
2. Description of the Related Art Conventionally, there is an FM intermediate frequency amplification circuit that gradually changes the level of an FM detection output depending on the input electric field strength to create a mute state or a mute release state. This heel circuit has characteristics of electric field strength versus signal level detection output as shown in FIG.

即ち、1ノは検波出力信号であシ、12はこれに含まれ
るノイズレベルを意味する。電界強度が強くなれば、ノ
イズのレベルは低く出力信号のレベルは高い。しかし、
電界強度が弱くなれば、ノイズレベルが犬きくなシ、ま
た、出力信号レベルも徐々に低下し、最終的には、ノイ
ズレベルと同じになる。ここで、レベルL1を設定する
のは、ミーート量と称され、また、出力信号レベルが徐
々に低下する領域M1の傾きを設定するのはミュート感
度と称される。
That is, 1 is the detection output signal, and 12 is the noise level contained therein. The stronger the electric field strength, the lower the noise level and the higher the output signal level. but,
As the electric field strength becomes weaker, the noise level increases and the output signal level gradually decreases, eventually reaching the same level as the noise level. Here, setting the level L1 is called the mute amount, and setting the slope of the region M1 in which the output signal level gradually decreases is called the mute sensitivity.

ミュート感度は、オーディオ用の可変利得制御増幅器の
自動利得制御電圧を徐々に変化させることでその傾斜が
得られ、この傾斜の下端はミュート量となる。このミュ
ート量は、可変利得制御増幅器のミュート限界を設定す
るもので、利得の低下限度を設定するアッテネータ等に
よシ設定されている。
The slope of mute sensitivity is obtained by gradually changing the automatic gain control voltage of a variable gain control amplifier for audio, and the lower end of this slope is the mute amount. This mute amount sets the mute limit of the variable gain control amplifier, and is set by an attenuator or the like that sets the limit of gain reduction.

〔背景技術の問題点〕[Problems with background technology]

上記のミューティングシステムを有した従来のFM信号
処理回路によると、集積回路化した場合、ミュート感度
調整のだめの外部抵抗接続用、及びミュート量調整のた
めの外部抵抗接続用として、少なくとも2本の外付ビン
が必要であった。ミーート感度は、FM中間周波信号を
レベル検波して得られる検波電圧13(レベルメータ駆
動回路のメータ電圧として利用)を、外部抵抗で電流変
換し、その変化を可変利得制御増幅器の利得制御端子に
与えている。また、ミーート量は、FM中間周波信号を
レベル検波して得られた先のメータ電圧をやはシ外部抵
抗で電流変換し、この抵抗の電圧と内部の基準電圧とを
比較し、所定の関係になるとその比較器出力で上記可変
利得制御増幅器の利得を固定している。このように、別
々にミュート感度及びミーート量を設定するため、第5
図の破線11Aの如くミュート量を調整した場合、ミー
ート感度の傾斜(破線JIBで示す)がスムーズに連続
せず、不自然なミュート動作と々る場合がある。
According to the conventional FM signal processing circuit having the above-mentioned muting system, when it is integrated into an integrated circuit, at least two wires are required for connecting an external resistor for adjusting the mute sensitivity and for connecting an external resistor for adjusting the mute amount. An external bin was required. Meet sensitivity is achieved by converting the detected voltage 13 (used as the meter voltage of the level meter drive circuit) obtained by level detecting the FM intermediate frequency signal into a current using an external resistor, and transmitting the change to the gain control terminal of the variable gain control amplifier. giving. In addition, the amount of meat is determined by converting the meter voltage obtained by level detecting the FM intermediate frequency signal into a current using an external resistor, comparing the voltage of this resistor with the internal reference voltage, and determining the predetermined relationship. Then, the gain of the variable gain control amplifier is fixed by the output of the comparator. In this way, in order to set the mute sensitivity and mute amount separately, the fifth
When the mute amount is adjusted as indicated by the broken line 11A in the figure, the slope of the meat sensitivity (indicated by the broken line JIB) does not continue smoothly, and unnatural mute operations may occur.

〔発明の目的〕[Purpose of the invention]

この発明は上記の事情に鑑みてなされたもので、ミュー
ト感度、ミュート量の調整を1つの外部ビン側から可能
とし、集積回路のピン数をできるFM信号処理回路を提
供することを目的とする。
This invention has been made in view of the above circumstances, and aims to provide an FM signal processing circuit that allows adjustment of mute sensitivity and amount of mute from one external bin, and that allows the number of pins of an integrated circuit to be reduced. .

〔発明の概要〕[Summary of the invention]

この発明では、例えばメータ駆動回路に用いられるメー
タ電圧を、−相電流変換(トランジスタQJ、抵抗R6
の回路の利用)し、この変換電流をカレントミラー回路
でビン3oに伝達するとともに、このビン30には、基
準電圧を与えておくことによシ、ミーート量とミーート
感度を1つのビンから与えられるようにしたものである
In this invention, for example, the meter voltage used in the meter drive circuit is converted into -phase current (transistor QJ, resistor R6
By transmitting this converted current to the bin 3o using a current mirror circuit and applying a reference voltage to the bin 30, the meet amount and meet sensitivity can be given from one bin. It was designed so that

〔発明の実施例〕[Embodiments of the invention]

以下この発明の実施例を図面を参照して説明する。 Embodiments of the present invention will be described below with reference to the drawings.

第1図はこの発明の一実施例であり、破線で囲む部分が
集積回路として構成されてl/、る。FM中間周波信号
は、中間周波増幅器2ノで増幅され、バッファ回路22
を通シ、ピーク検波回路23で検波され、オーディオ信
号に変換される。
FIG. 1 shows an embodiment of the present invention, in which the portion surrounded by broken lines is constructed as an integrated circuit. The FM intermediate frequency signal is amplified by an intermediate frequency amplifier 2 and then sent to a buffer circuit 22.
The signal is detected by the peak detection circuit 23 and converted into an audio signal.

このオーディオ信号は可変利得制御増幅器24で増幅さ
れ、出力端子25に導出される。前記中間周波増幅器2
1の信号は、レベル検波回路26にも導かれている。こ
の回路は、中間信号のレベルを検出し、その検出電圧を
メータ駆動回路27に入力する。メータ駆動回路27は
、FM中間周波信号のレベルに応じて表示メータの駆動
信号を発生する。このメータ、駆動回路27で得られた
メータ電圧は、ミ一一トドライブ回路28にも与えられ
る。このミュート感度の イブ回路28は、メータ電圧杯変化に応じて、可変利得
制御増幅器24の利得を制御する回路である。
This audio signal is amplified by variable gain control amplifier 24 and output to output terminal 25. The intermediate frequency amplifier 2
The signal No. 1 is also guided to the level detection circuit 26. This circuit detects the level of the intermediate signal and inputs the detected voltage to the meter drive circuit 27. The meter drive circuit 27 generates a drive signal for the display meter according to the level of the FM intermediate frequency signal. The meter voltage obtained by the meter drive circuit 27 is also given to the meter drive circuit 28. This mute sensitivity Eve circuit 28 is a circuit that controls the gain of the variable gain control amplifier 24 in response to changes in the meter voltage range.

この場合、本発明では、ミュートドライブ回路28に1
つの外付−ン30が設けられ、これに接続された可変抵
抗31及び基準電圧源32を介して、ミュート感度及び
ミ、−ト量を調整することができる。基準電圧源32は
、電源回路33からの出力電圧が可変抵抗34で取り出
せるように構成されている。なお36は、ピーク検波出
力(オーディオ信号)のレベルを判定する回路であシ、
検波出力と周波数の所定の関係を監視している。つまり
、同調、離調状態を判定し、いわゆる8字検波出力にお
ける同調周波数領域を設定している。同調状態を判定す
ると、停止信号発生回路37に信号を送シ周波数走引動
作の停止信号を発生させる。
In this case, in the present invention, the mute drive circuit 28
Two external pins 30 are provided, and the mute sensitivity and the amount of mute can be adjusted via a variable resistor 31 and a reference voltage source 32 connected to the external pins 30. The reference voltage source 32 is configured such that the output voltage from the power supply circuit 33 can be taken out by a variable resistor 34. Note that 36 is a circuit for determining the level of the peak detection output (audio signal);
A predetermined relationship between detection output and frequency is monitored. In other words, the tuned or detuned state is determined, and the tuned frequency region in the so-called figure-8 detection output is set. When the tuning state is determined, a signal is sent to the stop signal generation circuit 37 to generate a stop signal for the frequency scanning operation.

第2図は、本発明の特徴部を示すもので、基本的に示し
ている。第1図と同一部は、同符号を付して説明するに
、メータ駆動回路27のメータ電圧は、トランジスタQ
1によって構成されるエミッタフォロア回路によって電
圧電流変換され、ビンP1に接続された抵抗Rsに流れ
る電流となる。このトランジスタQ1のコレクタ電流は
、電流源41を制御する。電流源41は、電源Vccと
ビン30間に接続されており、また、トランジスタQ1
とともに、カレントミラー回路を形成している。従って
、トランジスタQlに電流工、が流れると、電流源41
からは、電流KI。が出力される。ここで、ビン30に
は、可変抵抗31が接続されているので、K工。×RM
(RM ;可変抵抗31の値)分だけここの電圧が上昇
する。これによって、可変利得制御増幅器24の利得が
上り、入力信号強度が犬になるに従って出力端子25の
検波出力が大になる。一方、入力信号レベル(電界強度
)が低い場合は、ビンP1の電圧はOvであり、−ン3
0の電圧は、基準電圧源32の電圧に固定される。つま
シ、ミーート量が設定されたことになる。
FIG. 2 shows a basic feature of the present invention. The same parts as in FIG. 1 are given the same reference numerals and will be explained.
1 is converted into voltage and current by the emitter follower circuit configured by P1, and becomes a current flowing through the resistor Rs connected to the pin P1. The collector current of this transistor Q1 controls a current source 41. Current source 41 is connected between power supply Vcc and bin 30, and transistor Q1
Together, they form a current mirror circuit. Therefore, when current source 41 flows through transistor Ql,
From then on, current KI. is output. Here, since the variable resistor 31 is connected to the bottle 30, the K process is performed. ×RM
The voltage here increases by (RM; value of variable resistor 31). This increases the gain of the variable gain control amplifier 24, and as the input signal strength decreases, the detection output at the output terminal 25 increases. On the other hand, when the input signal level (electric field strength) is low, the voltage of bin P1 is Ov, and -
The voltage of 0 is fixed to the voltage of the reference voltage source 32. This means that the amount of meat has been set.

上記の構成によれば、基準電圧源32の電圧(ミーート
量設定値)を常に基準として、ミュート感度はに■sR
Mで設定され、抵抗3ノの値でその傾きを設定すること
ができる。第3図は、ビン30の゛「5圧VMと、ミー
ート貸の関係を示すもので、本回路では、電圧VMの変
化に対して、ミュート量の変化を押え、−例として20
 dB/1vの場合を考えている。
According to the above configuration, the mute sensitivity is always set to the voltage of the reference voltage source 32 (the mute amount setting value).
M is set, and its slope can be set by the value of resistor 3. FIG. 3 shows the relationship between the 5 voltage VM of the bottle 30 and the mute lending. In this circuit, the change in the mute amount is suppressed with respect to the change in the voltage VM.
We are considering the case of dB/1v.

第4図(a) (b)は、上述した夕1付回路の他の例
である。第4図(、)において、抵抗R1,R2の直列
回路は、基準電圧と接地間に接続され、ミュート量用の
電圧VMを設定する。また、抵抗R1゜R2の接続点と
2ン30間に接続される抵抗R1′3は、先のミュート
感度設定用の抵抗である。
FIGS. 4(a) and 4(b) show other examples of the above-mentioned circuits with the 1st line. In FIG. 4(,), a series circuit of resistors R1 and R2 is connected between a reference voltage and ground, and sets a voltage VM for the amount of muting. Further, the resistor R1'3 connected between the connection point of the resistors R1°R2 and the 2-pin 30 is the resistor for setting the mute sensitivity described above.

さらに、第4図(b)の回路は、抵抗R2がミュート感
度設定用としても働くように利用したものであシ、先の
抵抗R3を省略した例である。
Furthermore, the circuit shown in FIG. 4(b) is an example in which the resistor R2 is used to also function as a mute sensitivity setting, and the resistor R3 mentioned above is omitted.

〔発明の効果〕〔Effect of the invention〕

上記したように、この発明によればミュート量、ミュー
ト感度設定用の外部ビンを1つにすることかできる。こ
れによって、ミュート感度は、この外部ビンに与えられ
る基準バイアスを基本として利得制御増幅器の利得を約
】V以上の変化範囲で徐々に変化させる。この結果、ミ
ュート量の特性とミュート感度の特性はスムーズに連続
し、ミュート動作の急峻な変化はない。
As described above, according to the present invention, the number of external bins for setting the mute amount and mute sensitivity can be reduced to one. Thereby, the mute sensitivity gradually changes the gain of the gain control amplifier over a range of about ]V or more based on the reference bias applied to this external bin. As a result, the characteristics of the mute amount and the characteristics of the mute sensitivity continue smoothly, and there is no steep change in the mute operation.

才だ、ミx t”感度、ミュート量を調整するのに1本
の抵抗を操作すれば良く、調整作業が容易である。さら
にまた、電流変換は、集積回路の外部に接続される抵抗
に依存しているため、集積回路内の特性ばらつきに対し
ても容易に対処することができる。
It is easy to adjust the sensitivity and mute amount by operating one resistor.Furthermore, current conversion is performed by using a resistor connected outside the integrated circuit. Therefore, it is possible to easily deal with variations in characteristics within the integrated circuit.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明の一実施例を示す回路図、第2図はこ
の発明の要部を示す回路図、第3図は第2図の可変利得
制御増幅器の制御電圧対ミュート量の関係を示す説明図
、第4図<a)(b)はそれぞれこの発明の要部の抵抗
接続例を示す図、第5図はミュート量、ミュート感度の
設定された信号処理回路の特性説明図である。 2ノ・・・FM中間周波増幅器、22・・・ピーク検波
回路、24・・・可変利得制御増幅器、26・・・レベ
ル検波回路、27・・メータ駆動回路、28・・・ミュ
ートドライブ回路、3o・・・外部ピン、3ノ・・・可
変抵抗、32・・・基準電圧源。 出願人代理人 弁理士 鈴 江 武 彦第3 因 第4図 (a) (b) 第5図
Fig. 1 is a circuit diagram showing an embodiment of the present invention, Fig. 2 is a circuit diagram showing the main part of the invention, and Fig. 3 shows the relationship between the control voltage and the muting amount of the variable gain control amplifier shown in Fig. 2. FIG. 4A and FIG. 4B are diagrams each showing an example of resistor connection of the main parts of the present invention, and FIG. . 2 No... FM intermediate frequency amplifier, 22... Peak detection circuit, 24... Variable gain control amplifier, 26... Level detection circuit, 27... Meter drive circuit, 28... Mute drive circuit, 3o...external pin, 3no...variable resistor, 32...reference voltage source. Applicant's agent Patent attorney Takehiko Suzue No. 3 Figure 4 (a) (b) Figure 5

Claims (3)

【特許請求の範囲】[Claims] (1)FMM間周波信号を増幅するF’M中間周波増幅
器と、この増幅器の出力が与えられる検波回路と、この
検波回路の検波出力を、利得制御端に与えられる制御電
圧に応じて増幅する可変利得制御増幅器と、前記F M
中間周波増幅器の出力信号のレベルを検波し直流検出電
圧を得るレベル検波回路と、このレベル検波回路の出力
直流検出電圧を、電流変換し集積回路の第1のビンに接
続された第1の抵抗に流す電圧電流変換手段と、前記第
1の抵抗に流れる電流によって、 前記集積回路内の電流源が制御され、この電流源の電流
を前記集積回路の第2のピンに与えるミュートドライブ
回路と、 前記第2のピンに外付部品として接続され、基準電圧源
によシバイアスされた第2の抵抗と、前記第2のビンに
生じた前記基準電圧源の電圧をミュート量設定用、前記
第2の抵抗に流れる電流によシ生じた電圧を前記可変利
得制御増幅器の利得を徐々に変化させるミュート感度用
として前記利得制御端に与える手段とを具備したことを
特徴とするFM信号処理回路。
(1) An F'M intermediate frequency amplifier that amplifies the FMM inter-frequency signal, a detection circuit to which the output of this amplifier is applied, and amplification of the detection output of this detection circuit according to the control voltage applied to the gain control terminal. a variable gain control amplifier; and the F M
A level detection circuit that detects the level of the output signal of the intermediate frequency amplifier to obtain a DC detection voltage, and a first resistor that converts the output DC detection voltage of the level detection circuit into a current and is connected to the first bin of the integrated circuit. a voltage-to-current conversion means for causing a current to flow through the integrated circuit; and a mute drive circuit in which a current source within the integrated circuit is controlled by the current flowing through the first resistor, and the current source from the current source is applied to a second pin of the integrated circuit; a second resistor connected to the second pin as an external component and biased by the reference voltage source; an FM signal processing circuit comprising means for applying a voltage generated by a current flowing through the resistor to the gain control terminal for use in mute sensitivity for gradually changing the gain of the variable gain control amplifier.
(2)前記電圧電流変換手段は、前記レベル検波回路か
らの直流検出電圧をメータ電圧として用いるメータ1嘔
動回路であることを特徴とする特許請求の範囲第1項記
載のFM信号処理回路。
(2) The FM signal processing circuit according to claim 1, wherein the voltage-current conversion means is a meter 1 oscillation circuit that uses the DC detection voltage from the level detection circuit as a meter voltage.
(3)前記基準電圧源は、前記集積回路内の安定化電源
回路の出力が与えられる抵抗回路網であることを特徴と
する特許請求の範囲第1項記載のFM信号処理回路。
(3) The FM signal processing circuit according to claim 1, wherein the reference voltage source is a resistor network to which an output of a stabilized power supply circuit within the integrated circuit is applied.
JP11438384A 1984-06-06 1984-06-06 Fm signal processing circuit Granted JPS60259009A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11438384A JPS60259009A (en) 1984-06-06 1984-06-06 Fm signal processing circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11438384A JPS60259009A (en) 1984-06-06 1984-06-06 Fm signal processing circuit

Publications (2)

Publication Number Publication Date
JPS60259009A true JPS60259009A (en) 1985-12-21
JPH0252444B2 JPH0252444B2 (en) 1990-11-13

Family

ID=14636298

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11438384A Granted JPS60259009A (en) 1984-06-06 1984-06-06 Fm signal processing circuit

Country Status (1)

Country Link
JP (1) JPS60259009A (en)

Also Published As

Publication number Publication date
JPH0252444B2 (en) 1990-11-13

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