JPS60257676A - Solid-state image pickup device - Google Patents

Solid-state image pickup device

Info

Publication number
JPS60257676A
JPS60257676A JP59113684A JP11368484A JPS60257676A JP S60257676 A JPS60257676 A JP S60257676A JP 59113684 A JP59113684 A JP 59113684A JP 11368484 A JP11368484 A JP 11368484A JP S60257676 A JPS60257676 A JP S60257676A
Authority
JP
Japan
Prior art keywords
region
photodiode
charge
solid
bccd
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59113684A
Other languages
Japanese (ja)
Inventor
Shigenori Matsumoto
松本 茂則
Toshihiro Kuriyama
俊寛 栗山
Masahiro Susa
匡裕 須佐
Yoshimitsu Hiroshima
広島 義光
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp, Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electronics Corp
Priority to JP59113684A priority Critical patent/JPS60257676A/en
Publication of JPS60257676A publication Critical patent/JPS60257676A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To decrease the reduction in signal electric charge due to the decrease in BCCD channel width by separating a BCCD for signal transfer and a photodiode of an adjacent picture element string by means of an insulator even at the deep depth of the substrate to suppress generation of smear noise. CONSTITUTION:A light incident in a P-channel silicon substrate 1 through an N region 2 forming a PN junction photodiode generates an electric charge. After the electric charge is stored in the PN junction capacitance, the charge is transited to the BCCD3 by a switching gate 4 and then transferred as a signal current. The BCCD3 is separated from the N region 2 forming the photodiode of adjacent picture elements at the depth of the P-channel silicon substrate by means of a silicon dioxide film 8. Thus, a part of electric charges is not invaded to the said N region 2 as shown in the arrow B' to reduce remarkably smear noise.

Description

【発明の詳細な説明】 産業上の利用分野 本発明はビデオカメラ等に用いられる固体撮像装置に関
するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a solid-state imaging device used in a video camera or the like.

従来例の構成とその問題点 近年、固体撮像素子の性能向上は目ざましいものがあり
、主として家庭用ビデオカメラ等の小型化を目的として
、既に実用段階に達してきている。とりわけ、光電変換
をPN接合フォトダイオードで行ない、電荷転送部をC
ODで形成するインターライン転送型CCD撮像素子は
Conventional Structures and Problems There has been a remarkable improvement in the performance of solid-state imaging devices in recent years, and they have already reached the stage of practical use, mainly for the purpose of downsizing home video cameras and the like. In particular, photoelectric conversion is performed using a PN junction photodiode, and the charge transfer section is
The interline transfer type CCD image sensor is formed using OD.

ノイズが少なく、高感度化が容易なことからその中心と
なりつつある。以下1図面を参照しながら、上述したよ
うな従来のCCD撮象索子について説明を行なう。
It is becoming popular because it produces less noise and can easily be made highly sensitive. The conventional CCD imaging device as described above will be explained below with reference to one drawing.

第2図は従来のインターライン転送型CCD撮像素子の
単位画素のCCDの転送方向に垂直な断面模式図を示す
ものである。第2図において、(1)はP形シリコン基
板、(2)は基板(1)と協同してPN接合フォトダイ
オードを形成するN形領域や(3)は埋め込みチャネル
CCD(BCCD)を形成するN影領域、(4)はN影
領域(2)、(3)間の〆板tJd基板面に形成された
酸化膜、(5)は酸化膜(4)上においてフォトダイオ
ードからBCCD(3)へ信号電荷を移すスイッチング
ゲートヲ形成するだめの多結晶シリコン膜、(6)は隣
接画素との分離領域を形成する選択酸化膜(LOCO8
)であり、(7)は選択酸化膜(6)の下部に形成され
たP 領域よりなるチャンネルストッパーである。なお
、図中の丸印は入射光により発生した電荷、また矢印は
基板内での電荷の動きを示したものである。
FIG. 2 is a schematic cross-sectional view perpendicular to the CCD transfer direction of a unit pixel of a conventional interline transfer type CCD image sensor. In Figure 2, (1) is a P-type silicon substrate, (2) is an N-type region that cooperates with the substrate (1) to form a PN junction photodiode, and (3) is a buried channel CCD (BCCD). N shadow area, (4) is the oxide film formed on the substrate surface of the final plate tJd between N shadow areas (2) and (3), (5) is the photodiode to BCCD (3) on the oxide film (4). (6) is a polycrystalline silicon film used to form a switching gate for transferring signal charges to the adjacent pixel, and (6) is a selective oxide film (LOCO8
), and (7) is a channel stopper made of a P region formed under the selective oxide film (6). Note that the circles in the figure indicate charges generated by incident light, and the arrows indicate the movement of charges within the substrate.

以上のように構成された単位画素について一以下その動
作を説明する。′まず、PN接合フォトダイオードを形
成するN影領域(21を通ってP形シリコン基板(1)
に入射した光は電荷を発生し。
The operation of the unit pixel configured as described above will be explained below. 'First, the P-type silicon substrate (1) passes through the N shadow region (21) that forms the P-N junction photodiode.
Light incident on generates an electric charge.

その大部分は矢印IAで示すように移動してPNN接客
容量蓄積される。これらの電荷は一定期間蓄積された後
、スイッチングゲート、;7(4+によりT3 CCD
 (31へと移され、その転送後−出力信号電流となる
Most of it moves as shown by arrow IA and accumulates PNN customer service capacity. After these charges are accumulated for a certain period of time, the switching gate;
(It is transferred to 31, and after that transfer, it becomes an output signal current.

しかしながら、上記のような構造ではスミア−ノイズの
発生および+ BCCD転送電荷量の減少という二つの
大きな欠点を有していた。すなわち、スミア−ノイズは
矢印Bで示すように電荷の一部が直接N影領域(3)に
流入するために発生するものであシ、偽信号となり画質
を著しく低下させるものである。
However, the above structure has two major drawbacks: generation of smear noise and decrease in the amount of +BCCD transfer charge. That is, smear noise is generated because a portion of the charge directly flows into the N shadow region (3) as shown by arrow B, and it becomes a false signal and significantly deteriorates the image quality.

一方%B CCDの転送電荷量の減少は、N影領域(3
)の幅、つまり転送チャンネルの幅が、LOCO8分離
における゛バーズビーク(くちばし形げおよびチャンネ
ルストッパーである高濃度ボロンの横方向拡散により一
狭められてしまうことによって生ずる。
On the other hand, the decrease in the transferred charge amount of %B CCD is due to the N shadow area (3
), that is, the width of the transfer channel, is narrowed due to the bird's beak in the LOCO8 separation and the lateral diffusion of high concentration boron, which is a channel stopper.

これらの欠点は一撮像素子を小型(Is・高集積化した
場合、一層著系コしく外るため、ビテ゛オカメラの小型
化、高性能化の大きな問題となっていた。
These drawbacks become even more serious when an image pickup device is made smaller (Is) and more highly integrated, and this has become a major problem in reducing the size and improving the performance of video cameras.

発明の目的 本発明は、上記欠点に鑑み、スミア−ノイズの発生が少
なく、かつ、小型化に際しても十分なr3号電荷を扱い
得る転送チャンチル幅とした固体撮像装置を提供するも
のである。
OBJECTS OF THE INVENTION In view of the above-mentioned drawbacks, the present invention provides a solid-state imaging device that generates less smear noise and has a transfer channel width that can handle sufficient r3 charge even when downsized.

発明の構成 この目的を達成するために1本発明の固体撮像装置は光
電変換部および光電変換部で発生した信!電荷を転送す
るCODを含むことにより構成される単位画素が、隣接
する単位画素とはCODチャネル部に比して実質的な深
さを有する絶縁体によシ分離されている構造全有してい
る。
Structure of the Invention In order to achieve this object, the solid-state imaging device of the present invention has a photoelectric conversion section and a signal generated in the photoelectric conversion section. A unit pixel including a COD that transfers charge is separated from an adjacent unit pixel by an insulator having a substantial depth compared to the COD channel portion. There is.

この構成によって、基板内で発生した電荷が隣接画素の
BCOD転送部へ直接流入する割合は減少するためスミ
ア−ノイズの大幅な低減が可能となる。また、絶縁体の
厚みは薄いためLOGO8分離におけるようなりCCD
チャネル幅の減少がなく、信号電荷量の大幅な増加が可
能となる。
With this configuration, the rate at which charges generated within the substrate directly flow into the BCOD transfer section of an adjacent pixel is reduced, making it possible to significantly reduce smear noise. In addition, since the thickness of the insulator is thin, CCD as in LOGO8 separation
There is no decrease in channel width, and the amount of signal charge can be significantly increased.

実殉例 以下、本発明の一実施例について図面を参照しながら説
明する。第り図は本発明の一実施例におけるCCD固体
撮像素子の単位画素断面模式図である。第1図において
、(8)は隣接する単位画素との分離領域を形成する二
酸化シリコン膜である。また−filはP形シリコン基
板、(2)、(31(iそれぞれフォトダイオードおよ
びBCCDを形成するN影領域、(4)は多結晶シリコ
ンゲートであり−いずれも第2図の構成と同じものであ
る。
EMBODIMENT OF THE INVENTION Hereinafter, one embodiment of the present invention will be described with reference to the drawings. FIG. 3 is a schematic cross-sectional view of a unit pixel of a CCD solid-state image sensor according to an embodiment of the present invention. In FIG. 1, (8) is a silicon dioxide film forming a separation region from adjacent unit pixels. Also, -fil is a P-type silicon substrate, (2) and (31(i) are N shadow regions forming the photodiode and BCCD, respectively, and (4) is a polycrystalline silicon gate. It is.

二酸化シリコン膜/+stの形成は塩素系ガスを用いた
反応性イオンエツチング法によるシリコン基板のエツチ
ング後−シランガスと酸素ガスを用いたCVD法等の従
来技術で容易に形成可能である。
The silicon dioxide film/+st can be easily formed by conventional techniques such as etching the silicon substrate by reactive ion etching using chlorine gas and then CVD using silane gas and oxygen gas.

以上のように構成された単位画素の動作は次のとおりで
ある。
The operation of the unit pixel configured as above is as follows.

まず、PN接合フォトダイオードを形成するN影領域(
2)を通ってP形シリコン基板(1)に入射した光は電
荷を発生する。電荷はPN接合容量に蓄積された後−ス
イッチングゲート(4)にょシBCCD(3)へ移され
、信号電流として転送される動作は第2図に示す従来構
造例と同じである。
First, the N shadow region (
The light incident on the P-type silicon substrate (1) through 2) generates charges. After the charge is accumulated in the PN junction capacitance, it is transferred to the switching gate (4) and then to the BCCD (3), and the operation of transferring it as a signal current is the same as in the conventional structure example shown in FIG.

しかしながら、本実施例によればBCCDf3)は隣接
する画素のフォトダイオードを形成するN影領域(2)
とは二酸化シリコン膜(7)によpPP形リコン基板の
深部1で完全に分離されているため、矢印B/のように
電荷の一部がそのN影領域(3)に混入することはなく
、スミア−ノイズを大幅に低減することができる。
However, according to this embodiment, BCCDf3) is the N shadow area (2) forming the photodiode of the adjacent pixel.
Since it is completely separated from the silicon dioxide film (7) in the deep part 1 of the pPP type silicon substrate, part of the charge does not mix into the N shadow region (3) as shown by arrow B/. , smear noise can be significantly reduced.

さらに−LOCO8分離における。いわゆる11バーズ
ビーグ′7や、チャンネルストッパーとしてのボロンの
高濃度領域が不要なため一13CODチャンネル副の減
少による転送電荷量の減少は全く発生しない。
Further in -LOCO8 separation. Since a so-called 11 bird's beag '7 or a high concentration region of boron as a channel stopper is not required, the amount of transferred charge does not decrease at all due to a decrease in the number of 113 COD channels.

なお1本実強例ではシリコン基板をP形としたが、N形
基板にPウェルを形成しその中に素子を構成するPウェ
ル構造においても同様の効果が得られる。また−PN接
合フォトダイオードとしたが、化合物半導体あるいはア
モルファスシリコン膜等を積層した構造でも同様の効果
が得られる。
In this practical example, the silicon substrate is of P type, but the same effect can be obtained with a P well structure in which a P well is formed on an N type substrate and elements are configured therein. Further, although a -PN junction photodiode is used, a similar effect can be obtained with a structure in which compound semiconductors, amorphous silicon films, or the like are laminated.

発明の効果 以上のように1本発明は、信号転送のためのB COD
と、隣接する画素列のフ第1・ダイオードが一基板深部
においても絶縁体で分離されているため、スミア−ノイ
ズの発生は大幅に抑制され、またBCCDチャンネル幅
の減少による信号電荷の減少も小さく、その実用的効果
は大なるものがある。
Effects of the Invention As described above, the present invention provides B COD for signal transfer.
Since the F1 diodes of adjacent pixel rows are separated by an insulator even deep within the substrate, the generation of smear noise is greatly suppressed, and the signal charge is also reduced due to the reduction of the BCCD channel width. Although it is small, its practical effects are great.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の実施例における固体撮像装置の単位画
素の断面模式図、第2図は従来の固体撮像素子における
単位画素の断面模式図である。 fl)−−−−−P形シリコン基板 +21.f、3+ −−−N影領域 (4)−・−m−多結晶シリコン膜 f5L (6)、(8)−−−:酸化シリコン膜f7)
 −−−−−−高濃度P形領域 特許出如人 松下電子工業株式会社 代 理 人 新 実 健 部 (外1名) 第1図 第2図
FIG. 1 is a schematic cross-sectional diagram of a unit pixel of a solid-state imaging device according to an embodiment of the present invention, and FIG. 2 is a schematic cross-sectional diagram of a unit pixel of a conventional solid-state imaging device. fl)---P-type silicon substrate+21. f, 3+ ---N shadow region (4)--m-polycrystalline silicon film f5L (6), (8) ---: silicon oxide film f7)
------High concentration P-type region patent author Kenji Arata Matsushita Electronics Co., Ltd. Agent (1 other person) Figure 1 Figure 2

Claims (1)

【特許請求の範囲】[Claims] 半導体基板の主表面に形成された光電変換部および前記
光電変換部に近接して前記主表面に形成され一同部にお
いて発生した信号電荷を転送するためのCCDチャネル
部を含むことにより構成される単位画素が、隣接する単
位画素とは、CCDチャネル部に比して実質的な深さを
有する絶縁(4(によシ分離されていることを特徴とす
る固体撮像装置。
A unit configured by including a photoelectric conversion section formed on the main surface of a semiconductor substrate and a CCD channel section formed on the main surface in proximity to the photoelectric conversion section for transferring signal charges generated in the same section. A solid-state imaging device characterized in that a pixel is separated from an adjacent unit pixel by an insulation (4) having a substantial depth compared to a CCD channel portion.
JP59113684A 1984-06-01 1984-06-01 Solid-state image pickup device Pending JPS60257676A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59113684A JPS60257676A (en) 1984-06-01 1984-06-01 Solid-state image pickup device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59113684A JPS60257676A (en) 1984-06-01 1984-06-01 Solid-state image pickup device

Publications (1)

Publication Number Publication Date
JPS60257676A true JPS60257676A (en) 1985-12-19

Family

ID=14618553

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59113684A Pending JPS60257676A (en) 1984-06-01 1984-06-01 Solid-state image pickup device

Country Status (1)

Country Link
JP (1) JPS60257676A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5563827A (en) * 1978-11-03 1980-05-14 Ibm Method of forming narrow mask opening in silicon substrate
JPS57109476A (en) * 1980-12-25 1982-07-07 Matsushita Electronics Corp Solid image pickup device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5563827A (en) * 1978-11-03 1980-05-14 Ibm Method of forming narrow mask opening in silicon substrate
JPS57109476A (en) * 1980-12-25 1982-07-07 Matsushita Electronics Corp Solid image pickup device

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