JPS60257629A - Receiver - Google Patents

Receiver

Info

Publication number
JPS60257629A
JPS60257629A JP11300984A JP11300984A JPS60257629A JP S60257629 A JPS60257629 A JP S60257629A JP 11300984 A JP11300984 A JP 11300984A JP 11300984 A JP11300984 A JP 11300984A JP S60257629 A JPS60257629 A JP S60257629A
Authority
JP
Japan
Prior art keywords
impedance element
voltage
current
line
resistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11300984A
Other languages
Japanese (ja)
Other versions
JPH0457254B2 (en
Inventor
Shinichi Akano
赤野 信一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Azbil Corp
Original Assignee
Azbil Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Azbil Corp filed Critical Azbil Corp
Priority to JP11300984A priority Critical patent/JPS60257629A/en
Priority to US06/736,920 priority patent/US4623871A/en
Priority to SE8502704A priority patent/SE458972B/en
Priority to DE19853519709 priority patent/DE3519709A1/en
Priority to GB08513986A priority patent/GB2160395B/en
Publication of JPS60257629A publication Critical patent/JPS60257629A/en
Publication of JPH0457254B2 publication Critical patent/JPH0457254B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B3/00Line transmission systems
    • H04B3/54Systems for transmission via power distribution lines
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B2203/00Indexing scheme relating to line transmission systems
    • H04B2203/54Aspects of powerline communications not already covered by H04B3/54 and its subgroups
    • H04B2203/5404Methods of transmitting or receiving signals via power distribution lines
    • H04B2203/5416Methods of transmitting or receiving signals via power distribution lines by adding signals to the wave form of the power source
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B2203/00Indexing scheme relating to line transmission systems
    • H04B2203/54Aspects of powerline communications not already covered by H04B3/54 and its subgroups
    • H04B2203/5404Methods of transmitting or receiving signals via power distribution lines
    • H04B2203/5425Methods of transmitting or receiving signals via power distribution lines improving S/N by matching impedance, noise reduction, gain control
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B2203/00Indexing scheme relating to line transmission systems
    • H04B2203/54Aspects of powerline communications not already covered by H04B3/54 and its subgroups
    • H04B2203/5462Systems for power line communications
    • H04B2203/5495Systems for power line communications having measurements and testing channel

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
  • Selective Calling Equipment (AREA)

Abstract

PURPOSE:To supply power only with a two-wire transmission line by controlling respectively the 1st variable impedance element inserted in series with the transmission line and the 2nd variable impedance provided in parallel with a load circuit. CONSTITUTION:The 1st control circuit comprising resistors R1, R2 and a differential amplifier A1 controls the impedance of a transistor (TR)Q1 in the direction making a line voltage VL constant in response to a voltage V1. Resistors R4, R5 and a differential amplifier A2 controls the impedance of a TRQ2 in the direction making the value of a current Ic passing through the resistor R3 constant in response to a voltage V2. A current Is flowing to a resistor Rs has the signal component only. A terminal voltage across the resistor Rs is convered into a digital signal by an analog-digital converter A/D1 and the signal is given to an operation circuit OP as a setting value.

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明は、工業プロセス等において、電流値によシ示さ
れる信号を受信し、バルブ等の制御対象機器を制御する
受信装置に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a receiving device that receives a signal indicated by a current value and controls a device to be controlled such as a valve in an industrial process or the like.

〔従来技術〕[Prior art]

工業プロセス等においては、バルブ等を遠隔制御する場
合、一般にポジショナと称される受信装置が設けられ、
中央の制御装置から例えば4〜20mAの範囲によシ変
化する電流値にょシ信号を伝送し、これを受信装置が受
信のうえ、電流値に応じた制御を行なうものとなってい
る。
In industrial processes, etc., when remotely controlling valves, etc., a receiving device called a positioner is generally installed.
A central control device transmits a signal indicating a current value that varies in the range of, for example, 4 to 20 mA, and a receiving device receives this signal and performs control according to the current value.

しかし、従来においては、信号を示す電流値の伝送用に
2線式伝送路を要すると共に、受信装置側において必要
とする電源を供給するため、別途に2線式電源路を必要
としており、合計4本の線路が不可欠であシ、線路の所
要線材量および布設工数が増加し、設備費が高価となる
欠点を生じている。
However, in the past, a two-wire transmission line was required to transmit the current value indicating the signal, and a separate two-wire power supply line was required to supply the power required by the receiving device. Four lines are indispensable, which increases the amount of wire required for the line and the number of man-hours for laying the line, resulting in high equipment costs.

いる。There is.

〔発明の概要〕[Summary of the invention]

本発明は、従来のかかる欠点を根本的に解決する目的を
有し、工業計測に用いられている4〜20mA等の統一
信号は、本来0〜16mA等の範囲によシ数値を表わし
、AmA等のバイアス成分を含んでいることに注目し、
2線式伝送路に対して第1の可変インピーダンス素子お
よび受信用のインピーダンス素子を直列に挿入し、伝送
路の線間電圧を一定化する方向へ可変インピーダンス素
子のインピーダンスを制御すると共に、これらと並列に
直列のインピーダンス素子および第2の可変インピーダ
ンス素子による直列回路を接続し、直列のインピーダン
ス素子に通ずる電流をバイアス成分に応じた一定値に保
つ方向へ制御のうえ、第2の可変インピーダンス素子と
並列に負荷回路を接続し、バイアス成分を受信装置側の
電源として用いることにより、2線式伝送路のみによっ
て電源の供給も行なえるものとした極めて効果的な、受
信装置を提供するものである。
The purpose of the present invention is to fundamentally solve these conventional drawbacks, and the unified signal of 4 to 20 mA used in industrial measurement originally represents a numerical value in the range of 0 to 16 mA. Note that it contains bias components such as
A first variable impedance element and a reception impedance element are inserted in series in a two-wire transmission line, and the impedance of the variable impedance element is controlled in a direction to keep the line voltage of the transmission line constant. A series circuit consisting of a series impedance element and a second variable impedance element is connected in parallel, and the current flowing through the series impedance element is controlled to be kept at a constant value according to the bias component, and then the second variable impedance element and the second variable impedance element are connected in parallel. By connecting a load circuit in parallel and using a bias component as a power source on the receiving device side, an extremely effective receiving device is provided in which power can be supplied only through a two-wire transmission line. .

〔実施例〕〔Example〕

以下、実施例を示す図によって本発明の詳細な説明する
Hereinafter, the present invention will be explained in detail with reference to figures showing examples.

第1図は回路図であシ、線路端子jl + j2を介し
て接続される2線式伝送路りは線路LI+L2からなっ
ておシ、これに対し第1の可変インピーダンス素子とし
てトランジスタQ+ のエミッタ・コレクタ間が直列に
挿入されていると共に、これのコレクタ側には受信用の
インピーダンス素子として抵抗器RBが直列に接続され
ている一方、これらと並列に、抵抗器R11R2による
分圧回路が接続され、かつ、直列のインピーダンス素子
としての抵抗器R3および第2の可変インピーダンス素
子として用いるトランジスタQ2のエミッタ・コレクタ
間による直列回路が接続されている。
Figure 1 is a circuit diagram, and the two-wire transmission line connected via line terminals jl + j2 consists of lines LI+L2, whereas the emitter of transistor Q+ serves as the first variable impedance element.・The collectors are inserted in series, and a resistor RB is connected in series on the collector side as a receiving impedance element, while a voltage divider circuit consisting of resistors R11R2 is connected in parallel with these. A series circuit is connected between the emitter and the collector of a resistor R3 as a series impedance element and a transistor Q2 used as a second variable impedance element.

また、トランジスタQ2と並列に、集積回路化された電
源安定化回路REG 、および、抵抗器R4゜R5によ
る分圧回路、ならびに、差動増幅器AI+A2が負荷回
路として接続されていると共に、電源安定化回路REG
を介し、アナログ・ディジタル変換器(以下、ADC)
 A/D+ 、 A/D2 、マイクロプロセッサおよ
びメモリ等からなる演算回路OP1ならびに、ディジタ
ル・アナログ変換器(以下、DAC) D/Aも負荷回
路として接続されている。
In addition, an integrated power supply stabilization circuit REG, a voltage dividing circuit formed by resistors R4 and R5, and a differential amplifier AI+A2 are connected in parallel with the transistor Q2 as a load circuit, and the power supply stabilization circuit REG is connected as a load circuit. circuit reg
Analog-to-digital converter (hereinafter referred to as ADC)
An arithmetic circuit OP1 consisting of A/D+, A/D2, a microprocessor, memory, etc., and a digital-to-analog converter (hereinafter referred to as DAC) D/A are also connected as load circuits.

とこにおいて、抵抗器RI+R2および差動増幅器A1
は、第1の制御回路を構成し、電源安定化回路REGか
らの基準電圧vr1に基づき、伝送路りの線間電圧vL
を抵抗器R1+ R2によシ分圧した電圧V、に応じ、
線間電圧vLを一定化する方向へトランジスタQ1のイ
ンピーダンスを制御しておシ、これによって、線路電流
ILO値にかかわらず線間電圧vLを例えばIOVの一
定値に保っている。
Here, the resistor RI+R2 and the differential amplifier A1
constitutes the first control circuit, and adjusts the line voltage vL of the transmission path based on the reference voltage vr1 from the power supply stabilization circuit REG.
According to the voltage V divided by resistors R1 + R2,
The impedance of the transistor Q1 is controlled in a direction to keep the line voltage vL constant, thereby keeping the line voltage vL at a constant value of, for example, IOV, regardless of the line current ILO value.

また、抵抗器R41R5および差動増幅器A2は、第2
の制御回路を構成し、電源安定化回路REGからの基準
電圧vr2に基づき、抵抗器R3の負荷回路側電圧vc
を抵抗器R4・R5によシ分圧した電圧■zに応じ、抵
抗器R3に通ずる電流Icの値を一定化する方向へトラ
ンジスタQ2のインピーダンスを制御しておシ、各負荷
回路の電源電流にかかわらず、電流Icを例えば4mA
の一定値に維持している。
Moreover, the resistor R41R5 and the differential amplifier A2 are connected to the second
The load circuit side voltage vc of the resistor R3 is configured based on the reference voltage vr2 from the power supply stabilization circuit REG.
The impedance of the transistor Q2 is controlled in the direction of keeping the value of the current Ic flowing through the resistor R3 constant according to the voltage z divided by the resistors R4 and R5, and the power supply current of each load circuit is Regardless of the current Ic, for example, 4 mA
is maintained at a constant value.

したがって、抵抗器R,IR2へ通ずる電流I + =
V L/ (R+ 十R2)は一定値となるため、抵抗
器RSに通ずる電流IBは、I s = I L (I
 c + I 、)となり、(Ia+I+)をバイアス
成分と等しく定めることにより、■8が例えばO〜16
mAの信号成分のみとなるだめ、抵抗器Rsの端子電圧
をADC−A/D、Kよりディジタル信号へ変換し、こ
れを設定値として演算回路opへ与えると共に、後述の
駆動装置DRからの実測値をADC−A/D2により同
様に変換して演算回路opへ与えれば、同回路opが制
御演算により制御信号を送出するものとなり、これをD
AC−D/Aによシアナログ信号へ変換し、後述の電空
変換器E/Pへ与えてバルブの開度を制御することによ
シ、設定値と実測値とが一致するものとしてバルブの開
度が設定される。
Therefore, current I + = flowing through resistor R, IR2
Since V L/(R+ + R2) is a constant value, the current IB flowing through the resistor RS is I s = I L (I
c + I, ), and by setting (Ia+I+) equal to the bias component, ■8 becomes, for example, O~16
In order to obtain only mA signal components, the terminal voltage of the resistor Rs is converted into a digital signal by the ADC-A/D, K, and this is given as a set value to the arithmetic circuit OP, and the actual measurement from the drive device DR, which will be described later, is If the value is similarly converted by the ADC-A/D2 and given to the arithmetic circuit OP, the circuit OP will send out a control signal by control calculation, and this will be sent to the D
By converting the AC-D/A into an analog signal and applying it to the electro-pneumatic converter E/P (to be described later) to control the opening of the valve, it is assumed that the set value and the measured value match. The opening degree is set.

なお、第1図においては、以上の動作により差動増幅器
Al+A2に対し負帰還が施されており、V、 =vr
1. v2=vr2の状態となっているため、次式が成
立する。
In addition, in FIG. 1, negative feedback is applied to the differential amplifier Al+A2 by the above operation, and V, =vr
1. Since v2=vr2, the following equation holds true.

ここにおいて、■r+ + vr2 は安定化されてい
るため、V、、VCも一定となり、次式が得られる。
Here, since ■r+ + vr2 is stabilized, V and VC are also constant, and the following equation is obtained.

すなわち、(I a + I + )が一定となる。That is, (Ia+I+) is constant.

一方、線路電流ILけ次式によって示される。On the other hand, line current IL is expressed by a quadratic equation.

I B −I L −(I c + I + ) ・・
・・・・・・・・・・・・・・・・ (5)したがって
、ILが例えば4〜20mA の場合、I C+ I、
= 4mAとすることにょシ、Is= O〜16mAと
なシ、Isによシ示される信号の受信に支障を力えず、
各負荷回路に対し最大AmAの電源電流を安定に供給す
ることができる。
I B −IL −(I c + I + ) ・・
(5) Therefore, if IL is, for example, 4 to 20 mA, I C + I,
= 4 mA, Is = 0 to 16 mA, without interfering with the reception of the signal indicated by Is.
A maximum power supply current of AmA can be stably supplied to each load circuit.

なお、中央の制御装置側では、定電流回路にょシ線路電
流ILの送出を行なっており、受信装置の入力インピー
ダンスが変化しても電流値に影響を与えることはない。
Note that the central control device sends the line current IL to the constant current circuit, so even if the input impedance of the receiving device changes, the current value is not affected.

第2図は、受信装置側の全構成を示すブロック図であり
、第1図に示す受信装置REがらの出力は電空変換器E
/Pへ与えられ、ここにおいて、圧気Pが受信装置RE
の出力に応じた圧力となシ、エアシリンダ等の駆動装置
DRへ送出され、これがパルプVを駆動して開度を制御
すると共に、駆動軸と連結されたポテンショメータ等に
より、現在の開度が実測値として検出され、受信装置R
Eへ与えられるものとなっている。
FIG. 2 is a block diagram showing the entire configuration of the receiving device, and the output from the receiving device RE shown in FIG.
/P, where the pressure P is given to the receiving device RE
A pressure corresponding to the output of the valve is sent to a drive device DR such as an air cylinder, which drives the pulp V to control the opening degree, and a potentiometer connected to the drive shaft controls the current opening degree. Detected as an actual measurement value, the receiving device R
It is given to E.

したがって、2線式伝送路のみにょシ、電源の供給も同
時に行なわれるものとなり、所要線材量および布設工数
が大幅に減少し、設備費の低減が達せられる。
Therefore, power is supplied to the two-wire transmission line at the same time, and the amount of wire required and the number of man-hours for installation are significantly reduced, resulting in a reduction in equipment costs.

ただし、第1図において、トランジスタQ 、+Q2の
代りに電界効果形トランジスタ、フォトカブラ等の制御
可能な他の可変インピーダンス素子を用いてもよく、抵
抗器R8+R3の代りにダイオード等のインピーダンス
素子を用いても同様であり、電源安定化回路REGを用
いず、定電圧ダイオード等によシ基準電圧vrl + 
vr2を発生し、負荷回路をすべてl・ランジスタQ2
と並列に接続してもよい。
However, in FIG. 1, other controllable variable impedance elements such as field effect transistors and photocouplers may be used in place of the transistors Q and Q2, and impedance elements such as diodes may be used in place of the resistors R8 and R3. The same applies to the case where the reference voltage vrl +
Generate vr2 and connect all load circuits to L transistor Q2.
may be connected in parallel.

なお、線路電流は、負荷回路の所要電源電流に応じてバ
イアス成分を定めればよく、モータ等を負荷回路として
使用することもできる。
Note that the bias component of the line current may be determined according to the required power supply current of the load circuit, and a motor or the like may also be used as the load circuit.

また、第2図においては、モータ等により駆動を行なう
ものとしてもよく、パルプ■の11かにダンパ、ポンプ
等を制御対象機器としても同様であり、本発明は種々の
変形が自在である。
In addition, in FIG. 2, the drive may be performed by a motor or the like, and the same applies to the equipment to be controlled such as dampers, pumps, etc. in the case of pulp (11), and the present invention can be freely modified in various ways.

〔発明の効果〕〔Effect of the invention〕

以上の説明によシ明らかなとおシ本発明によれは、2線
式伝送路のみにより受信側において必要とする電源の供
給も同時に行なわれるため、電源供給路が不要となり、
線路の設備費が大幅に低減し、電流値により示される信
号を受信する各種の受信装置において顕著な効果が得ら
れる。
As is clear from the above description, according to the present invention, the power required on the receiving side is simultaneously supplied only by the two-wire transmission line, so a power supply line is not required.
Line equipment costs are significantly reduced, and significant effects can be obtained in various receiving devices that receive signals indicated by current values.

【図面の簡単な説明】[Brief explanation of drawings]

図は本発明の実施例を示し、第1図は回路図、第2図は
受信装置側の全構成を示すブロック図である。 L・・・・2線式伝送路、QI、Q2・・・・トランジ
スタ(可変インピーダンス素子) 、R5r Rs・・
・・抵抗器(インピーダンス素子) 、R1+ R2+
R41R5・争・・抵抗器、RF、G・・・・電源安定
化回路、AI+A2 ・・・1差動増幅器。 特許出願人 山武ハネウェル株式会社 代理人 山川政樹(ほか2名) 手続補正書(自発) 昭和 年 月 日 特許庁長官殿 59.7,20 2、発明の名称 受信装置 3、補正をする者 事件との関係 特 許 出願人 名称(氏名) (666)山武ノ・ネウエル株式会社補
正によ一勺−増−加す−る一発4男の敗−・−=・−・
6 補止の内容 (1)明細書第2頁第1O行の「られ」をしられている
が、この様なフィールド機器は、」と補正する。 (2)同省第3頁第6行のI’AmAJをI’4mAJ
と補正する。 (3)同省第8頁第8行の「受信装置側の全構成を示す
」を1本発明による受信装置側の全構成を示す一例の」
と補正する。 (4)同省第9頁第4行乃至第6行の(、R3の・・・
であシ、」を下記のとおり補正する。 「によシ入力信号を電圧変換せず、直接電流値を読み取
る回路構成でも同様であシ、また、抵抗器R3の代りに
定電流ダイオード等の可変インピーダンス素子を用いて
も同様である。さらに、」 (5)回書同頁第16行の「本発明はJのっぎへ下記を
加入する。 [線路電流値の変化分を入力信号として動作する各種の
フィールド機器に対しても応用することができる等、本
発明け」 以上
The figures show an embodiment of the present invention, with FIG. 1 being a circuit diagram and FIG. 2 being a block diagram showing the entire configuration of the receiving device. L...2-wire transmission line, QI, Q2...transistor (variable impedance element), R5r Rs...
・Resistor (impedance element), R1+ R2+
R41R5・Resistor, RF, G・・Power supply stabilization circuit, AI+A2・・1 differential amplifier. Patent applicant Yamatake Honeywell Co., Ltd. agent Masaki Yamakawa (and 2 others) Procedural amendment (voluntary) Mr. Commissioner of the Japan Patent Office (Monday, Showa) 59.7.20 2. Invention title receiving device 3. Amendment person case Relationship Patent Applicant Name (Name) (666) Yamatake Newel Co., Ltd.'s amendment increases the loss of the 4th son.
6. Contents of the amendment (1) Although the ``are'' in the 1st line O of page 2 of the specification is known, such a field device is amended as follows. (2) I'AmAJ on page 3, line 6 of the Ministry of Finance is I'4mAJ
and correct it. (3) ``Indicates the entire configuration of the receiving device side'' on page 8, line 8 of the same Ministry of Japan.
and correct it. (4) The same Ministry, page 9, lines 4 to 6 (, R3...
"Ashi," shall be corrected as follows. The same effect can be achieved with a circuit configuration in which the current value is directly read without converting the input signal into voltage, or with a variable impedance element such as a constant current diode in place of the resistor R3. (5) On the same page of the circular, line 16, ``The present invention adds the following to J.Nogi. The present invention can be done, etc.”

Claims (1)

【特許請求の範囲】[Claims] 2線式伝送路へ通ずる線路電流の電流値によシ示される
信号を受信する受信装置において、前記伝送路に対し直
列に挿入された第1の可変インピーダンス素子と、該可
変インピーダンス素子と直列に接続された受信用のイン
ピーダンス素子と、前記伝送路の線間電圧を一定化する
方向へ前記第1の可変インピーダンス素子のインピーダ
ンスを制御する第1の制御回路と、前記第1の可変イン
ピーダンス素子およびインピーダンス素子に対し並列に
接続された直列のインピーダンス素子および第2の可変
インピーダンス素子による直列回路と、前記直列のイン
ピーダンス素子に通ずる電流値を一定化する方向へ前記
第2の可変インピーダンス素子のインピーダンスを制御
する第2の制御回路と、前記第2の可変インピーダンス
素子と並列に接続された負荷回路とを備えだことを特徴
とする受信装置。
In a receiving device that receives a signal indicated by a current value of a line current passing through a two-wire transmission line, a first variable impedance element inserted in series with the transmission line; a receiving impedance element connected thereto, a first control circuit that controls the impedance of the first variable impedance element in a direction to constant the line voltage of the transmission line, the first variable impedance element, and A series circuit consisting of a series impedance element and a second variable impedance element connected in parallel to the impedance element, and an impedance of the second variable impedance element in a direction that makes constant the current value flowing through the series impedance element. A receiving device comprising: a second control circuit for controlling; and a load circuit connected in parallel with the second variable impedance element.
JP11300984A 1984-06-04 1984-06-04 Receiver Granted JPS60257629A (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP11300984A JPS60257629A (en) 1984-06-04 1984-06-04 Receiver
US06/736,920 US4623871A (en) 1984-06-04 1985-05-22 Receiving apparatus
SE8502704A SE458972B (en) 1984-06-04 1985-05-31 DIALOGUE PROCEDURE AND DEVICE FOR IMPLEMENTATION OF THE PROCEDURE
DE19853519709 DE3519709A1 (en) 1984-06-04 1985-06-01 Dialog method and device for carrying out this method
GB08513986A GB2160395B (en) 1984-06-04 1985-06-04 Receiving apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11300984A JPS60257629A (en) 1984-06-04 1984-06-04 Receiver

Publications (2)

Publication Number Publication Date
JPS60257629A true JPS60257629A (en) 1985-12-19
JPH0457254B2 JPH0457254B2 (en) 1992-09-11

Family

ID=14601148

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11300984A Granted JPS60257629A (en) 1984-06-04 1984-06-04 Receiver

Country Status (1)

Country Link
JP (1) JPS60257629A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002075472A3 (en) * 2001-03-20 2003-05-08 Pepperl & Fuchs Method and device for inputting data into an electronic data processing device
JP2011082613A (en) * 2009-10-02 2011-04-21 New Japan Radio Co Ltd Signal processor

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4886066B2 (en) 2010-01-19 2012-02-29 グローブライド株式会社 Fishing spinning reel

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56145495A (en) * 1980-04-11 1981-11-12 Yokogawa Electric Works Ltd 2-wire type transmitter

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56145495A (en) * 1980-04-11 1981-11-12 Yokogawa Electric Works Ltd 2-wire type transmitter

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002075472A3 (en) * 2001-03-20 2003-05-08 Pepperl & Fuchs Method and device for inputting data into an electronic data processing device
US6853931B2 (en) 2001-03-20 2005-02-08 Pepperl + Fuchs Gmbh Method and device for inputting data into an electronic data processing device
JP2011082613A (en) * 2009-10-02 2011-04-21 New Japan Radio Co Ltd Signal processor

Also Published As

Publication number Publication date
JPH0457254B2 (en) 1992-09-11

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