JPS6025612Y2 - random number generator - Google Patents

Description

[Detailed Description of the Invention] This invention relates to a random number generation device that effectively generates random numbers in a small electronic calculator equipped with an auto power-off function.

Generally, a sequence of numbers having equal probability and irregularity is called a random number, and methods for generating such random numbers include those using calculations and those using counters.

In the former, random numbers are obtained by sequentially calculating predetermined initial values using methods such as square-like middle method, multiplicative congruence method, and mixed congruence method, and in the latter method, for example, the counter is operated by a relatively fast clock. The counter is constantly driven and the contents of the counter are taken out as needed and used as random numbers.

However, the former method has the disadvantage that it is difficult to set the initial value because the same random number will be generated if the initial value is the same, and that the control commands etc. are complicated due to complicated calculations.

Furthermore, in the latter method, highly accurate random numbers can be easily obtained by making the clock for driving the counter relatively fast, but on the other hand, a dedicated counter for random number generation is required, making the circuit configuration complicated. There were some drawbacks.

On the other hand, recently, in order to save power consumption, computers have been put into practical use that have an auto power-off function that automatically turns off the computer if no key operations are performed for a certain period of time while the computer is on.

Such a calculator is provided with a dedicated counter that measures the time interval between key operations in order to determine whether a key operation has been performed for a certain period of time.

This idea was made in view of the above points, and it is a small electronic calculator equipped with an auto power off function, and a random number generator that effectively generates random numbers using an auto power off counter. It is about providing.

An embodiment of this invention will be described below with reference to the drawings.

FIG. 1 shows the overall configuration of a small electronic calculator equipped with an auto power-off function.

In the figure, 11 is a power switch, and by turning on this power switch 11, the supply voltage VD
D is supplied to a CPU (central processing unit) 13 and a display section 14.

The auto power off switch 12 is, for example, a p-type MO
It uses an s transistor as a switching element, which is turned on when a ``0'' signal is input to the gate electrode, and turned off when a ``1'' signal is input to the gate electrode.

Further, the operation output of the power switch 11 is inputted to a one-shot circuit 17 via a one-shot circuit 15 and an inverter 16.

The output signal of the one-shot circuit 15 is inputted to a set terminal S of an R-5 flip-flop 19 via an OR circuit 18.

Further, the output signal of the one-shot circuit 17 is inputted to the reset terminal R of the flip-flop 19 via the OR circuit 20.

The output signal from the output terminal Q of the flip-flop 19 is input to the gate electrode of the switch 12, one input terminal of the AND circuit 21, and the OR circuit 22.

A key matrix circuit 23 has, for example, five input lines and four output lines, and a numeric keypad, function keys, etc. are connected to the intersections of each input/output line, and generates random numbers.

'RAN, key 231, and rACJ key 232 for canceling clear and auto power off are connected.

A timing signal is applied to the key matrix circuit 23 from a decoder 24 via an input line.

In this case, the OR circuit 22 is interposed between the lowest input line of the key matrix circuit 23 and the decoder 24.

A key operation signal output from the key matrix circuit 23 at the time of key operation is input to an AND circuit 25.

Further, the key operation signal is inputted to the reset terminal R of the auto power-off counter 27 and the other input terminal of the AND circuit 21 via the OR circuit 26.

Further, 28 is an oscillation circuit that outputs a reference frequency signal, and the reference frequency signal output from this oscillation circuit 28, for example, a 32.768K H2 signal, is input to the auto power-off counter 27 and the timing signal generator 29. be done.

The timing signal generation section 29 divides the frequency of the input reference frequency signal and sends the timing signal to the control section 30 and the like.

The carry signal output from the most significant digit to the auto power-off counter 27 is input to the reset terminal R of the flip-flop 19 via the OR circuit 20.

Furthermore, the digit data output from the auto power-off counter 27 is input to one input terminal of the AND circuit 31.

The digit data of the automatic power-off counter 27 outputted from the AND circuit 31 and the key operation signal outputted from the AND circuit 25 are inputted to a key manual buffer 32.

The key operation signals read into the key manual buffer 32 are output to a calculation storage section 33, where various calculations are performed based on the control signals output from the control section 30, and the results of the calculations are displayed on the display section 14.

Further, the calculation storage section 33 stores a count value of a counter provided in the calculation storage section 33 in the decoder 24, for example, 10 yo to r4. Output.

The decoder 24 decodes the input count value of the counter and sequentially sends "1" signals to the five input lines of the key matrix circuit 23.

The control section 30 outputs a read timing signal from the signal line a to the key manual buffer via the OR circuit 34.

Further, the control unit 30 reads a timing signal from the signal line b when operating the 'RAN key 231 and outputs it to the key manual buffer 32 via the OR circuit 34, and also outputs the timing signal to the key manual buffer 32 through the OR circuit 34, and outputs the timing signal to one input terminal of the AND circuit 31 or the inverter. A data l-control signal is sent to one input terminal of the an l-circuit 25 via the ann l-control signal 35.

Next, FIG. 2 shows a detailed configuration of the auto power-off counter 27. For example, the clock signal is 32.7
When 68 KHz is used, the time from the most significant digit to the carry signal is approximately 8.5 minutes.

Furthermore, the times at which the carry signal is output from the second and third digits of the auto power-off counter 27 are 1/128 seconds and 178 seconds, and the normal key operation interval is 1/2 seconds. Taking this into consideration, the contents of the second and third digits of the auto power-off counter 27 can be used as random numbers.

Next, the operation of this invention configured as above will be explained.

First, when the power switch 11 is turned on, a one-shot pulse is inputted from the one-shot circuit 15 to the set terminal S of the flip-flop 19 via the OR circuit 18.

Therefore, the flip-flop 19 is set, and the "0" signal output from the output terminal Q is input to the gate electrode of the auto power-off switch 12 and one input terminal of the AND circuit 21.

This turns on the auto power off switch 12,
A supply voltage VDD is supplied to the CPU 13 and the display section 14 .

Further, the gate of the AND circuit 21 is closed.

Next, when a key on the key matrix circuit 23 is operated, a "°1" signal is output from any one of the output lines of the key matrix circuit 23.

Therefore, a reset signal is outputted to the reset terminal R of the auto power-off counter 27 via the OR circuit 26, and the auto power-off counter 27 is reset.

The automatic power-off counter 27 is reset every time a key is operated.

Furthermore, the key operation signal is read into the key manual buffer 32 by a read timing signal sent from the control unit 30 via the input a.

The key operation signal read into the key manual buffer 32 is sent to the calculation storage section, and it is determined which key has been operated based on the control signal from the control section 30.

As a result of this determination, if the RAN key 231 is not operated, a predetermined calculation is executed based on the control signal corresponding to the key operation signal output from the keyboard 23, and the calculation result is displayed on the display unit 14. .

Next, when the 'RAN key 231 is operated, a key operation signal is sent to the calculation storage section 33 via the key manual buffer 32 as described above, and it is determined that the 'RAN key is pressed.

Next, the control section 30 outputs the "1" signal from the output line b, the AND circuit 31 is opened, and the AND circuit 25 is closed.

Then, for example, the second digit data counted by the auto power-off counter 27 is read into the key manual buffer 32 via the AND circuit 31.

Then, the random number data read into the key manual buffer 32 is sent to the calculation storage section 33.

Next, 1. For example, the third digit data is sent to the arithmetic storage section 33 and the auto power off counter 27
The second and third digit data are displayed on the display unit 14 as random numbers.

However, after the operator presses a key, the
If no key is operated, a carry signal from the APO counter 27 is input to the reset terminal R of the flip-flop 19 via the OR circuit 20.

From the output terminal Q of this flip-flop 19, “
A 1'' signal is output to the gate electrode of the auto power-off switch 12, the AND circuit 21, and the OR circuit 22.

Therefore, the auto power off switch 12 is turned off,
The supply of the supply voltage Vp□ to the control section 30 and the display section 14 is cut off.

Next, if you want to cancel this auto power off state,
'Operate the AC key 232.

This operation signal is input to the reset terminal R of the auto power-off counter 27 via the OR circuit 26, and resets it.

Furthermore, a "l" signal is input to the set terminal S of the flip-flop 19 via the AND circuit 21 and the OR circuit 18,
This is set.

From the output terminal Q of the flip-flop 19, "
A °0'' signal is sent to the gate electrode of the auto power-off switch 12, turning it on.

Then, the supply voltage VDO is supplied to the CPU 13 and the display unit 14 again.

In the above embodiment, the auto power-off counter 27 is provided outside the CPU 13;
Of course, the counter operation may be performed using the internal RAN (Random Access Memory) or the like.

As detailed above, according to this invention, in a small electronic calculator equipped with an auto power off function, a random number is obtained based on the data counted by the auto power off counter when a predetermined key is pressed. It is possible to provide a random number generation device whose circuit configuration can be simplified without the need to provide a special counter for random number generation.

[Brief explanation of drawings]

The drawings show one embodiment of this invention; Figure 1 shows the overall configuration of a small electronic calculator equipped with an auto power-off function, and Figure 2 shows the configuration of an auto power-off counter. be. 12... Auto power off switch, 23...
...Key matrix circuit, 231...RA
N key 27...Auto power off counter, 31...AND circuit, 32...Key manual buffer, 33...Calculation storage section.

Claims (1)

[Scope of utility model registration request] A small electronic calculator equipped with an auto power-off function includes a counting means for measuring the time interval between each key operation in the key manual section, and outputting the counted value of the counting means as a random number to the calculation storage means when a specific key is operated. A random number generator comprising: a control means for controlling