JPS60253331A - Initial value setting system in control start mode - Google Patents

Abstract

PURPOSE:To equalize the circuit distortions regardless of variation of the transmission characteristics in an MODEM by equalizing the distortions within the MODEM with return of own station to store the equalization value as the initialization value and starting the automatic equalization and the control of an automatic phase control circuit for the circuit distortions based on said initialization value. CONSTITUTION:Switches SW1 and SW2 are set at the dotted line sides for return at own station in order to equalize the distortions within an MODEM before the circuit distortions are equalized by the MODEM. In this case, the initialization value of the center value of a dynamic range is given previously to up/down counters 19, 23 and 27 from RAM29-31. Then the equalization is carried out, and the values of counters 19, 23, 27 are stored in RAM29-31 as the result of equalization. Then switches SW1 and SW2 are changed to the solid line sides to secure the actuation of the MODEM. In this case, the values stored in RAM29-31 are given to counters 19, 23, 27 as the initial values. Then the circuit distortions are equalized from the value obtained by equalizing the distortions within the MODEM. Therefore, a large distortion does not suddenly produce when the working is started.

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Technical Field of the Invention The present invention provides a modem having an automatic equalizer and an automatic phase control circuit that equalizes line distortion; This invention relates to an initial value setting method at the start of control that is not subject to change.

(b) Technical background In data lines that use analog transmission lines, the data signal on the transmitting side is converted to analog and used for the transmission line. In addition, modems usually have an automatic equalizer and an automatic phase control circuit to equalize line distortion in the transmission line.

(e) Prior Art and Problems A conventional modem having an automatic equalizer (hereinafter referred to as AEQ) and an automatic phase control circuit (hereinafter referred to as APC) for equalizing line distortion and its problems will be explained.

FIG. 1 is a block diagram of a conventional modem.

In FIG. 1, on the transmitting side, serially sent data is converted into a multilevel code by an encoding circuit 1, converted to analog by a digital-to-analog converter (hereinafter referred to as D/A) 2, and A low-pass F wave filter (hereinafter referred to as LPF) 3 performs Nyquist shaping, modulation is performed in a modulation unit (hereinafter referred to as MOD) 4, and a band pass R wave filter (hereinafter referred to as BPF) 5 removes unnecessary waves. is removed and sent to the transmission line.

On the receiving side, a phase-locked circuit (hereinafter referred to as a PLL circuit) extracts a carrier wave from the signal from which unnecessary waves of the analog signal sent through the transmission line have been removed using a BPF6.
The phase shifting circuit 17 of the carrier automatic phase control circuit (hereinafter referred to as CAPC) 14 sets the optimum phase, and in addition to the demodulator (hereinafter referred to as DEM) 7, demodulation is performed in the DEM 7, and unnecessary waves are passed through the LPF.
8, and the analog/digital converter (hereinafter referred to as A/
The signal is converted into a digital signal by an automatic equalizer (hereinafter referred to as AEQ) 9 (hereinafter referred to as D), subjected to waveform shaping so that there is no code amount interference, and input to the identification circuit 11.

The identification circuit 11 receives a polarity signal indicating whether the input signal is higher or lower than the center level of the multilevel signal, and an error signal indicating the magnitude of the equalizer compared with a reference signal representing a target equalized waveform, that is, the reference value. , AEQIO's correlation circuit identifies the level of the multi-level signal, and the decoding circuit 12 outputs the multi-level signal as a serial signal.

In this case, the PLL 15 extracts the timing clock from the output of the LPF 8, and the phase shift circuit 21 in the timing clock automatic phase control circuit (hereinafter referred to as TAPC) 16 outputs the timing clock with the optimum phase.
I* Separate circuit 111 '41 0 In AEQlo, the input signal is input to the shift register 25 and the delayed signal obtained from each tap is time-division multiplexed bit by bit. 26 is accumulated over the taps of register 25 to obtain a waveform equalized signal.

On the other hand, the correlation circuit 28 receives the polarity signal and the error signal from the identification circuit 11, calculates the correlation between the two for each tap, and provides the up/down counter 27 with a correction direction for equalization for each tap. In addition to correcting the equalization correction coefficient yi by the weight amount set in The level deviation (positive or negative) of the TAPC circuit 16 is calculated by the correlation circuit 24. It is applied to the correlation circuit 20 of the CAPC 14.

The correlation circuit 24.20 correlates the signals due to the shift in the two input timing phases and the shift in the two carrier phases, and uses an up/down counter 23.19 to determine the correction direction (positive direction).
The output of the up/down counter 23゜19 is changed in the correction direction, converted to DC by n/A 22*18, and the amount of phase shift of the phase shift circuits 21 and 17 is adjusted so that the timing clock and carrier wave have the optimum phase. Control.

Regarding the method of giving initial values to the up/down counters 19, 23.27, the up/down counter 19 is a typical example.
For example, let's take a 4-bit counter and explain it using Figure 2.The maximum value of 4 bits is ``1゜1.1.Biminimum value''o,
The center value "1°0, 0.0" of "o, o, o" is set as a fixed load value, the initial value is set to be the center of the dynamic range, and the load value is increased or decreased according to the correction direction from the correlation circuit 20. A count is performed, and the up or down value is converted into a DC signal by the o/A 18, and the amount of phase shift of the phase shift circuit 17 is controlled so that the carrier wave has an optimum phase.

However, since modems include analog circuits, their transmission characteristics (amplitude and delay characteristics) are subject to changes due to changes in temperature and humidity.

Therefore, if the modem is left in a low-temperature place without operating, and the change (distortion) in the transmission characteristics due to the low temperature is large, when the modem is turned on and starts operating, the amount of change (distortion) will be When distortion on the transmission path is superimposed and a large distortion suddenly occurs, the identification circuit 11 compares it with a reference signal representing the target equalized waveform to determine the magnitude of the reference value. In other words, when estimating the positive and negative directions, the multivalue level is used as the reference level, and from this reference level, the interval between the multivalue levels is 1/2.
If the level is greater than or equal to 1/2, it is considered positive, and if it is smaller, it is considered negative. However, if the level changes by more than 1/2 of the multi-value level interval, it enters the range of comparison based on the multi-value level, which is higher or lower, and is considered positive or negative. The estimation of the direction is reversed, resulting in a loss of control.

Normally, the rate of change in distortion is slow, so the above problem does not occur, but when the power is turned on and the modem starts operating, if the modem has a large distortion, thick distortion will suddenly occur, so this problem may occur. Occur.

(d) Purpose of the Invention The purpose of the present invention is to address the above problem and provide an initial value setting at the start of control that can equalize line distortion without being affected by changes in transmission characteristics within the modem when the modem starts operating. The purpose is to provide a method.

(e) Structure of the Invention The purpose of the present invention is to equalize distortion in the modem in advance by looping back to the local station, store the equalized value in a storage element as an initial setting value, and apply it to line distortion. This can be achieved by starting control of the automatic equalization and automatic phase control circuit from the initial setting value.

In other words, if you set the initial value at the start of control in this way, changes in the transmission characteristics within the modem have already been equalized and will not be superimposed with line distortion, so thick table distortion will suddenly occur. Line distortion can be equalized without having to do anything.

(f) Examples of the invention An embodiment of the present invention will be described below with reference to the drawings.

Fig. 3 is a block diagram of the system of the embodiment of the present invention.
is AEQ, 14' is CAP (', xs' is TAPC, 2
9. Glaze 31 indicates RAM5WI, and SW2 indicates a switch.

The difference between FIG. 3 and FIG. 1 is that switches SWI and SW2 are provided to enable loopback to the local station, and an up/down counter 19 is used to equalize distortion in the modem by loopback to the local station.
, 23.27 and stores the value of the equalizer up/down counter 19.23.27.
31 was provided.

In the case of FIG. 3, the switches SWI and SW2 are set to the dotted line side to return to the local station in order to equalize the distortion within the modem caused by temperature, humidity, etc. before equalizing the line distortion in the modem.

In this case, the up/down counter 19.23.27 has R
AM29-31) As before, give the initial setting value of the center value of the dynamic range, perform equalization, and set the value of the up/down counter 19°23.27 of the equalization result to R.
It will be stored on AM29-31.

Next, the switches SWI and SW2 are set to the solid line side to operate as a modem. The initial value at this time is RAM2
The values stored in 9 to 31 are transferred to the up/down counter 19,
23.27, and do not equalize the line distortion to the value that has already equalized the distortion in the modem, so that large distortion does not suddenly occur at the start of operation.

When asked how to give an initial value when returning to the own station and operating as a modem, using the up/down counter 19 as a typical example and using a 4-bit counter as shown in Fig. With the center value of the range 1'1°0,0.0'' as the initial value,
The distortion within the meter is equalized, and the value of the equalizer is, for example, 1.1.
If it becomes O, O, store this value in the RAM 29,
When starting line distortion equalization, this value is loaded into the up/down counter 19 as an initial value and control is started.

Therefore, when line distortion equalization is started, large distortion does not suddenly occur, and line distortion can be equalized.

(g) Effects of the Invention As will be explained in detail below, according to the present invention, when the modem starts operating, the distortion inside the modem is superimposed on the line distortion, so that the line distortion is not suddenly equalized. This has the effect of reducing the risk of failure to equalize.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a conventional modem, FIG. 2 is a block diagram of an example of setting an initial value to the up/down counter in FIG. 1, and FIG. 3 is a block diagram of a modem according to an embodiment of the present invention. FIG. 4 is a block diagram of an example of setting an initial value at the start of control to the 7-up down counter shown in FIG. In the figure, 1 is an encoding circuit, 2, 18, 22 are digital-to-analog converters, 3, 8 are reduction wave generators, 4 is a modulator, 5,
6 is a band-pass ν waveform generator, 7 is a post-adjuster, 9 is an analog-to-digital converter, 10.10' is an automatic equalizer, 11 is an identification circuit, 12 is a decoding circuit, 13. , 15 is a phase locked circuit;
14.14' is carrier wave automatic phase control circuit, 16.16'
is a timing clock automatic phase control circuit, 17.21
19, 23, 27 are up/down counters, 20, 24, and 28 are correlation circuits, 25 is a shift register, 26 is an arithmetic unit, and 29 to 31 are RAMs.

Claims (1)

[Claims] In a modem with an automatic equalizer and automatic phase control circuit that equalizes line distortion, 1! Distortion in the modem is equalized in advance by loopback to the local station, and the equalized value is stored as the initial setting value in the memory element r (memorized). An initial value setting method at the start of control, characterized in that control of an automatic phase control circuit is started.