JPS6025186Y2 - Television signal reception detection circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a circuit for detecting the reception state of television signals.

Such a circuit is necessary, for example, as means for supplying a station search stop signal to a station selection device having an automatic station search function.

FIG. 4 shows a device for selecting television broadcast channels using a PLL synthesizer and having an automatic station search function, in which 1 receives the output of a voltage-controlled local oscillator 8 of a tuner 7 from a terminal 9. A variable frequency divider 2 that divides the local oscillation frequency from the local oscillator 8 according to a frequency division signal applied to a terminal 10, a reference oscillator 4 to which a crystal oscillator 5 is externally attached, and the variable divider 2. A PLL having a comparator 3 that compares the phase of the output of the reference oscillator 4.
The output is applied to a low-pass filter 6 via a terminal 11, converted to DC, and sent to a local oscillator 8 of a tuner 7.
is supplied to control its oscillation frequency.

Reference numeral 12 denotes a control device that provides a division signal to the variable frequency divider 2 of the PLL/IC 1. This control device actually constitutes one device as a microcomputer, but this control device 12 is operated by operating the operation key 13. By doing so, the frequency divided signal is automatically changed.

More specifically, the operation key 13 can be used in one direction (up direction to sweep toward high channels) and in the opposite direction (down direction to sweep toward low channels, provided that when sweeping further down from the maximum channel of VHF) It has an up key and a down key for driving the camera to the highest channel of UHF), and these keys can be operated selectively.

When the operation key 13 is operated to change the division signal at the output terminal 14, the output of the frequency divider 2 changes, and the output of the phase comparator 3 also changes, causing the local oscillation frequency of the tuner 7 to change, so that the reception state has not changed until now. The tuner status will be removed from the channel that was on the channel.

In this way, when the local oscillation frequency of the tuner changes in the up or down direction and reaches the next channel, the VIP signal is detected in the circuit 19 that extracts the VIP carrier signal from the output of the VIP circuit 15 and smooths it. This detection output is added as a comparison signal to the first comparator 24 and compared with the reference voltage E1.

Synchronous separation circuit 29 connected to video detection circuit 16 at the same time
A circuit 20 detects and smoothes the horizontal synchronizing signal obtained by the circuit 20, and the output of this circuit 20 is sent to a second comparator 25 as a reference voltage EEE.

compared to The control device 12 is configured to stop the station search when the terminal 26 is at high level and the terminal 27 is at low level, but at the broadcast channel, the VIF signal and horizontal synchronization signal are obtained in accordance with the reception of the broadcast signal. The outputs of the first and second comparators 24 and 25 are respectively “
Since the signals become high and low, the branch signal obtained at the terminal 14 of the control device 12 stops changing, and the reception state of the channel is being set.

Further operation of the operation key 13 leads to the next adjacent channel through a similar operation.

In FIG. 1, 17 is a video circuit, 21 is a deflection circuit, 22 is a picture tube, 18 is an audio circuit, 23 is a speaker, and 28 is a volume control signal output terminal of a control device.

In the example of FIG. 1, the present invention can be said to relate to the configuration of a circuit 20 that uses a synchronization signal as a control signal for stopping a change in the output of the control device 12.

A conventional television signal reception detection circuit, which is the subject of the present invention, will be explained with reference to FIGS. 1 and 2. Conventionally, a flyback pulse P1 is applied to the base of the first transistor TR1 shown in FIG. As shown in FIG. 2A, in addition to the negative polarity, the first transistor TR1 is turned off only during the flyback pulse period and turned on during the other periods, and the base of the second transistor TR2 is connected to the output of the synchronous separation circuit 29,
Moreover, the positive polarity horizontal synchronizing pulse P2 (see Figure 2)
is added.

In such a case, when a television signal is being received, a horizontal synchronizing pulse P as shown in FIG.
2 is added to the base of the second transistor TR2,
When no television signal is being received, the output from the sync separator circuit 29 as shown in FIG. 2 is applied to the base of the second transistor.

The first transistor TR1 is turned off only during the flyback pulse period by the flyback pulse P1 shown in FIG.
An output of 2 is produced across this resistor R2.

However, since the first transistor TR□ is conductive outside the period of the flyback pulse, both ends of the resistor R4 are at zero potential.

Now, considering the state in which a television signal is received, the synchronization division circuit 29 outputs a horizontal synchronization pulse P2 shown at the beginning of FIG.
occurs at both ends of the low loss B4 during the flyback pulse period, which is the period in which the first transistor TR1 is turned off, and the smoothing circuit 3 consisting of the resistor R5 and the capacitor C1
0 and becomes a direct current, as shown in a in Fig. 2 (e).

When no television signal is received, the sync separation circuit 2
Since no horizontal synchronizing pulse is obtained from 9 and the output as shown in Figure 2 is given to the base of the second transistor TR2, when this is sampled by the flyback pulse, the voltage generated across the resistor R2 is as shown in Figure 2. 2, and when this is converted to DC by the smoothing circuit 30, it becomes as shown in b in FIG. 2E.

In this way, there is a difference in the output voltage generated at the terminal 31 when receiving a television signal and when not receiving a television signal.In the former case, the pulse is smoothed, whereas in the latter case, it is equal to the pulse width. This is because noise in the period is smoothed out.

In addition, in FIG. 2(e), 0 indicates the zero level.

However, in the case of such a conventional example, it is not possible to obtain a sufficiently large voltage difference between the output voltages a and b during reception and non-reception as shown in FIG. This is accompanied by the disadvantage that the detection operation becomes extremely unstable.

This is because sampling is performed using flyback pulses, so the sampling time is extremely short compared to one sampling period.

Incidentally, the above-mentioned disadvantages can be avoided by reducing the output voltage generated from the sync separation circuit when not receiving data, but in general, the sync separation circuit works well even if the composite video signal input to it becomes small. In order to perform the separation operation, the DC bias is set so that the output is at the synchronous side level when the input of the synchronous separation circuit is DC, so the output of the synchronous separation circuit is at a low level when not receiving data. I don't get it.

In the conventional circuit, the sampling period is reduced to 1/W of one period.
, the level of the normal horizontal synchronizing pulse P2 (Figure 2) is set to 10.
■If the average level of the synchronous separation circuit output when not receiving is 3■, then the two output voltages a and b are each IV1270rT.
IV, and there is only a voltage difference of about 350 mV with respect to the reference level E2 that should be set between them, and as mentioned earlier, accurate reception detection cannot be performed due to fluctuations in circuit conditions due to temperature changes. It may disappear.

For example, the present invention is a television that can increase the difference in output voltage between when a television signal is being received and when it is not being received by simply changing the polarity of the signal applied to the circuit shown in Figure 1 without substantially changing the circuit connection. This paper proposes a signal reception detection circuit.

The present invention will be explained below with reference to FIGS. 1 and 3.

FIG. 3A shows a flyback pulse P1 applied to the base of the first transistor TR, and contrary to the conventional example, the flyback pulse is given with positive polarity.

Therefore, in the present invention, the first transistor TR1 is conductive only during the flyback pulse period and is off during other periods.

Therefore, when a horizontal periodic pulse P2 as shown in FIG. 3 is applied from the synchronization separation circuit 29 when receiving a television signal, this pulse is invalidated by turning on the first transistor TR□ by the flyback pulse P□. Therefore, the output terminal 31 becomes OV (see a in FIG. 3).

When one valve is received, the output shown in FIG. 3 is given from the synchronous separation circuit 29, but this signal is invalidated during the flyback pulse period when the first transistor TR1 is conductive, and is generated across the resistor R4 during other periods.

Therefore, the voltage generated across the resistor w4 during non-receiving is as shown in FIG. 3 2, and when this is converted to DC by the smoothing circuit 30 consisting of the resistor R6 and the capacitor C1, it becomes as shown in b in FIG. 3 E.

In this way, the output voltage will be 2.7V [b in Figure 3 E] when the signal is received and when the OV1 signal is not received, and there will be a voltage difference of about 1.3V with respect to the reference voltage E2, so reception detection will be affected by temperature changes. It will not be damaged.

Note that the pulse applied to the first transistor TR1 may be a vertical retrace pulse instead of the flyback pulse.

In addition, in the case of the conventional example, the signal is at bi level when receiving a signal and is at low level when not receiving the signal, whereas in the implementation of the present invention, it is at low level when receiving the signal and is at bi level when not receiving the signal. This is relative to the device that uses the detection signal, and if necessary, it can be added via an inverter.

When applied to the device shown in FIG. 4, if the comparator 25 is changed so that if the output of 20 is greater than E2, it is bye, and if it is smaller, it is low. can be added.

As explained above, the television signal reception detection circuit of the present invention has a means for invalidating the output from the synchronization separation circuit with a pulse whose duty period is sufficiently short compared to the repetition period and validating it during periods other than the duty period [TR1, T.R.
2] and is equipped with a smoothing circuit 30 that converts the output of the above-mentioned means into direct current, so a large difference in output can be obtained between when receiving and not receiving a television signal, and the reception detection operation is stable. It is extremely effective.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of a television signal reception detection circuit, FIG. 2 is a signal waveform diagram for explaining a conventional reception detection circuit, and FIG. 3 is a circuit diagram for explaining a reception detection circuit of the present invention. It is a signal waveform diagram. FIG. 4 is a block diagram of a channel selection device using a reception detection circuit. TR1...First transistor, TR2...
...Second transistor, 30...Smoothing circuit, P
l...Flyback pulse, P2...
Horizontal sync pulse.

Claims (2)

[Scope of utility model registration request] (1) A circuit for detecting reception of a television signal, characterized by means for invalidating the output from the synchronization separation circuit with a pulse whose duty period is sufficiently short compared to the repetition period and validating it during a period other than the duty period. , and a smoothing circuit for converting the output of the means into direct current. (2) The means includes a first transistor whose emitter is grounded and whose base receives the pulse with positive polarity; the emitter is connected to the collector of the first transistor, the base is connected to the output of the synchronous separation circuit, and the collector is connected to the power source. a second transistor connected to the transistor, and a resistor connected in parallel between the collector and emitter of the first transistor,
2. The television signal reception detection circuit according to claim 1, wherein the smoothing circuit smoothes the output generated at both ends of the resistor.