JPS60249891A - Controller for plural dc motors - Google Patents

Abstract

PURPOSE:To accurately obtain a controller which has high followup by measuring the speed of a DC motor by a free-running counter, thereby eliminating the time loss of measuring the speed of the motor. CONSTITUTION:Signals from encoders EA, EB, EC are respectively input to one shot circuits OSA-OSC, and input as interrupt signal INT to a controller MPU1 through a NOR circuit. Signals from the encoders EA-EC are also input to latch circuits FFA-FFC, and signals PA0, PA1, PA2 stored at the rise are output. After the PA0-PA2 are read out by the MPU1, they are reset by a reset signal from the MPU1. The MPU1 inputs the value of a counter CNTR1 when the signal INT is input, calculates the difference from the value input at previous time to control the rotating speeds of motors MA-MC as the speed of the corresponding motor.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a rotation speed control device for a plurality of DC modes, and particularly relates to a control device for a plurality of DC modes suitable for use in a copying machine or the like. .

[Background of the invention]

A block diagram of the prior art is shown in FIG. In Figure 1, modele M
A and MB 9Me each have an encoder E^
, EB, and EC are installed correspondingly.

As the model rotates, the encoder outputs a signal with a frequency proportional to the number of rotations, as shown in FIG. 2E. DS is a data selector, and the encoder E A,' is selected by a signal from CTRL in the MPU.
One signal is selected from among the signals EB and Ec, and as shown in the INT signal in FIG. 2, a pulse signal synchronized with the rising edge of the encoder signal is output to CTRL as an interrupt INT signal. The MPU compares the preset rotation speed value of each mode with the actual rotation speed measured from the encoder signal that comes in through the DS, and makes sure that the actual rotation speed is always the same as the preset rotation speed. Motor EA, ET3. Ec driver device, DRIVA, DRIVB, DRIVC Nemo-J
(2) Outputs duty cycle data for energizing. DRIV
A-DRIVC turns on transistor QAIQB+Qc for a certain period of time according to data from the MPU. In this way, the rotational speed of the motors M^ to Me is controlled by the on time of Q A -Q c, that is, the duty value. For example, if the rotation speed of moder EA is lower than the preset rotation speed, the MPU outputs a data value to DRIVA that causes QA to be turned on for a longer time, thereby increasing the rotation speed of modele FA. Here V
is the power supply for driving the model. A method of detecting the mode rotation speed will be explained with reference to FIG. Now data selector D
S is assumed to be selected by the encoder EA signal.

The data selector sends a pulse signal INT synchronized to the rising edge of the EA signal to the entry block CTRL in the MPU.
Outputs an interrupt signal to. The CTRL section calculates the time from the first INT signal to the second INT signal using the oscillation section CK (
For example, the number of pulses from the crystal X (for example, composed of crystal X, etc.) is measured by a counter CNTR. This time is inversely proportional to the number of rotations of the moder, but by measuring the time, the number of rotations of the modele can be measured.

After measuring the rotation speed of the moder MA, CTRL then outputs a signal to DS to select the encoder EB, and measures the rotation speed of the moder MR in the same manner as described above.
Next, model M in the same way. Measure the number of rotations. The measured rotation speed and the preset rotation speed are compared by the calculation unit ALU, and the rotation speed is calculated for each motor. Outputs the on-time data value.

As shown in Figure 3, the INT signal is E A + E B
Generated by the rising edge of +Ec, E 8 + E
Since the B+Ec signals are not synchronized, for example, even if the EB double signal is selected by the ER selection signal, the INT signal will be delayed by the time between INT and INT due to En, as shown in the figure. In other words, 2 of the time t between INT and INT
It will require twice as much. This time becomes a complete waiting time, which has the disadvantage of worsening controllability.

[Purpose of the invention]

SUMMARY OF THE INVENTION An object of the present invention is to provide a control device for a plurality of DC moders and a method therefor, which eliminates time loss in speed measurement of the DC mode, has higher accuracy, and has good followability.

[Summary of the invention]

By measuring the speed of the DC mode with a free-running counter, measurement is always performed, thereby eliminating time loss.

[Embodiments of the invention]

An embodiment of the present invention will be described below using an example of three DC moders. FIG. 4 shows an outline of an apparatus according to an embodiment of the present invention. M A+ M n + M cr E A y
ER, Ec, QA, QB, Qc, DRI
VA, DRIVB.

DRIVC, GK, A, LU, CTRL
is the same as in Fig. 1.O3A is a one-shot circuit that captures the rising edge of the signal from EA and converts it into an interrupt signal.Similarly, O8B is a one-shot circuit that uses a signal from EB, and OSC is a one-shot circuit that uses a signal from EC. It is a circuit. NOR is O3A
This is a NOR circuit that combines the signals from , O8B, and OSC into one and inverts it. Further, FFA is a latch circuit that stores the rise of a signal from EA, FFB of a signal from EB, and FFC of a signal from EC. The movement of signals in the apparatus shown in FIG. 4 will be explained with reference to FIG.

In FIG. 5, φA is a signal from EA, φB is a signal from EB, and φC is a signal from Ec.
It has a frequency that corresponds to the rotational speed of A, MB, and Me. φ^, φB, φC are O3A, O3B, respectively.
Input to OSC, O8A.

O8B and OSC are respectively φ7. It captures the rising edge of φB and φC and outputs 0UTA, 0UTB, and 0UTC.

0UTA, 0UTB, and 0UTC are input to NOR, combined into one, inverted, output, and input to CTRL in control device MPU1 as interrupt signal INT. On the other hand, φ8. φB and φC are FFA and FFB.

It is also input to the FFC, and the signals PAO, PAL, and PA2 whose rises are captured and stored are output, respectively. P.A.
O, PAI, PA2 are loaded into MPUI, then MP
Reset signal RA from UL.

They are each reset by RB and RC. The old MP takes in the value of CNTR1 when the interrupt signal INT is input, calculates the difference from the previously taken value, sets it as the speed of the corresponding mode, and controls the rotation speed of the mode. The procedure for controlling the rotational speed of the modle is shown in the flowchart of FIG. 6, and the procedure for interrupt processing using the interrupt signal INT is shown in the flowchart of FIG. Moreover, the procedure of speed calculation is shown in FIG.

As shown in Figure 6, first it is determined whether or not to start mode A, and if it is not to be started, control moves to mode B. If it is to be started, then whether or not the speed measurement update flag for mode A is set is determined. to judge. If the speed measurement update flag is not set, the control goes to B mode. If the speed measurement update flag is set, the speed is calculated according to the procedure shown in Figure 8, and the duty is calculated based on that value. . Reset the speed measurement update flag during duty calculation. The calculated duty of the A mode is output to DRIVA to rotate the A mode. Similarly, the speed calculation, duty calculation for B mode, speed calculation and duty calculation for C mode are performed in sequence. As shown in FIG. 8, the speed measurement of the A mode is obtained by subtracting the previous value AMI of CNTR1 from the current value AM of CNTR1. Similarly, in the case of B and C mode speeds, BM to BM
I can be obtained by subtracting CMI from CM by nine. On the other hand, in the interrupt processing shown in FIG. 7, multiple interrupts are first enabled to prepare for overlapping interrupt signals, that is,
It is possible to process even if the rising edges of φA, φB, and φC occur almost simultaneously.

Next, the value of the free running counter CNTR1 is fetched, and then it is determined whether the interrupt is caused by φA or not.
It is determined whether or not O is set, and if it is set, it is processed as an interrupt due to φ. Next, a reset pulse RA is output to the FFA to reset the PAO. Then, the current value AM of the payment is set as the previous value AMI, and the value of the fetched CNTR1 is set as the new current value AM. Next, the speed measurement update flag is set, and the process moves on to determining whether or not the interrupt is due to φB. Similarly, the interrupt by φB,
Processes interrupts caused by φC. Furthermore, if the interrupt is not due to φ, the process immediately proceeds to determine whether the interrupt is due to φB. The case of φB and φC is the same as that of φ.

By performing speed measurement, speed calculation, and duty calculation in the manner described above, highly accurate control can be performed without causing any time loss in speed measurement.

〔Effect of the invention〕

According to the present invention, since there is no loss in speed measurement time, it is possible to control the rotational speed of a plurality of DC moders with high precision.

[Brief explanation of the drawing]

Fig. 1 is a configuration diagram of a conventional example, Fig. 2 is a diagram showing a method of measuring rotational speed in a conventional example, Fig. 3 is a detailed explanatory diagram of rotational speed measurement in a conventional example, and Fig. 4 is an embodiment of the present invention. FIG. 5 is a diagram explaining the signals in the device of FIG. 4, FIG. 6 is a flowchart showing the procedure for controlling the rotation speed of the moder of the present invention,
FIG. 7 is a flowchart 1 showing the procedure of interrupt processing.
FIG. 8 is a flowchart 1 diagram showing the procedure of speed calculation. MA...Modle A, MB...Modle B, MC...
-Model C, EA Encoder A, EB...Encoder B, Ec...Encoder C, QA...Transistor A, QB...Transistor B, Qc...Transistor C, DRIVA...Driver A, DRIVB-・
・Drive device B, DRIVC...Drive device C, DS...
・Data selector, MPU, MPUI...Overall control device, CTRL...Control unit, agent Patent attorney Akio Takahashi 1 figure house 2 figure K 3 figure also 4 figure 15 figure ΦC PA2-11-cho TO- to Ic

Claims (1)

[Claims] 1. A plurality of DC modes, and a rotation detector that outputs a signal with a frequency corresponding to the number of rotations of each of the DC modes;
a plurality of drive circuits that drive the DC mode;
In a DC mode multiple unit control device consisting of one control device that provides a signal for controlling the rotation speed of the moder to the drive circuit, the signal from the rotation detector is used as an interrupt signal, and the period of this interrupt signal is free. Calculate the speed of the DC mode by measuring with a running counter, and calculate the speed of the DC mode.
A control device for a plurality of DC mode units, characterized in that the device controls a plurality of DC mode units.