JPS60249496A - Jitter detector of reproduced video signal - Google Patents

Abstract

PURPOSE:To detect the jitter of a variation within a color burst period with relatively simple constitution by obtaining a jitter detection signal on the basis of an H signal and a color burst pulse separated from a reproduced composite video signal. CONSTITUTION:When normal reproducing of a disc player 1 is started, the reproduced composite video signal is obtained from a demodulating circuit 16, and the H signal and the color burst pulse are obtained by an H signal separating circuit 17 and a color burst separating circuit 18. These signals are applied to a jitter correcting signal generating circuit 19, and the jitter of a variation within the color burst period is detected. That is, the H signal and the color burst pulse are given to a shift register 35 through a signal processing circuit shown in the figure, and a jitter detecting signal to be inputted to a phase comparator 37 is generated there. A mirror 6 is operated in response to the jitter correcting signal from the phase comparator 37 to change a beam 9 in the track direction.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a device for detecting jitter (time axis error, time axis variation, or time pace error) in a reproduced video signal obtained from a video disc player or the like.

BACKGROUND OF THE INVENTION Jitter correction is performed because it is extremely difficult to rotate video discs without jitter. When performing this jitter correction, it is first necessary to detect the jitter, which has conventionally been done by one of the following two methods.

(1) Extract the horizontal synchronization signal (hereinafter simply referred to as I signal) of the reproduced composite video signal, and detect jitter based on the comparison between this H signal and a reference signal.

(2) Extract the color burst (color carrier synchronization signal) of the reproduced composite video signal and compare it with a reference signal to detect jitter.

The present invention relates to the latter. Problems to be Solved by the Invention By the way, the color burst frequency 1i+fac of the NTSC system composite video signal is 15.7 of the horizontal synchronization frequency fa.
Since it is 34263 kHz, fsc is 3.5795
It is said to be 45 MHz. This color burst has the following two properties.

(The phase is reversed every IIIH (horizontal scanning period).

(2) The phase is reversed every frame.

Therefore, in the conventional jitter detection method according to (2) above, a jitter detection pulse is formed at the zero cross (0 degrees and 180 degrees) of the color burst, and this pulse is compared with the reference signal.

In this way, the phase reversal every 1H of the color burst will not be a problem, but since the jitter detection pulse will be generated at twice the frequency of the color burst, the sick detection pulse will be extracted after a certain period of time from the H signal. Sometimes it is necessary to extract from a period of - time width of the period of the color burst.

Therefore, if one or more jitters occur in the period of the color burst, it becomes impossible to detect them. In order to solve this kind of problem, it is conceivable to extract one color burst pulse from a color burst pulse whose waveform is shaped by a limiter for color/<-st, and whose phase is inverted for each IH. However, since the arrangement of color bursts is alternately different for each IH, phase inversion must be started based on the specified IH.1. Shikashi,
It is difficult to start phase inversion based on the identified IH. SUMMARY OF THE INVENTION An object of the present invention is to provide a jitter detection device that can relatively easily obtain a jitter detection signal. A device for detecting jitter based on a color burst of a composite video signal reproduced from a reference signal and a horizontal synchronization signal separation circuit for separating a horizontal synchronization signal from the composite video signal; a color burst separation circuit that separates and obtains a square wave color burst pulse;
- a mystery circuit, such as the MMV (to) of the embodiment, which measures time up to a predetermined point during the burst pulse generation period;
In response to the output of the timer circuit, a constant time width shorter than the color burst pulse (for example, 7
A time designation pulse generation circuit that generates a time designation pulse (for example, the pulse shown in FIG. 5(C)) of 0 ns), and a time designation pulse generation circuit that generates a time designation pulse (for example, the pulse shown in FIG. and the phase of the color burst pulse is not inverted if a specified one of a leading edge and a trailing edge of the color burst pulse exists during the generation period of the time specified pulse. , a color burst pulse phase inversion circuit that inverts the phase of the color burst pulse after the other of the front edge and the trailing edge is detected when the other of the front edge and the trailing edge is detected; , a jitter detection signal corresponding to at least one of the color burst pulses obtained at the output stage of the color burst pulse phase inversion circuit after the center point of the generation period of the time designation pulse (for example, in FIG. This invention relates to a jitter detection device for a reproduced video signal, characterized in that it is equipped with a jitter detection signal generation circuit (for example, a shift register) that generates a jitter detection pulse (pulses).

According to the above invention, since the operation is substantially equivalent to extracting one of the color burst pulses obtained by shaping the color burst, it is possible to detect jitter having a fluctuation width within the period of the color burst. It becomes possible. That is, compared to a method in which jitter detection pulses are formed at both the leading edge and trailing edge of a color burst, jitter with twice the fluctuation width can be detected. Furthermore, jitter detection as described above can be easily performed.

Embodiment Next, an optical video disc player according to an embodiment of the present invention will be described with reference to FIGS. 1 to 8. 1st
In the figure, (1) is a video disc, (2) is a motor for rotating the disc, (3) is a laser beam source, and (4) is a motor for rotating the disc.
is a beam splitter, (5) is a mirror, and (6) is a rotating mirror for time axis position correction (tangential mirror).
, (7) is a rotating mirror for tracking and jumping, (8) is a condensing lens, (9) is a beam, (1G is a reflected beam detector, Qll is a jumping pulse generation circuit, α2 is a mirror (7)) (131 is a reflected beam, (14) is a drive device for the rotating mirror (6), α9 is a tracking control signal generation circuit, (Electric is a demodulation circuit for obtaining a reproduced composite video signal (reproduced video signal), 07) is H
The signal separation circuit is the color burst separation circuit (1!J
is a jitter correction signal generation circuit.

Before explaining in detail the jitter correction signal generating circuit α9 according to the present invention, the structure and operation of the entire disc player will be described. In the disc player shown in Figure 1, the disc (1
When normally playing back the composite video signal of 1, the disc (1
) is rotated by the motor (2), the beam (9) generated from the beam source (3) is focused and projected onto the disk (1), and the reflected beam α3) corresponding to the signal (3) is turned into a beam. It is read by the detector αQ, and the demodulation circuit (from 1B to NTSC
Obtain a composite video signal of the system. At this time, since the beam (9) does not necessarily scan the trunk on the disk (1) accurately, the tracking state is detected by a known method, and based on this detection, the tracking control signal generation circuit (151)
A tracking control signal is applied to the mirror drive device 02 from the mirror drive unit 02, and the position of the beam (9) in the disk radial direction is adjusted by rotating the rotating mirror (7). Also, since the scanning speed of the beam (9) is not always constant, a jitter correction signal is applied from the jitter correction signal generation circuit 9 to the mirror drive device q4 to control the rotation angle of the rotating mirror (6). By changing the position, the position of the beam (9) in the disk circumferential direction, that is, the position in the time axis direction is adjusted. In addition, the beam generation source (3),
Reproduction is performed while sending the beam (9) in the radial direction of the disk (1) by a mechanism (not shown) that sends the pink-up portion including the condenser lens (8) etc. in the radial direction of the disk (1).

Incidentally, on the disk (11), an NTSC composite video signal is recorded on a spiral track (1) as shown in FIG. 2, and the composite video signal is a color burst (color carrier synchronization signal ), and since each frame is recorded in such a form that the vertical blanking periods are arranged in a straight line extending in the radial direction of the disk (1), by making the playback beam jump in the vertical blanking period, Still playback, double speed playback, etc. are possible.However, when frames are switched by jumping, the phase of the color burst is reversed, so the phase at the time of the jump must be corrected.Figure 4 shows the color burst FIG. 4 (4) shows the phase of the color burst of the current trunk, and (4) of FIG. 4 shows the phase of the color burst of the adjacent trunk. As is clear from this figure, the phase of the color burst is opposite to that of the prisoner's color burst. Therefore, when the beam jumps from point a on the time axis in FIG. 4 to point b on the time axis in FIG. 4(B), the phase is reversed and normal color reproduction becomes impossible. Therefore, from point a to point C or d
2. Next, the jitter correction signal generation circuit (19) will be explained in detail. In the following explanation and in Figure 1, the monostable multivibrator is This jitter correction signal generation circuit α9 is the first OR game) (20+, 1f)T
type (trigger) flip-flop (2υ, first exclusive O
R game) (221, D-type flip-flop (39), first MMV as a timer that can change the output pulse width (231, second MMV (24+, inverter (b), third MMV @ and the second OR gate (2η
A first off-delay circuit (28) consisting of a fourth M M
A second off-delay circuit C311 consisting of V (29) and a third OR gate (to), a second exclusive OR gate (
321, second T-type (trigger) flip-flop <33
1. AND gate (341, 4th OR gate (4(
1. Consists of a shift register G51 as a jitter detection signal generation circuit, a reference signal generation circuit (to), and a sample-and-hold type phase comparison circuit C37), and is shown in FIGS. 5 to 7.
It operates as shown in the waveform diagram in the figure. Furthermore, Fig. 5 shows the state of the A-M point in Fig. 1 in the normal reproduction state of the IC, and Fig. 6 shows the state of A-M when a jumping pulse is generated and the output of the flip-flop @ becomes high level. 7 shows the input and output of the phase comparator circuit (3η).

When this disc player starts normal playback, a reproduced composite video signal is obtained from the demodulation circuit (16), and is output from the H signal separation circuit and color burst separation circuit connected thereto as shown in Figure 5. The H signal shown in Fig. 5 and the color burst pulse shown in Fig. 5 are obtained.

In addition, the color burst separation circuit aI includes a limiter for waveform shaping the extracted color burst into a rectangular wave,
A pulse train with a duty ratio of 50% as shown in FIG. 50 is generated. The output terminal of the H signal separation circuit clη is an OR gate (a)
Since it is connected to the trigger terminal σ) of the first T-type flip-flop Qυ through Low from level and flip to bell. One input terminal of the first exclusive OR gate □□□ is connected to the color burst separation circuit Nishiki, and the other input terminal is connected to the Q output terminal of the T-type flip-flop (211), so the T-type flip-flop (During the period when the output of 2υ is low, the color burst and pulse are sent out in a non-inverted state, and during the period when the output is high, the pulse is sent out with the phase inverted (polarity inverted).〇The first MM as a timer Since the trigger input terminal of V (231) is connected to the output terminal of the H signal separation circuit an, it is triggered at the leading edge (1+ time point) of the H signal, and as shown in FIG.
B) Predetermined period T + (tt - tt )”/l indicated by K
/ generates a message. Note that this predetermined period T is set to end at a predetermined time t during the color burst generation period, and is used to determine the extraction time of the color burst pulse.

The trigger terminal of the second M M V (24) is connected to the first M M V (24).
Since it is connected to the output terminal of M V (23), it is triggered at the trailing edge (time point 11) of the high level pulse shown in FIG. 70ns
generates a timed pulse. This 70 ns timed pulse is used to determine whether the leading or trailing edge of the color burst pulse is present in a specified phase state (polarity state) during a predetermined period of time; The output terminal of the second MMV (2(A)) is connected to the reset terminal of the D-type free-flop (3) via an inverter (2).

The data input terminal 0 of the D-type flip-flop 43g+ is +
(Connected to the power supply of
211 trigger terminal σ). The output of the inverter (251 in FIG. 5C) is at a low level only during the period when the 70 ns pulse is at a high level, and is at a high level during the other periods, so the D-type flip-flop C3
9 is the period from t2 to t3 (T
Only in 2) is the cent possible state. The D-type flimb block (31) is configured so that the leading edge of the color burst pulse shown in FIG. If a leading edge is present, +V at the data input terminal is launched at time 18, the flip-flop (39) is in the cent state, and the output from the Q output terminal as shown in FIG.
A high level output pulse is obtained as shown in FIG. 5(G), the leading edge of which triggers the T-type flip-flop (21), which inverts the output to a high level as shown in FIG. 5(F). As a result, after a point slightly later than point 13, Figure 5 (
As shown in FIG. 5, the phase inverted output of the color burst Hals 00 is obtained.

In addition, DW Freepflotz 7'CI'9] is 70
Since it is reset at time t5 when the pulse of ns ends, the pulse in FIG. 5C) also becomes a low level at time 13.

As shown in FIG. It means something.

In this embodiment, in order to extract one of the color burst pulses after phase inversion and detect jitter based on this, the MM connected to the output terminal of the first MMV C231
V (261 and Kono M M V (2e) output and the first
A first example of an off-delay circuit is provided, consisting of an OR gate with the output of the MMV (231 as an input).This first off-delay circuit (28) Only the edge is delayed until < 1 < time point as shown in FIG. 5(I).

Note that the delay time from t2 to t4 is 35 ns.

Therefore, the trailing edge (t4) of the high level pulse in FIG. 5(I)
is located in the middle of the 70 ns pulse of FIG. 5 (O).

Since the example shown in Fig. 5 is not in the jumping mode, the output of the T-type flip-flop (field) connected to the jumping pulse generating circuit (111) is low-level IT as shown in Fig. 5.
, l K is maintained. Therefore, the output of the T-type flip-flop and the output of the first exclusive OR gate (221) are input to the second exclusive OR gate (32 performs phase inversion of the pulse shown in FIG. Instead, the pulse shown in FIG. 5I is output.

The second OFF delay circuit 0D is connected to the second MMVCI! The 105 ns M M V (
29+, and further includes the output of M M V (29) and 70 in Fig. 5 (C) that does not pass through M M V (29).
ns pulse as input, so only the trailing edge of the 70 ns pulse in FIG.
Send out the pulse shown in FIG. 5(J) delayed by s. In addition,
The trailing edge of the second OFF delay circuit Oυ output pulse shown in FIG. 5(J) is 140 ns longer than the trailing edge (t4) of the pulse in FIG. 5(I) (time equivalent to 180 degrees of color burst). Only has been delayed.

AND gate C341 connects the output of OR gate (a) and T
Since the input is the output of the type flip-flop (33), the input is the output of the T-type flip-flop (C33) as shown in the fifth drawing.
If the output of is at a low level, the high level pulse shown in FIG.

The OR gate (40) is connected to the output of the AND gate (34) and the output of the AND gate (34).
The output of the R gate (2η) is input, and the output shown in Figure 5 is generated. In the case of Figure 5, the output of the AND gate 0 is at a low level, so the pulse in Figure 5 (I) is It appears in the output of (40) as shown in Figure 5 (■).

The shift register C35+ forms a jitter detection signal (phase comparison input), and is, for example, a 5-bit shift register, with a shift pulse (clock) connected to the output terminal of the second exclusive OR gate (321). It has an input terminal σ), a load terminal ■ connected to the output terminal of the OR gate (40), and an output terminal (Q, OR gate) (4
For example, "00010" is written during the period when the output of 01 is at a high level (for example, 11 to 14), and from the time when the input of the load terminal
A shift operation is performed for each color burst pulse shown in the fifth drawing sent from C32).

In this example, the state is "00010" before the start of the shift, so in response to the leading edge of the first color burst pulse after the shift becomes possible at time point 11, the high level shown in FIG. The output is generated at time 16 and returns to a low level at the leading edge of the next color burst pulse. As a result,
In the case of Fig. 5, T, -1-35 ns, that is, Fig. 5 (70, ns of 0) The first color burst pulse generated after this pulse center point is output as a jitter detection signal. Ru.

The output terminal of the shift register θ9, which functions as a jitter detection signal generation circuit, is connected to one input terminal of a phase comparison circuit (371), and the other input terminal of the phase comparison circuit G is connected to a reference signal generation circuit (371). In this embodiment, the reference signal generating circuit (G) generates the ramp voltage shown in FIG. , Figure 7 (
The output pulse (fifth pulse) of shift register C35+ shown in B)
The ramp voltage is sampled and held using the same pulse as shown in Figure 87 (C'), and the jitter correction signal (
generates a time axis error signal). Since the output terminal of the phase comparison circuit 0η is connected to the mirror drive circuit side, the mirror (6) operates in response to the jitter correction signal, and the beam (
9) in the track direction (time axis direction) to obtain a control state in which the phases of the reference signal and the jitter detection signal corresponding to the color burst pulse are matched.

In FIG. 5, at time 17, the next H signal is generated as shown in FIG. 5, and the output of the T-type slip flop (21+) becomes low level as shown in FIG.

As a result, j? In the subsequent IH, the color burst pulse is input to the shift register a9 without phase inversion. In addition, since there is a phase difference of 180 degrees between the IH before t7 and the IH after t7 and the color burst pulse in FIG.
) is the trailing edge of the color burst pulse; the leading edge is absent. Therefore, no pulse for phase inversion (polarity inversion) is generated from the D-type flip-flop Gl.

The shift register 351 outputs a jitter detection signal at time t11 in response to the leading edge of the color burst pulse that occurs first after time 10.

7 in the color burst pulse after correction in Figure 5 ■
Within the period of 0 ns pulse, i.e. from t2 to t5 and from t8 to t
As is clear from the state in IO, any H period includes the trailing edge of the color burst pulse, and the first leading edge of the color burst pulse after this trailing edge is used as the detection phase for jitter correction.

By the way, it is completely unclear whether the H period shown at t and -'-t in FIG. 5 is detected (reproduced) first, or whether the next t and subsequent H periods are detected (reproduced) first. be. However, since the jitter correction circuit 9 of this embodiment has a feedback circuit including a D-type flip-flop (30) to control phase inversion, no problem occurs. The case where the same color burst as IH after t7 in Fig. 5 occurs during the period t to t7 is shown.As shown in Fig. 6, the color burst pulse in IHK of the first reproduction output is '
If the trailing edge is within the 70 ns pulse period shown in FIG. (Even if phase inversion by tl is not performed, the output of the first exclusive OR gate @ is shown in Figure 6 (
As shown in (g), the trailing edge is included in both the t2-t6 period and the 18-too period, and the jitter detection signal shown in FIG. 6 UK can be obtained using this trailing edge as a reference.

In addition, in order to show the jumping key, FIG.
The jitter detection signal shown in Fig. 6 M is generated from the trailing edge of the color burst pulse shown in Fig. 6 ■ to the leading edge of the first pulse included in the ns pulse period (12 to t, ) and (ts to tlO). However, if the output of the T-type flip-flop word is at a low level, the output (jitter detection signal) of the shift register (to) can be obtained at the same timing as in the case of FIG.

As is clear from the above, in the disc player of FIG. 1, the jitter detection signal can be extracted under the same conditions based on the H signal (even if the phase inversion of the color burst starts from the H signal period). Furthermore, it is possible to detect jitter corresponding to the period of the color burst.

Beam (9) for still playback or double speed playback, etc.
If you simply jump to the adjacent track, the phase of the color burst will be reversed and the phase continuity will be lost. However, in this embodiment, the second exclusive OR group) (321, the first
Phase continuity is ensured by the function of the delay circuit (2aC31) and the like. That is, as shown in FIG. 5, the output of the T-type flip-flop is maintained at a low level to continue reproduction, and then, for track jumping, a jumping pulse is generated from the jumping pulse generating circuit α1). The beam (9) jumps to the adjacent truck due to the rotation of the mirror (7), and at the same time the T
The type clip-flop is triggered by a jumping pulse and its output switches to a high level as shown in FIG.

As a result, it becomes possible for the pulse in Fig. 6 (J) to pass through the AND gate, and the pulse in Fig. 6 (I) and the pulse in Fig. 6 (J) are allowed to pass through the OR gate) The pulses shown in Fig. 6 are obtained by adding the pulses shown in Fig. 6.
A signal delayed by the corresponding 1 40 ns is obtained.

Then, the shift register C351 performs a shift operation in synchronization with the trailing edge (t6) of the pulse in FIG. 6 that occurs first after the trailing edge (th') of the pulse in FIG.
generates a pulse. Since the pulse shown in FIG. 6 M is phase-shifted by 140 ns compared to the pulse shown in FIG. 0 from point a at
This is an operation equivalent to jumping the beam (19) to point or point d.

Modifications The present invention is not limited to the embodiments described above, and the following modifications are possible, for example.

Jumping pulse generation circuit (11) in Figure 1
1 and the T-type flip-flop @, as shown in FIG. A trigger signal may be input to the track jump, and no trigger signal may be input when the track jump is an even number.In the case of an even track jump, the phase continuity of the color burst is obtained, so there is no need to correct it.

(J3) The flip-flop (39) may be replaced by another type of flip-flop. Also, the exclusive OR gate (2
21C32 may be replaced with a gate circuit that functions equivalently.

(O shift register C351 is set to “0” immediately before the shift operation.
I wrote "0010" and shifted it, but it changed to "00110".
” or “00100” etc. may be written and shifted by the color burst pulse.Also, shift register 05
1, a flip-flop, MMV, etc. may be used to detect the leading or trailing edge of the designated color burst pulse.

(2) Although the output of the shift register (3) is used for jitter correction, it can also be used for simple jitter measurement.

[F] It is also applicable to sick detection in video tape recorders.

Effects of the Invention As is clear from the above description, according to the present invention, it is no longer necessary to perform color detection, and jitter can be detected using color burst pulses having the same period as the color burst. Therefore, the range of sick detection and correction can be doubled. Furthermore, a color burst pulse for jitter detection can be formed by simply positioning the specified leading edge or trailing edge of the color burst pulse within the period of the time designation pulse. Therefore, jitter detection can be achieved relatively easily.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a video disc player according to the present invention, FIG. 2 is a basic plan view of the video disc,
Fig. 3 is a principle waveform diagram of a composite video signal including color bursts, Fig. 4 is a waveform diagram showing the phase relationship of color bursts, and Figs. 5 and 6 are states of points A-M in Fig. 1. FIG. 7 is a waveform diagram showing the input and output of the phase comparator circuit of FIG. 1, and FIG. 8 is a block diagram showing a part of a modified phase correction circuit at the time of jump. αη...H signal separation circuit, 08)...Color burst separation circuit, a9...Jinter correction signal generation circuit, (2
0)...OR gate, CI! 11...first trigger flip-flop, (221...first exclusive OR gate, (23)...first MMV, (24)...second) MMV, G! 5)...Inverter, (28)...
・First off-delay circuit, Om...shift register, G
36)...Reference signal generation circuit, 0η...Phase comparison circuit, 4...D type flip-flop. Agent Noriji Takano

Claims (2)

[Claims] (1) Power of the composite video signal reproduced from the recording medium 2-
A device for detecting jitter based on a burst and a reference signal, comprising: a horizontal synchronization signal separation circuit that separates a horizontal synchronization signal from the composite video signal; and a rectangular color burst pulse that separates a color burst from the composite video signal. a timer circuit that measures the time from a reference point in the horizontal synchronization signal to a predetermined time during the generation period of the color burst pulse; a time designation pulse generation circuit that generates a time designation pulse with a constant time width shorter than the color burst pulse; and a time designation pulse generation circuit that inverts the phase of the color burst pulse every time the horizontal synchronization signal is obtained from the horizontal synchronization signal separation circuit;
If the specified one of the leading edge and trailing edge of the color burst pulse exists during the generation period of the time specified pulse, the phase of the color burst pulse is not inverted, but the leading edge and the trailing edge are present. a Cassie-burst pulse phase inversion circuit that inverts the phase of the color burst pulse after the other trailing edge is detected or not, if the other trailing edge is present; and the time designation pulse. a jitter detection signal generation circuit that generates a sick detection signal corresponding to at least one of the color burst pulses obtained at the output stage of the color burst pulse phase inversion circuit after the center point of the generation period; What is claimed is: 1. A jitter detection device for a reproduced video signal, comprising: (2) The color burst pulse phase inversion circuit includes a trigger flip-flop, and an exclusive OR gate that receives as inputs the color 4-burst pulse obtained from the color burst separation circuit and the output of the trigger flip-flop;
A D-type flip-flop that is settable only during the generation period of the time designation pulse in response to the time designation pulse and set to the set state using the output pulse of the exclusive OR gate as a clock, and the output of the horizontal synchronization signal separation circuit. and the output of the flip-flop described above are both supplied to the trigger input terminal of the trigger flip-flop.
The jitter detection device according to claim 1, which is a circuit consisting of a gate and a gate.