JPS60246601A - Resistor for superconductive circuit - Google Patents
Resistor for superconductive circuitInfo
- Publication number
- JPS60246601A JPS60246601A JP59103270A JP10327084A JPS60246601A JP S60246601 A JPS60246601 A JP S60246601A JP 59103270 A JP59103270 A JP 59103270A JP 10327084 A JP10327084 A JP 10327084A JP S60246601 A JPS60246601 A JP S60246601A
- Authority
- JP
- Japan
- Prior art keywords
- superconducting
- resistor
- resistance value
- layers
- semiconductor layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Superconductor Devices And Manufacturing Methods Thereof (AREA)
- Non-Adjustable Resistors (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔発明の技術分野〕
この発明は、超伝導回路における小形で、広い抵抗値の
制御範囲を持つ抵抗体に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a small resistor in a superconducting circuit and having a wide resistance value control range.
近年、超伝導現象を利用した電子デバイスが注目されて
いる。なかでも、ジョセフソン素子は、低消費電力で、
高速のスイッチング動作が可能であるため、超高速コン
ピュータへの応用を目ざした研究が進められている。In recent years, electronic devices that utilize superconductivity have attracted attention. Among them, Josephson elements have low power consumption and
Because it is capable of high-speed switching operations, research is underway with the aim of applying it to ultra-high-speed computers.
従来、このような超伝導現象を利用した論理回路に用い
る抵抗体としては、Ａｕ−Ｉｎ合金薄膜、Ｍｏ薄膜など
が使用されてきた。ところが、これらの抵抗体は、すべ
て薄膜の比抵抗値を直接用いているため、抵抗値の異な
る抵抗体を同時に作成することが必要な集積回路プロセ
スにおいては、多大な面積を占めることになる。通常こ
のような抵抗の膜厚は、約１１００ｎが用いられ、面積
抵抗率（比抵抗を膜厚で割ったもの）が１Ω／ｍｍ２前
後で使用されている。実際、このような抵抗体を用いて
、最小抵抗値をｌΩ／ ｍ ｍ ’で設計した場合、高
抵抗値（例えば５０Ω）を実現しようとすると第４図の
ように抵抗体１が長い形状になり、その先端を超伝導配
線Ｎ２を増り伺けると全体として、面積がかなり大きく
なる。これは、高集積化の障害となる。また、このよう
な抵抗体の比抵抗は、物質固有の決まった狭い範囲の値
にしか設定できない点も問題である。Conventionally, Au--In alloy thin films, Mo thin films, and the like have been used as resistors used in logic circuits that utilize such superconducting phenomena. However, since all of these resistors directly use the specific resistance value of the thin film, they occupy a large area in an integrated circuit process in which resistors with different resistance values must be simultaneously created. Usually, the film thickness of such a resistor is about 1100 nm, and the sheet resistivity (specific resistance divided by the film thickness) is about 1 Ω/mm 2 . In fact, if such a resistor is used and the minimum resistance value is designed to be 1Ω/mm', if you try to achieve a high resistance value (for example, 50Ω), the resistor 1 will have a long shape as shown in Figure 4. Therefore, if the superconducting wiring N2 is increased at the tip, the area as a whole becomes considerably large. This becomes an obstacle to high integration. Another problem is that the resistivity of such a resistor can only be set within a narrow range of values specific to the material.
この発明は、上記の点にかんがみてなされたもので、従
来の抵抗体の欠点を解消し、抵抗値の広い設定範囲が得
られ、かつ小形化の可能な超伝導回路用抵抗体を提供す
るものである。以下、この発明について説明する。This invention has been made in view of the above points, and provides a resistor for superconducting circuits that eliminates the drawbacks of conventional resistors, allows a wide setting range of resistance values, and can be made compact. It is something. This invention will be explained below.
第１図、第２図は、この発明の一実施例を示す側面図で
、１１は超伝導配線層、１２は半導体層、１３は非超伝
導金属層、１４は超伝導配線層、１５は基板で、２つの
超伝導配線層１１゜１４の間に半導体層１２と非超伝導
金属層１輌が・挟まれた構造をしている。1 and 2 are side views showing one embodiment of the present invention, in which 11 is a superconducting wiring layer, 12 is a semiconductor layer, 13 is a non-superconducting metal layer, 14 is a superconducting wiring layer, and 15 is a superconducting wiring layer. The substrate has a structure in which a semiconductor layer 12 and a non-superconducting metal layer are sandwiched between two superconducting wiring layers 11 and 14.
香なっている。It's fragrant.
このような構造を持つ抵抗体について、その１作の基本
となる事柄は、第一にジョセフソン素子に、その超伝導
臨界電流具−Ｌに電流を流した時に、現われるトンネル
抵抗であり（ただ己、通常ギャップ電圧以下の電圧で、
抵抗値が激減する非直線性がある）、
第２に、超伝導配線層１１．１４間に非超伝導金属層１
３を置いた時に示す抵抗値である。ただし、一般の金属
の示す比抵抗では実用的な大きさく数８層ｍ角）で請求
める抵抗値（例えば数百Ω）を実現できない。Regarding a resistor with such a structure, the basic issue of the first work is the tunnel resistance that appears when a current is passed through the Josephson element and its superconducting critical current device (L). Self, at a voltage below the normal gap voltage,
There is a non-linearity in which the resistance value drastically decreases).Secondly, there is a non-superconducting metal layer 1 between the superconducting wiring layers 11 and 14.
This is the resistance value shown when 3 is placed. However, with the specific resistance exhibited by general metals, it is not possible to achieve a desired resistance value (for example, several hundred ohms) with a practical size (several 8 layers per square meter).
この発明の抵抗体の構造を実現するには、２つの起伝導
配線層１１．１４間に半導体（Ｓｉ。In order to realize the structure of the resistor of the present invention, semiconductor (Si) is used between the two conductive wiring layers 11 and 14.
Ｇｅ、ＧａＡｓ、ＩｎＳｂ、Ｉｎｋ、ＳｉＣなど）薄膜
による厚さ１００Ａ前後の半導体層１２８：と、使用温
度（例えば、４．２°Ｋ）での非ｉ伝導金属（Ｍｏ、Ｉ
ｎ、Ａｕ、Ａｇ、ＡＩ ’Ｖかと）による厚さ数百人の
薄膜の非超伝導金属層１３の２層を挟みこめばよい。そ
れらの各層１２．１３は、真空蒸着、スバ１９ 、ＣＶ
Ｄ 。A semiconductor layer 128 with a thickness of about 100A made of a thin film (Ge, GaAs, InSb, Ink, SiC, etc.) and a non-conducting metal (Mo, I
It is sufficient to sandwich two non-superconducting metal layers 13 made of thin films of several hundred layers of thickness, such as n, Au, Ag, AI'V, etc. Each of those layers 12.13 is formed by vacuum evaporation, Suba 19, CV
D.
ＭＢＥなどの方法によりできるだけ低い堆積速度で作成
する。The film is produced using a method such as MBE at a deposition rate as low as possible.
これら半導体層１２と非超伝導金属層１３の役割を次に
示す。半導体層１２は、抵抗値の制御に用いている。こ
の発明の抵抗体では、その抵抗値は膜厚によって制御さ
れる。この制御性を向上させるためには、膜厚か厚い方
がよい、その点、半導体を用いることにより、代わりに
絶縁体を用いた場合より厚くすることができる。また、
半導体をトンネル障壁として、使うことにより、ギャッ
プ電圧以下の非直線性を緩和することができる。The roles of the semiconductor layer 12 and the non-superconducting metal layer 13 will be described below. The semiconductor layer 12 is used to control the resistance value. In the resistor of this invention, the resistance value is controlled by the film thickness. In order to improve this controllability, it is better to have a thicker film, and in this respect, by using a semiconductor, the film can be made thicker than when an insulator is used instead. Also,
By using a semiconductor as a tunnel barrier, nonlinearity below the gap voltage can be alleviated.
次に非超伝導金属層１３は、半導体層１２のみでは必ず
生じるジョセフソン効果による超伝導電波を消去するた
めに用いる。この非超伝導金属層１３による抵抗は、半
導体層１２のトンネル抵抗よりはるかに小さく、無視で
きる。Next, the non-superconducting metal layer 13 is used to eliminate superconducting radio waves due to the Josephson effect, which always occur with the semiconductor layer 12 alone. The resistance due to this non-superconducting metal layer 13 is much smaller than the tunnel resistance of the semiconductor layer 12 and can be ignored.
第３図のように、さらに、非超伝導金属層１３を追加す
ることにより、完全に非直線性をなくすことができる。As shown in FIG. 3, by further adding a non-superconducting metal layer 13, nonlinearity can be completely eliminated.
この発明の抵抗体の形状は、フォトリングラフィにより
マスクを形成し、化学エツチングあるいは、ドライエツ
チングすることにより、形成される。これにより、数Ｉ
Ｌｍ角の大きさで、任意の抵抗値を実現できる。The shape of the resistor of the present invention is formed by forming a mask using photolithography and performing chemical etching or dry etching. This gives the number I
Any resistance value can be achieved by changing the size of the Lm angle.
以上説明したように、この発明は、２つの超伝導配線層
の間に非超伝導金属層と半導体層の２層を挟んで抵抗体
を形成したので、超伝導回路において、小型で、制御範
囲の広い優れた抵抗体を得ることが可能となり、したが
って、この発明が超伝導集積回路等に貢献すること大な
る利点がある。As explained above, in this invention, a resistor is formed by sandwiching two layers, a non-superconducting metal layer and a semiconductor layer, between two superconducting wiring layers. It becomes possible to obtain an excellent resistor with a wide range of resistance, and therefore, it is a great advantage that the present invention contributes to superconducting integrated circuits and the like.
第１図、第２図はそれぞれこの発明の一実施例を示す側
面図、第３図はこの発明の他の実施例を示す側面図、第
４図は超伝導現象を利用した論理回路に用いる従来の抵
抗体の一例を示す平面図である。Figures 1 and 2 are side views showing one embodiment of the invention, Figure 3 is a side view showing another embodiment of the invention, and Figure 4 is used for a logic circuit using superconductivity. FIG. 2 is a plan view showing an example of a conventional resistor.
Claims (1)
超伝導配線層の間に非超伝導金属層と半導体層の２層を
挟んだ構成としたことを特徴とする超伝導回路用抵抗体
。1. A resistor for a superconducting circuit having a superconducting wiring layer, characterized in that the superconducting circuit has a structure in which two layers, a non-superconducting metal layer and a semiconductor layer, are sandwiched between the two superconducting wiring layers.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59103270A JPH0652681B2 (en) | 1984-05-22 | 1984-05-22 | Method for manufacturing resistor for superconducting circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59103270A JPH0652681B2 (en) | 1984-05-22 | 1984-05-22 | Method for manufacturing resistor for superconducting circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60246601A true JPS60246601A (en) | 1985-12-06 |
| JPH0652681B2 JPH0652681B2 (en) | 1994-07-06 |
Family
ID=14349713
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59103270A Expired - Lifetime JPH0652681B2 (en) | 1984-05-22 | 1984-05-22 | Method for manufacturing resistor for superconducting circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0652681B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6474770A (en) * | 1987-09-17 | 1989-03-20 | Fujitsu Ltd | Structure of contact between superconductive film and normal conductive film |
| WO2018136183A1 (en) * | 2017-01-20 | 2018-07-26 | Northrop Grumman Systems Corporation | Method for forming a resistive element in a superconducting interconnect structure |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5524416A (en) * | 1978-08-09 | 1980-02-21 | Agency Of Ind Science & Technol | Josephson junction element |
| JPS5957483A (en) * | 1982-09-27 | 1984-04-03 | Mitsubishi Electric Corp | Josephson element circuit |
-
1984
- 1984-05-22 JP JP59103270A patent/JPH0652681B2/en not_active Expired - Lifetime
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5524416A (en) * | 1978-08-09 | 1980-02-21 | Agency Of Ind Science & Technol | Josephson junction element |
| JPS5957483A (en) * | 1982-09-27 | 1984-04-03 | Mitsubishi Electric Corp | Josephson element circuit |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6474770A (en) * | 1987-09-17 | 1989-03-20 | Fujitsu Ltd | Structure of contact between superconductive film and normal conductive film |
| WO2018136183A1 (en) * | 2017-01-20 | 2018-07-26 | Northrop Grumman Systems Corporation | Method for forming a resistive element in a superconducting interconnect structure |
| JP2020504445A (en) * | 2017-01-20 | 2020-02-06 | ノースロップ グラマン システムズ コーポレイションＮｏｒｔｈｒｏｐ Ｇｒｕｍｍａｎ Ｓｙｓｔｅｍｓ Ｃｏｒｐｏｒａｔｉｏｎ | Method for forming a resistive element in a superconducting wiring structure |
| US10936756B2 (en) | 2017-01-20 | 2021-03-02 | Northrop Grumman Systems Corporation | Methodology for forming a resistive element in a superconducting structure |
| US11783090B2 (en) | 2017-01-20 | 2023-10-10 | Northrop Grumman Systems Corporation | Methodology for forming a resistive element in a superconducting structure |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0652681B2 (en) | 1994-07-06 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |