JPS60243757A - Memory backup system - Google Patents

Abstract

PURPOSE:To backup surely a volatile memory against power failure by rewriting data stored in the volatile memory again in a backup memory before power supply voltage drops less than a prescribed value. CONSTITUTION:At the disconnection of a system power supply Vcc, the contents of data written in the backup memory 5 are rewritten in a main memory 1, the contents of the data rewritten in the main memory 1 are compared with that of the data in the backup memory 5, and if an error is generated in the written contents, a CPU8 retries the rewriting. In the control operation by the CPU8, the data stored in the main memory 1 are rewritten in the backup memory 5 on the basis of the interruption control of the CPU8 before the stored contents in the main memory 1 are volatilized less than the prescribed value due to the power failure of the system power supply Vcc.

Description

DETAILED DESCRIPTION OF THE INVENTION Technical Field The present invention relates to a memory backup method for backing up the power of volatile memory.

iu Conventionally, volatile IC memory (RAM) commonly used in microcomputer systems, such as program RAM and data storage buffer memory in personal computers and word processors, has been powered by nickel-cadmium batteries in case of power outages. Alternatively, a secondary battery such as a lithium battery is used to back up the power supply and protect the stored contents. In Figure 4,
A power supply circuit for volatile memory 1 is shown. In the figure, 2 indicates a system power supply circuit, 3 indicates a secondary battery for power backup, and 4 indicates a charging/discharging circuit. When the system power supply 2 is turned on, the secondary battery 3 charges the charging/discharging circuit 4 and has a current capacity of However, if the system power supply 2 loses power, the charging/discharging port l! 84 is in a discharge state and continues to supply power to the memory 1.

However, if such a method is used to back up the power supply of the memory 1 using the secondary battery 3, as the discharge of the secondary battery 3 progresses, its current capacity decreases and the voltage drops beyond a predetermined level. The memory contents will be erased without power backup of the memory, resulting in unreliable memory protection.

Purpose The present invention takes the above points into consideration, and provides a memory backup method that enables constant backup of volatile memory against power outages without using any secondary batteries as a memory backup power source. It provides:

1 part sentence An embodiment of the present invention will be described in detail below.

In the memory backup method according to the present invention, a non-volatile electrically erasable block/rammable memory E"
By using FROM as a backup memory, when a power outage is detected in the system power supply, the data stored in the volatile memory to be protected can be restored to the backup memory before the power supply voltage drops below the reference value at which the stored contents will be volatile. This method provides a reliable means for writing and protecting the stored data.

FIG. 1 shows a configuration example for concretely implementing the memory backup method according to the present invention, in which a volatile main memory l to be protected, a backup memory 5 consisting of E'PROM, and a system System power supply V from the amplitude decrease of the AC voltage waveform in AC power supply e of power supply circuit 6
a power outage detection circuit 7 that detects a power outage state of r, c,
Main memory 1 according to the output signal S when the power failure is detected.
and a CPU 8 that rewrites the stored data in the backup memory 5. Note that the main memory 1 can be anything other than IC memory as long as it has volatility. Further, the system power supply circuit [5] performs AC/DC conversion on the AC power supply e, and then stabilizes the DC voltage to supply the system power supply Vcc.

However, in a device configured in this way, first, when the system power supply Vcc is turned on, and before the CPU 8 starts a predetermined operation in the system after being reset, the backup The data content rewritten to the memory 5 is transferred to the main memory 1, and the data content transferred to the main memory 1 is compared with the data content in the backup memory 5 to determine whether the data content was written incorrectly. Check whether it has been lost or not. If an error occurs in transferring the data contents, CP tJ 8 causes a retry. After the data content has been transferred without errors,
In preparation for the next rewrite, the CPU 7 applies a data erase signal E to the backup memory 5 to clear its stored contents. Thereafter, the CPU 8 starts controlling the system operation set in advance by the program, and enters a monitoring state of the system power supply V'cc, although the process is not appropriate. During the control operation, the power failure detection circuit 7 detects the system power supply Vcc.
When a power outage condition is detected, the power outage detection signal S becomes CP
The data stored in the main memory 1 is rewritten to the backup memory 5 by the interrupt control of the CPU 8 before the system power supply Vcc drops below the specified value at which the stored contents in the main memory 1 are volatilized. let In addition, a memory 5 for backing up data stored in the main memory 1
Rewriting to is performed in exactly the same way when the system power supply Vcc is turned off. In addition, rewriting to the backup memory 5 is performed for all of the stored data in the main memory 1 (in part, the memory capacities of the main memory 1 and the backup memory 5 are made equal); The memory capacity of the backup memory 5 is made smaller than that of the main memory 1, and only a part of the minimum necessary storage data in the main memory 1 is rewritten to the backup memory 5 to protect it. It is also possible to do so.

Figure 2 shows the operational flow from when the system power supply Vcc is turned on until the stored data in the main memory 1 is rewritten to the bank-up memory 5 due to a power outage and the data contents are held non-volatilely. It shows.

Further, FIG. 3 shows the operation timing for detecting a power outage state in the power outage detection circuit 7. In the diagram, one point is AC power supply e
The period T indicates a period during which stored data in the main memory 1 is rewritten to the backup memory 5.

Note that here, the power failure detection circuit 7 monitors the amplitude of the AC voltage signal in the AC power supply e, detects the power failure state of the AC power supply e at the time t when the amplitude decreases below a certain level, and from that time t the system power supply circuit 6, the data stored in the main memory 1 is reloaded to the backup memory 5 during the period T until the system power supply vCC falls and the storage contents in the main memory 1 reach the reference value V, which is the threshold value for volatilization. I am trying to make it write, but
In order to provide a sufficient margin for the rewrite period T, it is also possible to provide the system power supply circuit 6 with a timer function, and to take means to hold the system power supply Vcc for a certain period of time when a power failure is detected. Also, the system power supply circuit 6
It goes without saying that instead of having a timer function inside, a dedicated timer circuit for delaying the system power supply Vcc for a certain period of time may be separately provided on the output side.

After a power outage condition is detected in this way, the system power supply Vc
If there is enough time for c to reach the reference value ■,
After the rewriting of the stored data in the main memory 1 to the backup memory 5 is completed, the CPU 8 compares the data content in the main memory 1 with the data content in the backup memory 5 to determine if the rewriting is incorrect. It will be possible to check whether the data has been lost or not, and if the data contents do not match, it will be possible to easily take measures to generate an alarm to that effect, such as by lighting an LED, indicating that an error has occurred in rewriting. .

As described above, the memory backup method according to the present invention does not require the use of a secondary battery as a memory backup power source, which has the problem of backup failure due to over-discharge as in the past (it also eliminates the need to provide a non-volatile backup memory). , when a power outage is detected, the data stored in the volatile memory to be protected is rewritten to the nonvolatile backup memory before the memory power supply voltage drops below the standard value. It has the excellent advantage that volatile memory can be reliably backed up.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a specific configuration example for implementing the memory read-up method according to the present invention, FIG. 2 is a flowchart 1-1 of the operation in the same configuration example, and FIG. Time chart 1-1 showing the operation timing for detecting a power outage state when the circuit is activated. Figure 4 is a process diagram showing a power supply circuit of a conventional memory, a volatile memory for backup. 1...Volatile memory 2, 6...System power supply circuit 3...Secondary battery 4...Charging/discharging circuit 5...Memory for ≦Tsukuf'tub 7...Power outage detection circuit 8... C
PU applicant Kiyoshi Torii Figure 1 Figure 3 Figure 2 Figure 4

Claims (1)

[Claims] A memory backup method that includes means for detecting a power outage state and means for rewriting data stored in a volatile memory to be protected in a nonvolatile backup memory when a power outage is detected.