JPS6023994Y2 - Semiconductor magnetoelectric conversion device - Google Patents

Semiconductor magnetoelectric conversion device

Info

Publication number
JPS6023994Y2
JPS6023994Y2 JP5347777U JP5347777U JPS6023994Y2 JP S6023994 Y2 JPS6023994 Y2 JP S6023994Y2 JP 5347777 U JP5347777 U JP 5347777U JP 5347777 U JP5347777 U JP 5347777U JP S6023994 Y2 JPS6023994 Y2 JP S6023994Y2
Authority
JP
Japan
Prior art keywords
conductive layer
effect
metal electrode
semiconductor
hall
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP5347777U
Other languages
Japanese (ja)
Other versions
JPS53147661U (en
Inventor
勝義 小田
Original Assignee
株式会社デンソー
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社デンソー filed Critical 株式会社デンソー
Priority to JP5347777U priority Critical patent/JPS6023994Y2/en
Publication of JPS53147661U publication Critical patent/JPS53147661U/ja
Application granted granted Critical
Publication of JPS6023994Y2 publication Critical patent/JPS6023994Y2/en
Expired legal-status Critical Current

Links

Description

【考案の詳細な説明】 本考案はホール効果を応用した半導体磁電変換装置に関
するものである。
[Detailed Description of the Invention] The present invention relates to a semiconductor magnetoelectric conversion device that utilizes the Hall effect.

従来周知の磁電変換装置、特にホール素子の構造は第1
図a、 bに示す如く半導体基板1に電圧端子2,3及
びホール電圧出力端子4,5を備えた構造となっている
The structure of conventionally well-known magnetoelectric transducers, especially Hall elements, is the first.
As shown in Figures a and b, it has a structure in which a semiconductor substrate 1 is provided with voltage terminals 2 and 3 and Hall voltage output terminals 4 and 5.

この構造のホール素子においては、電流端子2.3及び
その付近において端子部分の短絡効果によって有効にホ
ール効果が得られないばかりか、磁界とホール出力電圧
の直線性が悪くなる原因ともなっている。
In the Hall element of this structure, not only is the Hall effect not effectively obtained due to the short-circuit effect of the terminal portion at and around the current terminal 2.3, but it is also a cause of poor linearity between the magnetic field and the Hall output voltage.

又ホール出力電圧端子4,5は理想的には基板1と点接
触し、接触抵抗が零であることが望ましい。
Further, it is desirable that the Hall output voltage terminals 4 and 5 ideally make point contact with the substrate 1 and have zero contact resistance.

ところが実際につくる場合は有限な面接触となっている
ため、端子部において短絡効果による効率低下及び電流
分布をみだすという欠点があり、精度の良いホール素子
を得ることを難しくしている。
However, in actual manufacturing, since there is a finite surface contact, there are drawbacks such as reduced efficiency and current distribution due to the short circuit effect at the terminal part, making it difficult to obtain a Hall element with high precision.

本考案は上述の欠点を解消するもので、磁電効果を受け
る所定導電型の第1の導電層とこの層上の所定の人出用
金属電極との間に、前記第1の導電層の主面に対して垂
直方向になるように所定の抵抗値を有する第2の導電層
を猛威することにより、前記第1の導電層との接続部で
の短絡効果による磁電効果の効率低下を防ぐと共に、ホ
ール電圧出力の直線性を改善した半導体磁電変換装置を
提供することを目的とする。
The present invention solves the above-mentioned drawbacks, and the main part of the first conductive layer is provided between the first conductive layer of a predetermined conductivity type subjected to the magneto-electric effect and the predetermined metal electrode for use on this layer. By arranging the second conductive layer having a predetermined resistance value in a direction perpendicular to the plane, a decrease in the efficiency of the magnetoelectric effect due to a short circuit effect at the connection with the first conductive layer is prevented, and An object of the present invention is to provide a semiconductor magnetoelectric conversion device with improved linearity of Hall voltage output.

以下本考案を図面に示す一実施例により具体的に説明す
る。
The present invention will be specifically explained below with reference to an embodiment shown in the drawings.

第2図a、 bにおいて、10はP型の半導体基板、1
1は拡散或はエピタキシャル成長等によるN型層の半導
体領域で、磁電効果(ホール効果)を有効に受ける部分
である。
In FIGS. 2a and 2b, 10 is a P-type semiconductor substrate, 1
Reference numeral 1 denotes a semiconductor region of an N-type layer formed by diffusion or epitaxial growth, and is a portion that effectively receives the magnetoelectric effect (Hall effect).

12,13はN型層11中へ電流を流入させるための第
1の金属電極をなす電流端子、14.15はホール電圧
を取出すための第2の金属電極をなす出力端子であり、
これらの端子12〜15は通常A1蒸着等により形成さ
れる。
12 and 13 are current terminals forming a first metal electrode for flowing current into the N-type layer 11; 14 and 15 are output terminals forming a second metal electrode for extracting the Hall voltage;
These terminals 12 to 15 are usually formed by A1 vapor deposition or the like.

またその端子12〜15の直下には所定の抵抗値を与え
るべくN型の半導体よりなる取出し部20,21,22
,23を有しており、とりわけこの基板10の主面に対
して垂直方向に設は磁界と同方向になる様に形成しであ
る。
Directly below the terminals 12 to 15 are lead-out portions 20, 21, 22 made of an N-type semiconductor to provide a predetermined resistance value.
, 23, and in particular are formed in a direction perpendicular to the main surface of the substrate 10 so as to be in the same direction as the magnetic field.

また16.17.18.19はN型層11をその一生面
において包囲するためのP型層の半導体領域であり、一
般に拡散等で形成されるものである。
Further, 16, 17, 18, and 19 are semiconductor regions of a P-type layer for surrounding the N-type layer 11 on its entire surface, and are generally formed by diffusion or the like.

そこでこの構成による作用を述べると、電流端子12.
13における取出し部分20.23の電流方向は基板1
0の主面に垂直で第2図a中に示す如く磁界方向Bと一
致するため、この部分20.23では磁電効果は起らず
、N型層11の磁電効果に対して影響がなくなると共に
、端子12.13での短絡効果がN型層11に直接加わ
らなくなる。
Therefore, to describe the effect of this configuration, the current terminal 12.
The current direction of the extraction portion 20.23 in 13 is the same as that of the substrate 1.
Since it is perpendicular to the main surface of the N-type layer 11 and coincides with the magnetic field direction B as shown in FIG. , the short-circuit effect at the terminals 12 and 13 is no longer applied directly to the N-type layer 11.

すなわち取出し部20.23の半導体分布抵抗による分
散効果が働き、N型層11の入力端11A、IIBでの
短絡効果が緩和されることになる。
That is, the dispersion effect due to the semiconductor distributed resistance of the extraction portion 20.23 works, and the short circuit effect at the input ends 11A and IIB of the N-type layer 11 is alleviated.

さらに、ホール電圧の出力端子14.15においても上
述と同様にN型半導体よりなる取出し部21.22を設
けており、N型層11の入力端11c、IID付近での
短絡効果が緩和され、磁電効果を受けるN型層11の電
流分布を改善している。
Furthermore, the output terminal 14.15 of the Hall voltage is also provided with a lead-out portion 21.22 made of an N-type semiconductor in the same manner as described above, and the short circuit effect near the input end 11c of the N-type layer 11, IID is alleviated. The current distribution in the N-type layer 11, which is subject to the magnetoelectric effect, is improved.

また、本装置は集積回路に使用することが可能であると
共に、P型層10、および16.17゜18.19でも
って包囲した構造にしているから、P型層10を接地す
ることにより電気的ノイズに対してシールドする効果が
得られる。
In addition, this device can be used in integrated circuits, and since it has a structure surrounded by the P-type layer 10 and 16.17°18.19, it can be electrically connected by grounding the P-type layer 10. The effect of shielding against target noise can be obtained.

なお、本実施例では磁電効果を受けるN型層11を半導
体基板10上に拡散等により形成したものを用いたが、
第1図すに示す様な磁電効果を受ける半導体基板上に取
出し部分として所定抵抗値を有する所定の導電型の抵抗
層を設け、この抵抗層上に金属電極を形成する構成でも
よい。
Note that in this example, the N-type layer 11 which is subject to the magnetoelectric effect was formed on the semiconductor substrate 10 by diffusion or the like.
A configuration may be employed in which a resistive layer of a predetermined conductivity type having a predetermined resistance value is provided as an extraction portion on a semiconductor substrate subjected to a magnetoelectric effect as shown in FIG. 1, and a metal electrode is formed on this resistive layer.

以上述べたように本考案装置においては、半導体基板の
一生面に形成され磁電効果を受ける所定導電型の第1の
導電層と、この第1の導電層上において一方向に対向配
置され電圧印加を受ける第1の金属電極と、前記第1の
導電層上において前記一方向とは直角関係にある他の方
向に対向配置されホール起電力を発生する第2の金属電
極と、前記第1の導電層と前記第1、第2の金属電極と
の間でかつ前記第1の導電層の主面に対して垂直方向に
配置され、所定の抵抗値を有する第2の導電層とを有し
ているから、入出力端子部分と第1の導電層との接続部
分において、半導体分布抵抗による分散効果が働らき短
絡効果を緩和させることができ、これにより磁電効果の
直線性及び感度をより一層改善することができるという
優れた効果がある。
As described above, in the device of the present invention, a first conductive layer of a predetermined conductivity type that is formed on the entire surface of a semiconductor substrate and receives a magnetoelectric effect, and a first conductive layer that is disposed facing each other in one direction on this first conductive layer and is applied with a voltage. a first metal electrode that generates a Hall electromotive force, and a second metal electrode that is disposed on the first conductive layer and faces in another direction that is perpendicular to the one direction and generates a Hall electromotive force; a second conductive layer disposed between the conductive layer and the first and second metal electrodes in a direction perpendicular to the main surface of the first conductive layer, and having a predetermined resistance value; Therefore, at the connection between the input/output terminal and the first conductive layer, the dispersion effect due to the semiconductor distributed resistance works to alleviate the short circuit effect, thereby further improving the linearity and sensitivity of the magnetoelectric effect. It has the excellent effect of improving

【図面の簡単な説明】[Brief explanation of the drawing]

第1図a、 bは従来装置の平面図、および側面図、第
2図a、 bは本考案になる半導体磁電変換装置の平面
図、および断面図である。 10・・・・・・P型半導体基板、11・・・・・・第
1の導電層をなすN型層、12,13・・・・・・第1
の金属電極をなす電流端子、14.15・・・・・・第
2の金属電極をなす出力端子、20,21,22,23
・・・・・・第2の導電層をなす取出し部。
1A and 1B are a plan view and a side view of a conventional device, and FIGS. 2A and 2B are a plan view and a sectional view of a semiconductor magnetoelectric conversion device according to the present invention. DESCRIPTION OF SYMBOLS 10... P-type semiconductor substrate, 11... N-type layer forming the first conductive layer, 12, 13... First
Current terminals forming metal electrodes, 14.15...Output terminals forming second metal electrodes, 20, 21, 22, 23
. . . A take-out portion forming the second conductive layer.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 半導体基板の一生面に形成され磁電効果を受ける所定導
電型の第1の導電層と、きの第1の導電層上において一
方向に対向配置され電圧印加を受ける第1の金属電極と
、前記第1の導電層上において前記一方向とは直角関係
にある他の方向に対向配置されホール起電力を発生する
第2の金属電極と、前記第1の導電層と前記第1、第2
の金属電極との間でかつ前記第1の導電層の主面に対し
て垂直方向に配置され、所定の抵抗値を有する第2の導
電層とを有することを特徴とする半導体磁電変換装置。
a first conductive layer of a predetermined conductivity type that is formed on the entire surface of a semiconductor substrate and receives a magnetoelectric effect; a first metal electrode that is disposed facing each other in one direction on the first conductive layer and receives voltage application; a second metal electrode that is disposed oppositely on the first conductive layer in another direction perpendicular to the one direction and generates a Hall electromotive force;
and a second conductive layer having a predetermined resistance value, the second conductive layer being disposed between the metal electrode and the main surface of the first conductive layer in a direction perpendicular to the main surface of the first conductive layer.
JP5347777U 1977-04-27 1977-04-27 Semiconductor magnetoelectric conversion device Expired JPS6023994Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5347777U JPS6023994Y2 (en) 1977-04-27 1977-04-27 Semiconductor magnetoelectric conversion device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5347777U JPS6023994Y2 (en) 1977-04-27 1977-04-27 Semiconductor magnetoelectric conversion device

Publications (2)

Publication Number Publication Date
JPS53147661U JPS53147661U (en) 1978-11-20
JPS6023994Y2 true JPS6023994Y2 (en) 1985-07-17

Family

ID=28946493

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5347777U Expired JPS6023994Y2 (en) 1977-04-27 1977-04-27 Semiconductor magnetoelectric conversion device

Country Status (1)

Country Link
JP (1) JPS6023994Y2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0162165A3 (en) * 1983-06-10 1986-07-16 Texas Instruments Incorporated A Hall effect device and method for fabricating such a device

Also Published As

Publication number Publication date
JPS53147661U (en) 1978-11-20

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