JPS60236513A - Protection circuit of transistor - Google Patents
Protection circuit of transistorInfo
- Publication number
- JPS60236513A JPS60236513A JP7943184A JP7943184A JPS60236513A JP S60236513 A JPS60236513 A JP S60236513A JP 7943184 A JP7943184 A JP 7943184A JP 7943184 A JP7943184 A JP 7943184A JP S60236513 A JPS60236513 A JP S60236513A
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- voltage
- base
- emitter
- power supply
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/26—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback
- H03K3/28—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback
- H03K3/281—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator
- H03K3/282—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator astable
- H03K3/2823—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator astable using two active transistor of the same conductivity type
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Amplifiers (AREA)
Abstract
Description
【発明の詳細な説明】
（ａ） 発明の技術分野
本発明はトランジスタの逆バイアス印加による破壊劣化
を防止するトランジスタの保護回路に関す。DETAILED DESCRIPTION OF THE INVENTION (a) Technical Field of the Invention The present invention relates to a protection circuit for a transistor that prevents destructive deterioration due to application of a reverse bias to the transistor.
（ｂ） 技術の背景
トランジスタを開閉素子に使用する場合に、ベースとエ
ミッタとの間に高電圧の逆バイアスが印加されると、ト
ランジスタが破壊或いは劣化する恐れがある。(b) Background of the Technology When a transistor is used as a switching element, if a high voltage reverse bias is applied between the base and the emitter, the transistor may be destroyed or deteriorated.
（Ｃ１従来技術と問題点
第１図は従来あるマルチバイブレータ回路の一例を示す
図であり、第２図は第１図におけるトランジスタの等価
回路を示す図である。第１図におけるトランジスタＱｌ
およびＣ２の入力インピーダンスＲｉは第２図から明ら
かな如り（１）式で示される。(C1 Prior Art and Problems Figure 1 is a diagram showing an example of a conventional multivibrator circuit, and Figure 2 is a diagram showing an equivalent circuit of the transistor in Figure 1.Transistor Ql in Figure 1
As is clear from FIG. 2, the input impedance Ri of C2 is expressed by equation (1).
Ｒｉ＝ｒｂ＋ （１＋β） ｒ ｅ ・”（１）（但し
βはトランジスタの電流増幅率）第１図において、トラ
ンジスタＱ１が導通状態、トランジスタＱ２が遮断状態
にあるとすると、コンデンサＣ２は抵抗Ｒ２を介して充
電され、ａ電極側が電源電圧■に、ｂ電極側が地電位Ｅ
となる。Ri=rb+ (1+β) r e ・”(1) (where β is the current amplification factor of the transistor) In Fig. 1, assuming that transistor Q1 is in a conductive state and transistor Q2 is in a cutoff state, capacitor C2 connects resistor R2. The a electrode side is charged to the power supply voltage ■, and the b electrode side is charged to the earth potential E.
becomes.
一方コンデンサＣ１も抵抗Ｒ３を介して充電されること
によりトランジスタＱ２のベース電位が上昇し、トラン
ジスタＱ２が導通状態となるとコンデンサＣ２のａ電極
がトランジスタＱ２を介して地電位Ｅとなる為、トラン
ジスタＱ１のベースとエミッタとの間にはコンデンサＣ
２の充電電圧（＝電源電圧■）が逆バイアスとして印加
されることとなり、電源電圧Ｖが高い場合にはトランジ
スタＱ１が破壊或いは劣化する恐れがある。従って電源
電圧Ｖは充分低電圧（例えば数ボルト乃至十数ボルト）
に維持される必要がある。On the other hand, as the capacitor C1 is also charged via the resistor R3, the base potential of the transistor Q2 increases, and when the transistor Q2 becomes conductive, the a electrode of the capacitor C2 becomes the ground potential E via the transistor Q2, so the transistor Q1 There is a capacitor C between the base and emitter of
The charging voltage V2 (=power supply voltage ■) is applied as a reverse bias, and if the power supply voltage V is high, there is a risk that the transistor Q1 will be destroyed or deteriorated. Therefore, the power supply voltage V is a sufficiently low voltage (for example, several volts to more than ten volts)
need to be maintained.
以上の説明から明らかな如く、従来あるトランジスタ回
路においては、トランジスタのベースとエミッタとの間
に電源電圧が逆バイアスに印加される場合にも、トラン
ジスタを破壊或いは劣化から保護する為に電源電圧を充
分低電圧に維持する必要があり、トランジスタ回路専用
の電源を準備する必要がある等の欠点があった。かかる
欠点を除去する方法として、第３図に示す如く、トラン
ジスタＱ１およびＱ２のベースに直列抵抗Ｒ５およびＲ
６をそれぞれ接続し、且つベースとエミッタとの間にダ
イオードＤ１およびＤ２をそれぞれ接続することも考慮
される。かかる方法によれば、トランジスタＱ１または
Ｑ２のベースとエミッタとの間に逆バイアスが印加され
た場合には、ダイオードＤ１またはＤ２が順方向となり
、トランジスタＱ１およびＱ２を保護する。然しトラン
ジスタＱ１およびＱ２のベースとエミッタとの間が逆バ
イアス状態において低抵抗となる。またトランジスタ（
例えばＱｌ）の入力インピーダンスＲｉ１は（２）式に
より示される。As is clear from the above explanation, in conventional transistor circuits, even when a reverse bias power supply voltage is applied between the base and emitter of the transistor, the power supply voltage is applied to protect the transistor from destruction or deterioration. There were drawbacks such as the need to maintain a sufficiently low voltage and the need to prepare a dedicated power source for the transistor circuit. As a method to eliminate this drawback, as shown in FIG. 3, series resistors R5 and R are connected to the bases of transistors Q1 and Q2.
It is also conceivable to connect diodes D1 and D2 between base and emitter respectively. According to this method, when a reverse bias is applied between the base and emitter of transistor Q1 or Q2, diode D1 or D2 becomes forward-oriented and protects transistors Q1 and Q2. However, the resistance between the base and emitter of transistors Q1 and Q2 is low in a reverse bias state. Also, the transistor (
For example, the input impedance Ri1 of Ql) is expressed by equation (2).
Ｒ１＠＝Ｒ５＋ｒｂ＋ （１＋β） ｒ ｅ ・・・（
２）なお抵抗Ｒ５はトランジスタＱ１のベース電流を制
限するに充分な高抵抗（通常抵抗ｒｂの１０乃至２０倍
程度）に設定される為、第１図におけるトランジスタＱ
１の入力インピーダンスＲｉに比し大きくなり、マルチ
バイブレータの発振周波数に影響を与え、かかる保護回
路は不適当である。R1@=R5+rb+ (1+β) r e...(
2) Since the resistor R5 is set to a sufficiently high resistance (normally about 10 to 20 times the resistor rb) to limit the base current of the transistor Q1, the transistor Q in FIG.
The input impedance Ri is large compared to the input impedance Ri of 1, which affects the oscillation frequency of the multivibrator, and such a protection circuit is inappropriate.
（ｄ） 発明の目的
本発明の目的は、前述の如き従来あるトランジスタの保
護回路の欠点を除去し、トランジスタの入力インピーダ
ンス等の回路常数に変化を与えること無く、ベースとエ
ミッタとの間に逆バイアスが印加される場合にトランジ
スタの破壊或いは劣化を防止する手段を実現することに
在る。(d) Purpose of the Invention The purpose of the present invention is to eliminate the drawbacks of conventional transistor protection circuits as described above, and to eliminate the inverse relationship between the base and emitter without changing the circuit constants such as the input impedance of the transistor. The object of the present invention is to realize a means for preventing destruction or deterioration of a transistor when a bias is applied.
（ｅ） 発明の構成
この目的は、トランジスタのベースに順方向に電源電圧
以上の降伏電圧を有する定電圧ダイオードを接続し、且
つベースとエミッタとの間に抵抗を接続することにより
、逆バイアス印加によるトランジスタの破壊劣化を防止
することにより達成される。(e) Structure of the Invention The purpose of this invention is to apply a reverse bias by connecting a constant voltage diode having a breakdown voltage higher than the power supply voltage in the forward direction to the base of the transistor, and connecting a resistor between the base and the emitter. This is achieved by preventing the destruction and deterioration of transistors due to
即ち本発明によれば、トランジスタのベースとエミッタ
との間に電源電圧に達する逆バイアスが印加された場合
にも定電圧ダイオードにより保護され、且つ定電圧ダイ
オードを含む入力インピーダンスはトランジスタ単体の
場合と殆ど変わらない。That is, according to the present invention, even if a reverse bias reaching the power supply voltage is applied between the base and emitter of the transistor, the voltage regulator diode protects the transistor, and the input impedance including the voltage regulator diode is equal to that of a single transistor. Almost no change.
（ｆ） 発明の実施例 以下、本発明の一実施例を図面により説明する。(f) Examples of the invention An embodiment of the present invention will be described below with reference to the drawings.
第５図は本発明の一実施例によるマルチバイブレーク回
路を示す図であり、第６図は第５図におけるトランジス
タの等価回路を示す図である。なお、全図を通じて同一
符号は同一対象物を示す。第５図においては、トランジ
スタＱ１およびＱ２のベースに、それぞれ定電圧ダイオ
ードＺＤＩまたは−ＺＤ２が順方向に接続され、またト
ランジスタＱｌおよびＱ２のベースとエミッタとの間に
それぞれ抵抗Ｒ７またはＲ８が接続されている。第５図
において、トランジスタＱｌが導通状態、トランジスタ
Ｑ２が遮断状態にあるとすると、コンデンサＣ２は抵抗
Ｒ２を介して充電され、ａ電極側が電源電圧Ｖに、ｂ電
極側が地電位Ｅとなる。一方コンデンサＣＩも抵抗Ｒ３
を介して充電されることによりトランジスタＱ２のベー
ス電位が上昇し、トランジスタＱ２が導通状態となると
コンデンサＣ２のａ極がトランジスタＱ２を介して地電
位Ｅとなる為、トランジスタＱｌのベースとエミッタと
の間、および定電圧ダイオードＺＤＩの直列回路にはコ
ンデンサＣ２の充電電圧（＝電源電圧■）が逆バイアス
として印加されることとなる。然し該充電電圧は定電圧
ダイオードＺＤＩの降伏電圧以下である為、前記直列回
路には定電圧ダイオードＺＤＩの漏洩電流のみが流れる
こととなり、トランジスタＱ１のベースとエミッタとの
間には該漏洩電流による抵抗Ｒ７の電圧降下が逆バイア
スとして印加されることとなり、トランジスタＱ１が劣
化する恐れの無い充分低電圧に維持される。FIG. 5 is a diagram showing a multi-bye break circuit according to an embodiment of the present invention, and FIG. 6 is a diagram showing an equivalent circuit of the transistor in FIG. 5. Note that the same reference numerals indicate the same objects throughout the figures. In FIG. 5, a constant voltage diode ZDI or -ZD2 is connected in the forward direction to the bases of transistors Q1 and Q2, respectively, and a resistor R7 or R8 is connected between the bases and emitters of transistors Q1 and Q2, respectively. ing. In FIG. 5, when the transistor Ql is in a conductive state and the transistor Q2 is in a cut-off state, the capacitor C2 is charged through the resistor R2, and the a-electrode side becomes the power supply voltage V and the b-electrode side becomes the ground potential E. On the other hand, capacitor CI is also resistor R3
When the transistor Q2 becomes conductive, the a-pole of the capacitor C2 becomes the ground potential E through the transistor Q2, so that the base potential of the transistor Q2 increases. The charging voltage of the capacitor C2 (=power supply voltage ■) is applied as a reverse bias to the voltage regulator diode ZDI and the series circuit of the constant voltage diode ZDI. However, since the charging voltage is lower than the breakdown voltage of the voltage regulator diode ZDI, only the leakage current of the voltage regulator diode ZDI flows through the series circuit, and there is a voltage between the base and emitter of the transistor Q1 due to the leakage current. The voltage drop across the resistor R7 is applied as a reverse bias, and the voltage is maintained at a sufficiently low level that there is no risk of deterioration of the transistor Q1.
トランジスタＱ２に対しても、定電圧ダイオードＺＤ２
および抵抗Ｒ８が同様の効果を発揮する。Also for transistor Q2, constant voltage diode ZD2
and resistor R8 exhibit a similar effect.
なお例えば定電圧ダイオードＺＤＩおよび抵抗Ｒ７を含
むトランジスタＱ１の入力インピーダンスＲｉｌｌは（
３）式に示される。For example, the input impedance Rill of the transistor Q1 including the constant voltage diode ZDI and the resistor R7 is (
3) It is shown in Eq.
Ｒｉ”＝ｒｄ＋Ｒ７ｘ （ｒｂ＋ （１＋β）ｒｅ）÷
（Ｒ７＋ｒｂ＋（１＋β）ｒｅ）
＝ｒｄ＋ｒｂ＋ （１＋β） ｒ ｅ ・＋３１（但し
ｒｄは定電圧ダイオードＺＤＩの順方向抵抗）
（３）式において、抵抗ｒｄは二項以下に対し無視可能
な程小さい為、（４）式が成立する。Ri”=rd+R7x (rb+ (1+β)re)÷
(R7+rb+(1+β)re) =rd+rb+ (1+β)re ・+31 (where rd is the forward resistance of the constant voltage diode ZDI) In equation (3), the resistance rd is so small that it can be ignored compared to the two terms or less, so Equation (4) holds true.
Ｒｉ ＃ Ｒｉ ・・・（４）
従って、定電圧ダイオードＺＤＩおよびＺｎ２、並びに
抵抗Ｒ７およびＲ８はマルチバイブレーク回路の発振に
影響を殆ど与えない。Ri # Ri (4) Therefore, the constant voltage diodes ZDI and Zn2 and the resistors R7 and R8 have little effect on the oscillation of the multi-byte break circuit.
以上の説明から明らかな如く、本実施例によれば、マル
チバイブレータの発振に殆ど影響を与えること無く、ト
ランジスタＱ１およびＱ２を逆バイアスによる破壊或い
は劣化から保護することが可能となり、電源電圧■に制
限を与える必要が無くなる。桝えば自動交換機に併用さ
れるマルチバイブレーク回路においては、自動交換機の
主電源である直流−４８ボルトがその侭電源電圧として
使用可能となり、マルチバイブレーク回路専用の電源を
設ける必要が無（なる。As is clear from the above description, according to this embodiment, it is possible to protect transistors Q1 and Q2 from destruction or deterioration due to reverse bias, with almost no effect on the oscillation of the multivibrator, and the power supply voltage There is no need to impose restrictions. In other words, in a multi-bye break circuit used in conjunction with an automatic exchange, -48 volts DC, which is the main power supply of the automatic exchange, can be used as the secondary power supply voltage, and there is no need to provide a power supply exclusively for the multi-bye break circuit.
なお、第５図および第６図はあく迄本発明の一実施例に
過ぎず、例えば本発明の対象となるトランジスタ回路は
マルチバイブレーク回路に限定されることは無く、他に
幾多の変形が考慮されるが、何れの場合にも本発明の効
果は変らない。Note that FIGS. 5 and 6 are only one embodiment of the present invention, and for example, the transistor circuit to which the present invention is applied is not limited to a multi-bye break circuit, and many other modifications may be considered. However, the effects of the present invention do not change in either case.
（ｇｌ 発明の効果
以上、本発明によれば、トランジスタの入力インピーダ
ンス等の回路常数に変化を与えること無く、トランジス
タを逆バイアスの印加による破壊或いは劣化から保護す
ることが可能となる。(gl) Effects of the Invention As described above, according to the present invention, it is possible to protect a transistor from destruction or deterioration due to application of a reverse bias without changing circuit constants such as the input impedance of the transistor.
第１図は従来あるマルチバイブレータ回路の一例を示す
図、第２図は第１図におけるトランジスタの等価回路を
示す図、第３図は従来あるマルチバイブレーク回路の他
の一例を示す図、第４図は第３図におけるトランジスタ
の等価回路を示す図、第５図は本発明の一実施例による
マルチバイブレーク回路を示す図、第６図は第５図にお
けるトランジスタの等価回路を示す図である。
図において、ａおよびｂはコンデンサの電極、Ｃ１およ
びＣ２はコンデンサ、ＤＩおよびＤ２はダイオード、Ｅ
は地電位、Ｒ１乃至Ｒ８は抵抗、ＱｌおよびＱ２はトラ
ンジスタ、■は電源電圧、ＺＤＩおよびＺｎ２は定電圧
ダイオード、を示す。
隼 ！ 因 ＃２因
革３図 集４図
第６図 第にじFIG. 1 is a diagram showing an example of a conventional multivibrator circuit, FIG. 2 is a diagram showing an equivalent circuit of the transistor in FIG. 1, FIG. 3 is a diagram showing another example of a conventional multivibrator circuit, and FIG. 5 is a diagram showing an equivalent circuit of the transistor in FIG. 3, FIG. 5 is a diagram showing a multi-bye break circuit according to an embodiment of the present invention, and FIG. 6 is a diagram showing an equivalent circuit of the transistor in FIG. 5. In the figure, a and b are capacitor electrodes, C1 and C2 are capacitors, DI and D2 are diodes, and E
indicates a ground potential, R1 to R8 are resistors, Ql and Q2 are transistors, ■ is a power supply voltage, and ZDI and Zn2 are constant voltage diodes. Hayabusa! Cause #2 Cause and Revolution 3 Figure Collection 4 Figure 6 Rainbow
Claims (1)
圧を有する定電圧ダイオードを接続し、且つベースとエ
ミッタとの間に抵抗を接続することにより、逆バイアス
印加によるトランジスタの破壊劣化を防止することを特
徴とするトランジスタの保護回路。By connecting a constant voltage diode with a breakdown voltage higher than the power supply voltage in the forward direction to the base of the transistor, and connecting a resistor between the base and emitter, it is possible to prevent the transistor from being destroyed or deteriorated due to reverse bias application. Characteristic transistor protection circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7943184A JPS60236513A (en) | 1984-04-20 | 1984-04-20 | Protection circuit of transistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7943184A JPS60236513A (en) | 1984-04-20 | 1984-04-20 | Protection circuit of transistor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS60236513A true JPS60236513A (en) | 1985-11-25 |
Family
ID=13689686
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7943184A Pending JPS60236513A (en) | 1984-04-20 | 1984-04-20 | Protection circuit of transistor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60236513A (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS54114164A (en) * | 1978-02-27 | 1979-09-06 | Teac Corp | Free running multivibrator |
-
1984
- 1984-04-20 JP JP7943184A patent/JPS60236513A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS54114164A (en) * | 1978-02-27 | 1979-09-06 | Teac Corp | Free running multivibrator |
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