JPS60235520A - Voltage converting and holding circuit - Google Patents
Voltage converting and holding circuitInfo
- Publication number
- JPS60235520A JPS60235520A JP9212084A JP9212084A JPS60235520A JP S60235520 A JPS60235520 A JP S60235520A JP 9212084 A JP9212084 A JP 9212084A JP 9212084 A JP9212084 A JP 9212084A JP S60235520 A JPS60235520 A JP S60235520A
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- capacitor
- charging
- turned
- charging means
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、時間的に変化する入力信号を比較器で設定電
圧と比較するために、入力信号を被比較電圧に変換して
保持する電圧変換保持回路に関する。DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a voltage conversion/holding system that converts an input signal into a voltage to be compared and holds it in order to compare a time-varying input signal with a set voltage using a comparator. Regarding circuits.
従来例の構成とその問題点
例えば、時間とともにパルス幅が変化する入力信号をノ
コギリ波電圧と比較器で比較する場合、入力信号を1つ
のコンデンサ等の充電手段に一定時間充電し、その電圧
を保持することによって被比較電圧を得るのが一般的で
あった。しかし、このような電圧変換保持回路では、ノ
コギリ波電圧と比較する時間及び充電手段の保持電圧を
放電する時間の入力信号の変化を被比較電圧として取込
むことができず、制御装置として入力信号に対する応答
性が悪いという問題があった。Conventional configuration and its problems For example, when comparing an input signal whose pulse width changes with time with a sawtooth wave voltage using a comparator, the input signal is charged to a charging means such as a capacitor for a certain period of time, and the voltage is It was common to obtain the voltage to be compared by holding the voltage. However, in such a voltage conversion/holding circuit, changes in the input signal during the time for comparison with the sawtooth wave voltage and the time for discharging the holding voltage of the charging means cannot be taken in as the voltage to be compared; There was a problem with poor responsiveness.
発明の目的
本発明は、従来のかかる問題点に鑑み、応答特性の良い
制御を可能ならしめる電圧変換保持回路を提供すること
を目的とする。OBJECTS OF THE INVENTION In view of these conventional problems, an object of the present invention is to provide a voltage conversion/holding circuit that enables control with good response characteristics.
発明の構成
本発明は、このためパルス状の入力信号に応じて出力電
流が制御される定電流回路と、この定電流回路の出力に
よって充電される2つの充電手段と、前記定電流回路と
充電手段の間に介装された切換スイッチ部と、各充電手
段の放電手段と、前記2つの充電手段の充放電を交互に
かつ一方の充電手段が充放電中は他方の充電手段が充電
された電圧を保持する様に前記切換スイッチ部及び放電
手段を制御する制御回路とを備えて成り、比較器におい
て一方の充電手段に保持された電圧とノコギリ波を比較
している間に、他方の充電手段で入力信号に応じて充電
が行われ、この動作が交互に行われることによシ入力信
号の変化を逐時観測できる様にして電圧変換保持回路を
提供する。Structure of the Invention For this reason, the present invention provides a constant current circuit whose output current is controlled in accordance with a pulsed input signal, two charging means that are charged by the output of the constant current circuit, and a combination of the constant current circuit and the charging means. A changeover switch section interposed between the means, a discharging means for each charging means, and charging and discharging of the two charging means alternately, and while one charging means is charging and discharging, the other charging means is charged. It is equipped with a control circuit that controls the changeover switch section and the discharging means so as to maintain the voltage, and while the voltage held in one charging means is compared with the sawtooth wave in the comparator, the voltage held in the other charging means is To provide a voltage conversion/holding circuit in which charging is performed by means according to an input signal, and this operation is performed alternately so that changes in the input signal can be observed from time to time.
実施例の説明
以下本発明の一実施例を図面を参照して説明する。第1
図において、(1)はパルス状の入力信号が印加される
入力端子、(2)は定電流回路で、入力信号のパルス幅
に応じて一定電流がトランジスタ(Q、1)のエミッタ
電流として得られる。(3)及び(4)は切換スイッチ
部で、制御回路(9)の信号によりトランジスタ(Ql
)及び(Qs)がオン状態かオフ状態がを制御される。DESCRIPTION OF EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. 1st
In the figure, (1) is an input terminal to which a pulsed input signal is applied, and (2) is a constant current circuit, in which a constant current is obtained as the emitter current of the transistor (Q, 1) according to the pulse width of the input signal. It will be done. (3) and (4) are changeover switch sections, which are controlled by the signal from the control circuit (9) to
) and (Qs) are controlled to be on or off.
(5)及び(6)は充電手段であるコンデンサで、前記
定電流回路(2)の出力電流が、切換スイッチ部(33
(4)を通してこのコンデンサ(5)又は(6)に充電
される。(7)及び(8)は各コンデンサ(5)及び(
6)に対応して設けられた放電手段で、充電されたコン
デンサ(5)又は(6)を制御回路(9)の信号により
トランジスタ(Q4)又は(Q6)をオン状態にして放
電させるものである。αQは比較器、(ロ)は比較器α
1に入力するノコギリ波発生回路、(イ)は比較器α0
に入力する被比較電圧を入力するため、コンデンサ(5
)と(6)の電圧値の高い方を選択するものである。(5) and (6) are capacitors serving as charging means, and the output current of the constant current circuit (2) is connected to the changeover switch section (33).
This capacitor (5) or (6) is charged through (4). (7) and (8) are each capacitor (5) and (
A discharging means provided corresponding to 6) discharges the charged capacitor (5) or (6) by turning on the transistor (Q4) or (Q6) according to a signal from the control circuit (9). be. αQ is a comparator, (b) is a comparator α
Sawtooth wave generation circuit input to 1, (A) is comparator α0
A capacitor (5
) and (6), whichever has a higher voltage value is selected.
第2図においてv5はコンデンサ(5)の端子電圧、v
6はコンデンサ(6)の端子電圧、V目はノコギリ波発
生回路01)の出力電圧を示すものである。In Figure 2, v5 is the terminal voltage of the capacitor (5), v
6 indicates the terminal voltage of the capacitor (6), and V-th indicates the output voltage of the sawtooth wave generating circuit 01).
次に動作を説明すると、パルス状の入力信号が入力端子
(1)に印加されると、そのパルス幅に応じた一定波高
値でトランジスタ(Ql)のエミッタ電流が流れる。こ
こで、制御回路(9)の信号により、トランジスタ(Q
l)がオン状態、トランジスタ(Qs)(Q4XQ6)
がオフ状態とすれば、前記エミッタ電流はコンデンサ(
5)を充電する。その時のコンデンサ(5)の端子電圧
V8は第2図のtoの区間に示す様になる。Next, the operation will be described. When a pulsed input signal is applied to the input terminal (1), the emitter current of the transistor (Ql) flows at a constant peak value according to the pulse width. Here, the transistor (Q
l) is on, transistor (Qs) (Q4XQ6)
is off, the emitter current flows through the capacitor (
5) Charge. At that time, the terminal voltage V8 of the capacitor (5) becomes as shown in the section to in FIG.
コンデンサ(5)の充電開始後to経過すると、制御回
路(9)の信号により、トランジスタ(Qs)がオン状
態、トランジスタ(Q+)(Q4)(Qs)がオフ状態
となる。このとき、コンデンサ(5)はトランジスタ(
Ql)がオフ状態になる直前の電圧を保持し、定電流回
路(2)のエミッタ電流は、コンデンサ(6) ’i
充電スル。このときのコンデンサ(5)及び(6)の端
子電圧■5及びV6は第2図の区間11の状態であル、
この間に比較器αQにより■5とノコギリ波発生回路α
ηの出力電圧Vl+を比較する。このノコギリ波の電圧
上昇区間1+経過後、制御装置(9)の信号によりトラ
ンジスタ(Q4)がオン状態、トランジスタ(Ql)(
Qす(Qs)がオフ状態に制御され、コンデンサ(6)
の端子電圧が保持さし、コンデンサ(5)は放電される
。コンデン? (51)端子電圧が0になると、トラン
ジスタ(Ql)がオン状態、トランジスタ(Qs)(Q
4)(Qb)がオフ状態となり、コンデンサ(6)の端
子電圧が保持されたま\、コンデンサ(5)が充電され
る。この間が第2図の区間t2である。このうち、ノコ
ギリ波の電圧上昇区間t2でv6とv、lが比較器(]
0により比較される。以後、同様の動作を繰り返すこと
により、入力信号を切れ目なく観測し、被比較電圧を得
ることができる。When to has elapsed after the start of charging the capacitor (5), the transistor (Qs) is turned on and the transistors (Q+) (Q4) (Qs) are turned off by a signal from the control circuit (9). At this time, the capacitor (5) is the transistor (
The emitter current of the constant current circuit (2) is controlled by the capacitor (6) 'i
Charging is complete. At this time, the terminal voltages 5 and V6 of capacitors (5) and (6) are in the state of section 11 in FIG.
During this time, comparator αQ outputs ■5 and sawtooth wave generation circuit α.
The output voltage Vl+ of η is compared. After the voltage rise period 1+ of this sawtooth wave has elapsed, the transistor (Q4) is turned on by the signal from the control device (9), and the transistor (Ql) (
Qs (Qs) is controlled to the off state, and the capacitor (6)
The terminal voltage of is held and the capacitor (5) is discharged. Condensed? (51) When the terminal voltage becomes 0, the transistor (Ql) is in the on state, and the transistor (Qs) (Q
4) (Qb) is turned off, and the capacitor (5) is charged while the terminal voltage of the capacitor (6) is maintained. This period is section t2 in FIG. Among these, in the sawtooth wave voltage rise section t2, v6, v, and l are connected to the comparator (]
Compare by 0. Thereafter, by repeating the same operation, the input signal can be observed seamlessly and the voltage to be compared can be obtained.
なお、電圧変換保持回路の出力が比較器αOに入力され
る例を示したが、必ずしも比較器とは限らず、その他の
制御回路でもかまわない。同様に比較する電圧はノコギ
リ波のみではないので、充電手段の充放電のタイミング
の設定は他の制御信号によって行なっても良い。要は、
2つの充電手段を定電流回路によシ交互に充電すると共
に交互に放電して何れかの充電手段の電圧が保持される
構成であればよい。Although an example has been shown in which the output of the voltage conversion and holding circuit is input to the comparator αO, it is not necessarily a comparator, and other control circuits may be used. Similarly, since the voltage to be compared is not limited to the sawtooth wave, the charging/discharging timing of the charging means may be set using other control signals. In short,
Any configuration may be used as long as the two charging means are alternately charged and discharged alternately by a constant current circuit so that the voltage of any one of the charging means is maintained.
発明の効果
本発明の電圧変換保持回路によれば、以上の説明から明
らかな様に、常時2つの充電手段の何れかを入力信号に
応じて充電しているため、1つの充電手段を用いたもの
に比べて制御装置としての応答特性が良くなり、正確な
制御を行うことができる。Effects of the Invention According to the voltage conversion/holding circuit of the present invention, as is clear from the above explanation, since one of the two charging means is always charged according to the input signal, it is not necessary to use one charging means. The response characteristics of the control device are better than those of conventional models, and accurate control can be performed.
第1図は本発明の一笑施例の回路図、第2図は主要部の
電圧のタイミングチャートである。
(1)・・・入力端子、(2)・・・定電流回路、(3
3(4)・・・切換スイッチ部、(5) (0)・・・
コンデンサ(充電手段)、(7) (8)・・放電手段
、(9)・・・制御回路。
第7図FIG. 1 is a circuit diagram of a simple embodiment of the present invention, and FIG. 2 is a voltage timing chart of the main parts. (1)...Input terminal, (2)...Constant current circuit, (3
3 (4)... Selector switch section, (5) (0)...
Capacitor (charging means), (7) (8)... discharging means, (9)... control circuit. Figure 7
Claims (1)
流回路と、この定電流回路の出力によって充電される2
つの充電手段と、前記定電流回路と充電手段の間に介装
された切換スイッチ部と、各充電手段の放電手段と、前
記2つの充電手段の充放電を交互にかつ一方の充電手段
が充放電中は他方の充電手段が充電された電圧を保持す
る様に前記切換スイッチ部及び放電手段を制御する制御
回路とを備えた電圧変換保持回路。A constant current circuit whose output current is controlled according to a pulsed input signal, and a 2-channel battery that is charged by the output of this constant current circuit.
a changeover switch section interposed between the constant current circuit and the charging means; a discharging means for each charging means; and a charging and discharging means for the two charging means alternately and one charging means for charging and discharging the two charging means. A voltage conversion and holding circuit comprising the changeover switch section and a control circuit that controls the discharging means so that the other charging means maintains the charged voltage during discharging.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9212084A JPS60235520A (en) | 1984-05-08 | 1984-05-08 | Voltage converting and holding circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9212084A JPS60235520A (en) | 1984-05-08 | 1984-05-08 | Voltage converting and holding circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS60235520A true JPS60235520A (en) | 1985-11-22 |
Family
ID=14045571
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9212084A Pending JPS60235520A (en) | 1984-05-08 | 1984-05-08 | Voltage converting and holding circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60235520A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5343089A (en) * | 1990-01-26 | 1994-08-30 | Kabushiki Kaisha Toshiba | Sample-and-hold circuit device |
-
1984
- 1984-05-08 JP JP9212084A patent/JPS60235520A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5343089A (en) * | 1990-01-26 | 1994-08-30 | Kabushiki Kaisha Toshiba | Sample-and-hold circuit device |
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