JPS60213269A - Controller for inverter - Google Patents

Abstract

PURPOSE:To reduce the size of an inverter by providing a timer for counting a maintaining time for maintaining the ON/OFF combination state of a switching element stored in a memory, and controlling the operation of other device during the counting, thereby suppressing the capacity of the memory. CONSTITUTION:A controller for an inverter has a frequency setter 12, and a microprocessor 13, and the microprocessor 13 has the first-third memories 14- 16, a timer 17 for counting the set value, and a control unit 18. Since the unit 18 operates the inverter as prescribed, it reads out the maintaining time from the second memory 15, sets it to the timer 17, obtains the combination state of ON/ OFF of the transistor of the inverter from the first memory 14, and starts counting by the timer 17 to obtain the ON/OFF signal of the transistor. In this case, the control of the other device such as an outdoor blower is controlled and protected by the unit 18 during the counting time of the timer 17.

Description

DETAILED DESCRIPTION OF THE INVENTION (A) Industrial Application Field The present invention relates to ON-OFF control of a plurality of switching elements constituting a three-phase bridge. This is based on the combination state of the above and the maintenance time, and at the same time, the operation of other equipment can be controlled at the same time.

(B) Prior art In general, conventional inverter devices configure multiple switching elements (for example, transistors, thyristors, etc.) in a bridge shape, and control the ON/OFF states of these switching elements to convert DC into single-phase or three-phase was converting to the output of

The ON-OFF signal for one cycle of the switching element is stored in a storage element, and this signal is sequentially read out to control ON-OFF of the switching element. That is, to explain this based on Figs. 1 and 2, Fig. 1 shows a DC power supply (1) with six switching transistors (
2) to (7) are connected in a bridge shape and the terminals ([J), (
2) is a diagram of an inverter circuit that allows three-phase output to be obtained from the above. Transistors (2) to (power have pace terminals (3), (g), (8), ■, ω, and H, respectively)
It turns ON (energized state) when a level voltage is applied. Figure 2 shows terminals (3), (7), ), ■, ω
This is an f-dress map that excludes the state of the H level voltage applied to terminals (3) and (3).As an example, only 1 level of the II level signal applied to terminal (3) is described based on the PWM method, but the others are Since the H level signal applied to the terminal is the same, it will be omitted. For the pressure between addresses O and 5110, a signal used for 1 to 10 Hz is stored, and between addresses 512 and 10230, a signal used for 11 to 20[1 Hz] is stored.

Similarly, signals used for each frequency band are stored. This is tailored to the drive characteristics of the load connected to the terminal, (V), and iK.If the drive characteristics of the load are constant, it is only necessary to store the signal for one of the frequency bands. It is something. For example, if you need the output of 1 to 10) 1z from terminals (U),
~(Power terminal flash, (Y), (Z), ■, (Y), evil-
control signal was obtained. In this case, addresses O to 511 constitute one cycle, so it is necessary to appropriately set the cycle of the clock that specifies the address.

In this way, the switching signal for transistor (2) to (force) was stored in the memory element for one period. Therefore, K to store the signal for each trap-period for each frequency requires a large amount of storage water capacitance. In order to further increase the resolution of the output signal, it was necessary to further increase the capacity of the storage element.

In order to solve the above problems, Japanese Unexamined Patent Publication No. 57-46
A method such as that described in Publication No. 677 was considered.

According to this method, if the negative part of the three-phase AC shown in FIG. 3(a) ItC is inverted using a phase inverter etc.
Only positive waveforms as shown in figure (b) will be obtained. This figure 3 (b
The waveform of l is divided into electrical angles of 60° and divided into 1st ■, 2nd, 2nd
..., the U, V, and W phases are different, but all have the same waveform.These waveforms are also symmetrical in the middle of each section, that is, at the position shown by the dashed-dotted line.

When these waveforms are shifted by 30 degrees and superimposed, Figure 3 (C)
Six characteristics such as Do , Dt , Dt , Ds
, becomes D-D. In other words, an ideal AC waveform can be obtained by appropriately combining the characteristics shown in FIG. 3(C). That is, to obtain U phase, D at 0° to 30°
0 characteristic, 30° to 60° D1 characteristic, 60° to 9
0' is the Dt characteristic, 90° to 1200 is the 3% characteristic, I200 to 150° is the D4 characteristic, 150° to 18
At 0°, if the characteristics are selected sequentially, positive half-wave sine waves can be extracted continuously. Next 180°~360°
In order to obtain negative waveforms up to 100%, the selected waveform can be phase-shifted using the above method to obtain a complete sine wave. This sine wave can be returned to the ideal three-phase alternating current f by shifting the phase by 120 degrees, that is, by arbitrarily selecting the above characteristics.

Therefore, as mentioned above, a three-phase sine wave can be represented by the six selected characteristic traps within the angle between 0° and 30°. This means that if these characteristics are memorized, the three-phase sine wave It could be used as a control signal.

As described above, the conventional inverter device only outputs a switching signal of the transistor (2) or (power) based on the frequency setting signal, that is, it has a groove bottom as shown in Fig. 4. In the above, (8) is an inverter device such as the one mounted on the upper part 6, and the switching signal is sent to the terminals 2, (towards ),(Power,
It is output from ■, (to), and ■. Although the type of control device (9) that outputs the frequency setting coefficient does not matter, for example, in this figure, the control device (9) will be explained assuming that it controls an air conditioner. Therefore, OI is a temperature detector (e.g., negative characteristic thermistor) that detects the temperature of the conditioned room; OI is a temperature setting device (e.g., variable resistance) that sets the temperature of the conditioned room; The detected value and the setting value of the temperature setting device (111) are compared, and when the difference is large, a high frequency setting signal is output to the inverter device (8), and when the difference is small, a low frequency setting signal is output. Inverter device f
fi (8). This inverter device (8) outputs a switching signal to the transistors (2) to (7) of the inverter circuit to control the rotational speed of the three-phase AC load (in this case, the compression TA) based on the output frequency. It is something to do.

If configured in this way, an inverter device (8) and a control device (9) are required, and if each is configured using a microprocessor, two microprocessors are required, and if peripheral circuits are included, the inverter device (8) and control device (9) are required. It was a system. However, in order to use it in general household equipment such as air conditioners, it is necessary to downsize the system, and there are problems in simplifying maintenance and reducing costs by downsizing the system and reducing the number of parts. It was something that was done.

(c) In view of the problems addressed by the object of the invention, the inverter device of the present invention minimizes the capacity of the storage element to achieve miniaturization, and at the same time controls other devices, thereby reducing the overall system size. The present invention provides an inverter control device that achieves the following.

B) Structure of the Invention The inverter device of JJKL includes a three-phase bridge section configured using a small number of switching elements, and a second storage section that stores the maintenance time for maintaining the ON-OFF combination state of the switching elements. , a timer unit that measures this maintenance time, a continuous PWM output using the 0N-OFF combination state and the time measurement of this timer unit, and a continuous PWM output to the switching element; Equipped with a control unit that can control the operation of equipment, the capacity of the storage unit of the inverter device can be minimized to reduce the size of the inverter device, and at the same time, other equipment can be controlled and the overall system can be made smaller. It was planned.

(E) Embodiment Below, embodiments of the present invention will be explained based on FIGS. 5 to 17. First, FIG. In the figure (Q is a carrier wave, (Ml), (M, ),
(M,) are modulated waves whose phases are shifted by 120°, and (
There is a relationship of carrier wave frequency)/(modulated wave frequency→=(odd multiple of 3)).

(Xo) is the switching signal of transistor (2) obtained by comparing the carrier wave (Q) and the modulated wave (Ml), (Yo) is the switching signal obtained by comparing the carrier wave (C) and the modulated wave (M, ). The switching signal of the transistor (3), (Zo) is the carrier wave (C) and the modulation wave (M3).
) can be obtained by comparing the transistor (4
) switching signals for transistors (5) and (6
), (7) switching signals (x, ), (y, ),
(zo) is the switching signal (Xo), (Yo), (
Zo) are respectively inverted, so the explanation will be omitted.

As can be seen from this figure, the three-phase alternating current shown in Fig. 5 is composed of components (modulated wave (Ml),
(M2), a part of (M, )) are appropriately synthesized and 0° to 3
It forms a three-phase alternating current for 60°. Therefore, switching signals (Xo), (y
The same thing holds true for o) and (zo). θ°～
30' section switching signals (Xo), (yo),
(ZO) (7) Change the signal waveform to A(XI), (Yl),
(zl), the signal waveform (X
t), (T2), and (2,) are the waveforms obtained by reading the signal waveform (2,) backwards, the waveforms reading the signal waveform (T8) backwards, and the waveforms reading the signal waveform (X, ) backwards, respectively. It corresponds to

Hereinafter, by converting the signal waveforms (Xl), (Yl), and (Zo) by reading them backwards and inverting them, one period (06 to 360°) of the switching signal (Xo ), (Yo), and (Zo).

Next, Figure 6 shows (frequency of carrier wave)/(frequency of modulated wave)
This is an enlarged view of the 00° to 30° section when =27. Components in the figure that are the same as those in FIG. 5 are given the same reference numerals, and explanations thereof will be omitted. As shown in Figure 6, the signal waveforms (X, ), (Y
The sections where the states of o and (Z,) change are respectively expressed as ('ro
) to ('rat), transistor (2)'P
The ON-OFF state of J to (7) is as shown in FIG.

Note that the section (T11) in FIG. 6 always takes only a small amount of time even when the voltage ratio between the carrier wave and the modulated wave is changed. Therefore, since this interval from 06° to 30° takes a minute time, omitting it will not cause any problem in the operation of the inverter, and therefore, in the following explanation, this interval (Tll) will be omitted. This section (To), (T, ), (T6), (T
In 8), transistors (2) to (7) are 0N-O.
The FF combination states are the same, and the sections (T1), (
T7) and (TI 2 ) also have the same combination of 0N-OFF of the transistor (2) to (force), and similarly, the section (T
3), (':i',), (T9), (To), interval (T
, ), ('r:to) are also the same. Therefore, it is configured in four types of combinations as described above.

In this way, from transistor (2) to (power 0N-OFF)
The number of combinations of states is limited to a predetermined number.

Therefore, for general frequencies, the transistor (2) to (power can be 0N-OFF (ON is 1, OFF is O
), all combination states become K as shown in FIG. In this figure, states (0) to (7) are the basic combination states of transistors (2) to (().
The ON-OFF state of transistors (5), (6), and (7) is the ON-O state of transistors (2), (3), and (4).
It is assumed that the state is the inverse of the F1” state. Also,
States (8) to (c) indicate put-time states. For example, when switching the interval ('ro)→('r+)i in FIG. 7, the combination state of the transistors changes from state (0) to state (6) in FIG. 8. Specifically, transistor (4)
changes from ON to 0FFK, and the transistor (power becomes OF l”
→A change occurs in the point at which it turns ON. If there is no put-time state at this time, the transistor (4
), (forces may turn ON at the same time, causing a short circuit in the inverter circuit and damaging transistors (4) and (7). This is based on the switching characteristics of transistors (4) and (forces). This is mainly due to the time delay in the transition from ON to OFF.Therefore, the state (0
) from P! ! (6) When switching to put-time state (
Using 8), state +1 (0) → put time state (8) →
If the state is set to (6), the transistor (4) will not be short-circuited, and this problem will be solved.
If the switching characteristics of the transistor (2) or (see 60°) are improved by adding a discharge circuit, etc., such a get time condition will become unnecessary.

Such a state (0) to (force and put-time state (
8) If you combine (c), 0N-OFF for one cycle
It is possible to obtain the combination state of . 0N-OF of transistors (2) to (7) for one period obtained in this way
The combination state of F is shown in FIG. Note that the section (E) is in a put-time state.

Figure 10 shows each section ((1) to c!4) shown in Figure 9.
maintenance time (get time state (approximately filoμ(sec
))). Furthermore, as can be seen from Figures 5 and 6 above, the output waveform for one cycle can be expressed as a waveform in the 00 to 30° interval, and furthermore, the 06 to 60° interval, which is doubled, is 30°. The maintenance time of each section is symmetrical with respect to .

That is, by arranging the sections (0) to (17I) with the counter pressure section (1 to (0)), the sections A to S of section a can be obtained. Once determined, the maintenance time of each section for one cycle is also determined.

In addition, Figure 10 shows the output frequency from 20 to 120 Hz.
Each 11z is described separately. This is because the time of one cycle, that is, the frequency, is determined by the sum of the sustaining times, so it is necessary to set the sustaining time for each frequency.

Therefore, transistors (2) to (2) as shown in FIG.
If the 0N-OFF combination state of 7) is stored in the first storage section and the maintenance time shown in FIG. 10 is stored in the second storage section, this ON-OFF combination state and this maintenance time can be stored. By reading out the transistors (2) to (
It is possible to control the ON-OFF state of the force.

For example, to obtain an output with a frequency of 20 fiz, the first
To explain based on Figure 1, first, in the section ('ro), the 9th
Based on the diagram, from the section (0) of the first storage section, the transistor (2) to (the 0N-OFF combination state of the force and the 10th
Based on the diagram, read the maintenance time of section (0) and set it in a separately provided timer. Therefore, this state is maintained until this timer times out. In addition, the predetermined time at the end of this section (0) is in a put-time state,
0N of transistors (2) to (7) to the next section (1)
-Transistors (2) to (7) when the OFF state is switched
) to prevent damage. When the next trap timer times up, transistors (2) to (7) in section (1)
) is read out from the first and second memory sections, and the 0N-OFF state of the transistors (2) to (7) is read out and the maintenance time of the transistors (2) to (7) is
It controls the N-OFF state. Transistors (2) to (7) are turned on and off every time the following sections switch.
A continuous switching signal can be obtained by sequentially reading out the l;' state and maintenance time.

The operation of the control section when the control section that executes the above operations and the first and second storage sections are housed inside a microprocessor will be explained based on the flowcharts shown in FIGS. 12 and 13. In this flowchart, old is the set frequency given externally, (1) is the remaining time of the built-in timer, (C) is the set value for the interval, and (is 6θ≦θ<θ+
60”, and θ=O is O0≦θ×6
0°, θ=60 is 60°≦θ<120°,...θ=3
00 represents 300°≦θ≦360. In addition, the initial setting of the remaining time (1) is shown in Fig. 10.
, C), and the transistor (2) to (force 0N-
The off-state bad P is P=J' from Figures 8 and 9! (θ, C
). When starting operation by turning on the power, etc., after initializing and initializing variables, read the set frequency ") set in the external setting section.
Next, while viewing the maintenance time, set the timer setting time (,1) to the timer. Next, set the ON-OFF state (P) of transistors (2) to (7) to transistors (2) to (7).
output to transistor (2) or (0N-OF of power)
Define the F state. At this time, when changing to the next section, that is,
Set the output (P) of the required put-time state when the interval (Q becomes the interval (C+1)).

After that, the timer starts counting. Note that this timer is not configured by software but by hardware, and starts counting with a timer start signal.
:]. ) It outputs a timer interrupt signal after the time elapses and when time-up occurs. The operation of this timer is illustrated in a flowchart as shown in FIG. 13 for explanatory purposes. Therefore, this timer can be configured in software based on this flowchart diagram.

When the first timer interrupt signal is output from such a timer, the 0N-OFF state of the transistor (2) becomes the output P state, that is, the put-time state.After this, each variable (C), (0) changes. After performing the change processing, the set frequency (F') is read again and the same operation is repeated.

Therefore, when the set frequency side is switched, the output frequency is switched from the time the set frequency (F) is read.

FIG. 14 shows a block diagram of the apparatus according to the present invention, in which a bottle is a frequency setting section, a microprocessor is shown, a first storage section (14) internally stores the information shown in FIG.
The second storage unit aω stores the diagram, the third storage unit stores the diagram ([(9, a timer (I7) for measuring the set value, the first
It consists of a control unit Q8) that performs operations based on FIGS. 2 and 13. Furthermore, the terminals (3), (Y), (2S),
, (to) are connected to the base terminals of the respective transistors (2) to (7) of the three-phase inverter circuit shown in FIG.

The operation of the inverter control device configured as above will be explained in detail again using FIG. 11. First, when the output frequency (F') is set to F220 in the frequency setting section - reads the maintenance time "t=132" from the second storage unit (1 group) and sets it in the timer (L7) based on the values of F=20" and 7'(+20").

Next, based on the values of "θ=O" and "c=o", the transistor (2) to (force 0N-OFF combination state (g) is converted in the third storage part α6) and the first storage part Q [Twin and output. This output is sequentially OFF, OFF, ON, ON, ON, as shown in the state of electrical angle O0 in Fig. 11.
It is in the OFF state. After this, the timer (17) starts measuring time, and this state is maintained until the time measured by the timer αη reaches 't-tD'. Note that the HD (:, Hsec) in the second half of this interval T. During this period, it becomes a put-time state and the 0N-OFF state of transistors (2) to (7) becomes 0.
FF, OFF, OFF, ON, ON, OFF. Next, when the timer αη times up, the variable aC1θ is changed and the operation based on the 70-chart shown in FIGS. 12 and 13 is repeated again in the same manner as described above to obtain the section T1 of FIG. 11. Similarly, the next ridge section T2 to T2
4 for one period of transistor (2) to (force 0N)
-OFF signal can be obtained.

When the set frequency value is changed while obtaining an AC output of 20 Hz in this way, the set frequency value (F'
) is changed, the sustain time based on the new value of (1"J is read out from the second storage unit u9, and transistors (2) to (force 0N -Controls the OFF state and its maintenance time.

In the case of such an inverter device, the numerator Vf capacity of the output is determined by the time accuracy of the maintenance time. In other words, the unit of maintenance time can be changed to, for example, several tens of microseconds (sec) → "microseconds"
”, it is possible to further increase trap accuracy.

When the inverter device is configured as described above, timer U
From the time η starts counting the time until the timer (17) times up, the control unit 0 only measures the time of the timer. Therefore, during this time, the trap and other equipment can be controlled. A specific configuration when such an inverter device is used in an air conditioner will be described below. Figure 15 shows a separate air conditioner consisting of a guide unit 4 and an outdoor unit (1'I'l), including a compressor (4), a 4-way valve, and a 111 heat exchanger 12''IJ. , pressure reduction device (c), outdoor heat exchanger (2)
A refrigeration cycle is constructed by connecting the refrigeration pipes in an annular manner through a refrigerant pipe 17. (2) is a three-phase induction motor that drives an indoor blower, an outdoor blower (2), and a compressor (2), respectively, which are rotated by the output of the inverter control device C'IC based on the present invention. This inverter control device Q receives signals from the indoor controller (C) and the outdoor heat exchanger (C).
It operates based on the signal from the turbidity detector (to) that detects the frosting state of the compressor, and can change the rotation speed of the three-phase induction motor (b), that is, the capacity of the compressor (to).

Indoor controller C? J outputs a signal, such as a set frequency signal (F'), for changing the performance of the temperature detector C (11) that detects the indoor temperature and the compressor (4).

When such an air conditioner performs heating operation, the four-way valve υ is in the position shown by the solid line in Fig. 15, and the high temperature, high pressure refrigerant gas discharged from the secondary side of the compressor 4 flows through the four-way valve. 12D and is condensed in the indoor heat exchanger t23. At this time, if the indoor fan (c) is used to blow air, the room can be heated with the condensation heat of the refrigerant. Thereafter, this refrigerant is evaporated in the outdoor heat exchanger (241) via the pressure reducing device (c), and is sucked in from the primary side (S) of the compressor 4 via the four-way valve υ. In the refrigeration cycle that operates, the temperature of the refrigerant rises due to evaporation of the refrigerant, or heat absorption from the outside air, while the temperature of the outdoor heat exchanger (2) decreases.This temperature drop causes the temperature of the outdoor heat exchanger (2) to decrease. Frost builds up on the surface of the motor.This frost state is detected by the 71i frost detector (to), and a defrosting operation is required to remove this frost according to this frost state and t[k.

Therefore, the inverter control device (c) based on the present invention uses the frequency setting signal from the indoor 1lIIJ control device e1)
When you change the rotation speed of the three-phase induction DL motor (2), that is, the 11 signal of the compressor (4) by inputting , at the same time the trap and indoor control receive the frequency setting signal ")" , detection of Maro 4 type weight, control of the outdoor same feeding loom, and Ugai Iso 1
21 protection operation is performed.

The frequency is set using the indoor controller (QCJ), but this can also be done using the inverter control device.Hereinafter, the indoor controller system ω and the inverter control device (the signals in quotation 2 are used as a start signal, a frequency setting signal (F'), a switching signal for 40,000 shu υ, a control signal for the outdoor transport machine (A), and a pair of end signals in serial. The explanation will be based on the assumption that data is sent and received via a signal line.

Fig. 16 is a 7172 diagram of an inverter control device showing an embodiment of the present invention, where c3z is a receiving part that receives signals from the controller (c) on the indoor side; (b) An output signal is output when abnormal heat generation or overcurrent flows.■ is the frost detector mentioned earlier, and the output signal from the microprocessor (b) explained below is the one that is output. This microprocessor outputs Nmkx based on the signal. This microprocessor...) stores the signal from the receiving section C3 output in a buffer section c3!19 (9 in this buffer section automatically stores No. 10 and An internal interrupt signal is output from the terminal (INTa).), a timer section (to) that measures time based on the set value, first, second, and third memory sections C7), (peeling, (3)
1 and a control unit (4G), which performs the following operations based on the flowchart in Figure M17.

Incidentally, the timer (to) operates based on the flowchart of FIG. 13 in the same manner as described above.

First, when operation is started by inputting an electric signal, etc., initial settings and variables are initialized, and then the operation is the same as in the chart from 70 in Fig. 12 above, but it waits for a timer interrupt signal. While doing so, perform the following actions. First, an H level voltage is output from the terminal (Qυ) to cancel the masking of internal interrupts.At this time, if an internal interrupt signal is output from the terminal (INTa'), the terminal (INTa) receives this signal. Input the signal in the rear buffer (to), change the value of the set frequency prompt) based on this signal, and if there is a switching signal for the four-way valve D or an ON10 F F signal for the blower C26), this signal Based on the four-way valve ■υ or blower (2
6) Switch the state. Next, the amount of frost formed on the outdoor heat exchanger (241) is input from the layer formation detector (to) and it is determined whether or not defrosting operation is necessary.If defrosting is not necessary, the
Output the put-time status in the same way as the chart.
After further variable change processing, the set frequency W
) and repeat the same action.

If the arrival rate '1' is high and 4.4 operation is required, read the set frequency C) again after performing defrost control operation. This signal is sent to the indoor controller (2! Blower CI!
Perform actions such as stopping heating.

The outdoor unit (JOI switches the four-way valve Cυ and defrosts the outdoor heat exchanger C24J with the high temperature refrigerant discharged from the compressor (to). Also, the rotation speed of the compressor (20+) at this time is assumed to be a constant rotation speed. It is also possible to increase the temperature in stages, or to vary it by raising it in stages.After this, the outdoor heat exchanger (24)
(When there is no frost, the defrost end signal is sent to the indoor controller C.
i! At the same time as transmitting the signal to l, the four-way valve υ is switched to its original state and normal operation is resumed.

In addition, if an H level voltage is applied from the protection section to the terminal (INTc), an external interrupt is received and the compressor end is stopped regardless of the operation in the flowchart. The inner controller (which sends to the 2 bells).

As described above, the inverter control device according to the present invention is capable of controlling signal reception processing, frost detection, etc. while the timer section is counting time. Further, control type 41 is not limited to this, and other controls may be performed. Further, in the above embodiment, the inverter control device is used in an air conditioner, but it may be used in other electrical equipment.

(f) Effects of the Invention The inverter control device of the present invention includes a three-phase bridge section configured using a plurality of switching elements, and a second storage section that stores the maintenance time for maintaining the ON-OFF combination state of the switching elements. and a timer section that measures this maintenance time, and outputs a continuous PWM output to the switching element using the 0N-OFF combination state and the time measurement of this timer section, and also outputs a continuous PWM output to the switching element while the timer section is measuring time. Since it is equipped with a control unit that can control the operation of the equipment, a single control unit can control the ONOF F1 of the switching element.
It is possible to control other peripherals and devices at the same time. For example, when setting the output frequency for each issue, if a pulse code is given from the outside, conventionally a part is required to receive and process this signal, but with the present invention, this can be done with a single control unit, and the inverter control device When actually incorporated into a device, it is possible to make the device compact.

[Brief explanation of the drawing]

Figure 1 is an electric circuit diagram of a three-phase inverter, Figure 2 is an address map diagram of the contents of a memory element showing a conventional embodiment, and Figure 3 is an electric circuit diagram of a three-phase inverter.
Figure (a) is a waveform diagram showing three-phase alternating current. 1, *3E(c
). 2.3°(b) K*tL, -fhfa,. . -”3
Figure (b) is a block diagram showing a device that divides the 00 to 1800 minutes of the waveform obtained by inverting the negative part of the waveform in figure s3 (a) into six and overlaps it. Figure M4 is an explanatory diagram showing waveforms controlled by a conventional inverter, Figure 6 is an explanatory diagram showing specific waveforms of the present invention, and Figure 7 shows how an inverter is configured to obtain the waveforms shown in Figure 5. FIG. 8 is an explanatory diagram showing the ON-OFF state of the transistors constituting the inverter, and FIG. 9 is an explanatory diagram showing the ON-OFF state of the transistors constituting the inverter. FIG. 10 is an explanatory diagram showing the maintenance time of the ON-OFF combination state of the transistors constituting the inverter, and FIG. 11 is an explanatory diagram showing the combination state of the transistors constituting the inverter. An explanatory diagram showing the actual ON-OFF state of the transistor, FIGS. 12 and 13 are flowcharts showing the operation of the embodiment of the present invention, and FIG. '7AI4 is a block configuration diagram of the device showing the embodiment of the present invention. Figure 15 is an equipment configuration diagram when the present invention is used in an air conditioner, and Figure 16 is a diagram of the equipment configuration when the present invention is used in an air conditioner.
Block configuration diagram of the inverter control device used in the figure, Part 1
FIG. 7 is a flowchart showing one assistant operation of the control section shown in FIG. 16. +14), C off...first storage section, 051. (2)
...Second memory section, tlL (4I...control 111 section, qη, (g)...timer section. Applicant: Sanyo Electric Co., Ltd. and one other representative: patent attorney Shizuka Sano. π21!21 Flute; (Figure (1)) 3 figures (C) D, 1'''29'- Figure 4, Figure 6, Figure 7, c< 80 --I, X':,\nimu\ Work Figure 13

Claims (1)

[Claims] (1) A three-phase bridge section configured using ia switching elements, and the ON-OF I” of this switching element.
a first storage section that stores the combination state of the 0N-OF
a second storage section that stores a maintenance time for maintaining the combination state of F; a timer section that measures this maintenance time;
- A control unit that outputs a continuous PWM output to the switching element using the OFF combination state and the time measurement of the timer unit, and is capable of controlling the operation of other equipment while the timer unit is measuring time. An inverter-based @1 device characterized by being equipped with.