JPS6021254A - Recorder - Google Patents

Abstract

PURPOSE:To facilitate printing position control taking the spaces between recording heads into account and reduce the access time by controlling to access the addresses of different memories corresponding to the spaces between the recording heads. CONSTITUTION:In the forward printing operation an address counter 123 does not count up until the level of FOR becomes H and, for Y system, until the level of a decoder 3n in a system controller also becomes H and when those levels become H the counter 123 counts up and recording information stored in a memory 124 is successively read out and transmitted through a latch circuit 125 and a D/A converter 126 to apply a driving voltage to a recording head of the Y signal. In the same way, for M, C and BK system, when the levels of respective decoders 2n, n and O become H, address counters 123 count up and lagging caused by the spaces between the recording heads is compensated. In the backward printing operation, the level of RV signal becomes H and the reversed order is taken. With this constitution, the access time can be shortened.

Description

Detailed Description of the Invention Technical Field The invention of this application relates to a recording device that records images, characters, etc. using a recording body such as a plurality of recording heads arranged in the main scanning direction. An object of the present invention is to provide an image forming means that can easily control printing positions taking into account the spacing between a plurality of recording bodies.

Prior Art In a recording device using a recording head such as a liquid ejecting head, especially a recording device such as a full color printer, a plurality of recordings are performed, each corresponding to a color signal of each recording liquid, for example, Y, M, C, BK, etc. Color signals are recorded by arranging the heads in the main scanning direction. By the way, as will be explained later in connection with FIGS. 1 to 4, widening gaps inevitably exist between each head, so in order to obtain high-quality recorded images, it is necessary to take into account the gap between the heads. It is necessary to control the printing position.

Conventionally, the printing position has been controlled by software technology as a means for this purpose, but these methods require a large capacity memory in the system controller and have the disadvantage of requiring a long access time.

OBJECTS OF THE INVENTION Accordingly, the first invention of this application overcomes the above-mentioned drawbacks of the prior art and provides a simpler structure for controlling access to different addresses of a memory depending on the spacing between recording bodies. It is an object of the present invention to provide a recording device that can control the printing position.

A second object of the present invention is to provide a recording apparatus that can control the printing position with a simple configuration using a memory configuration in which mapping is performed with a shift corresponding to the interval between recording bodies.

A sixth aspect of the present invention is to provide a recording device that can control the printing position with a simple configuration by compensating the spacing between a plurality of recording bodies using shift register means. .

Structure of the Invention The first aspect of this application is to record a plurality of recording bodies (in a specific example described later, for example, color signals Y and M in FIG. 5).

A recording head 107 for C and BK) and a memory for storing information to be recorded (also a memory 12 in FIG.
4) means for controlling access to different addresses of the memory in accordance with the intervals between the plurality of recording bodies (also means for controlling the address counter 123 to access the memo 17124 in accordance with the high level of the corresponding decoder; )and;
The present invention is characterized by a recording apparatus comprising means for driving each of the plurality of recording bodies by the output of the memory (also means for driving each of the papermaking recording heads 107 by the output of the memory 124);

A second invention is a memory that stores a plurality of recording bodies and information to be recorded, and is mapped with a gap corresponding to the interval between the plurality of recording bodies (similarly,
Random access memory 202 in FIG. 9 having the mapping configuration shown in FIG. and means for driving each of the plurality of recording bodies by the output.

A third invention provides: a plurality of recording bodies; a shift register having a capacity difference corresponding to the interval between the plurality of recording bodies (also shift registers 401 to 406 in FIG. 11); and: information to be recorded. means for driving each of the plurality of recording bodies via the shift register (same color signals Y, M, C).

The present invention is characterized by a recording apparatus comprising: "means for driving a plurality of recording bodies via shift registers 401 to 403 by BK";

In the above, the citation of the specific examples described later does not limit the scope of the invention of this application in any way, and the embodiments of the invention of this application can be modified as appropriate within the scope of the claims.

Furthermore, the invention of this application can be widely applied to non-impact recording devices such as liquid jet recording devices, and furthermore, in this specification, recording refers to recording of images or characters, but below 1, both are collectively referred to as simply images. .

The mechanism of the recording apparatus, the relationship between the gap and the dot pitch of the recording body, and specific examples of the first, second, and sixth inventions of this application will be explained in detail below with reference to the drawings. Expanding the explanation of the bottom layer, an example of a full-color printer in which each recording medium is a liquid ejecting head corresponding to a color signal will be explained.

Mechanism of the recording device (Fig. 1, Stripe 2) In Fig. 1, reference numeral 1 denotes a platen around which recording paper is wound, and is rotated by a paper feed motor 12 via a belt transmission [2], Paper feed 9 is carried out in a direction perpendicular to .

Note that 3 is a paper feed knob for manual operation. Reference numeral 4 denotes a liquid ejecting head unit which is an example of a recording unit, the internal structure of which is shown in FIG. Reference numeral 5 denotes a carriage to which the liquid jet head unit 4 is fixed, and is moved by a carriage motor 10 along a screw 6 and a guide 7 in the main scanning direction (in the direction of the arrow).

FIG. 2 shows the internal structure of the liquid jet head unit 4,
41Y, 41M, 41C, 41BK are Y, M, respectively.
Ejection head that ejects C and BK recording liquid% 42Y, 4
2M, 42C, and 42BK are tanks for storing recording liquids of Y, M, C, and BK, respectively.

Since the configuration and operation of the recording apparatus shown in FIGS. 1 and 2 are well known to those skilled in the art, further detailed explanation will be omitted. Furthermore, the mechanism of the recording apparatus applied to the invention of this application can be modified in many ways from what is shown in these figures.

Relationship between recording body spacing and dot pitch (Fig. 6).

FIG. 4) FIG. 3 shows the arrangement of the ejection heads in FIG. 2, and there is a gap d between each head.

FIG. 4 shows the dot arrangement of the image to be recorded, and each dot is arranged at a pitch p. is set to be an integral multiple of diip.

Now if we set d = np, 1Y and M.

A gap of n dots exists between the M, C9C, and BK heads, and a gap of 6n dots exists between the Y head and the BK head.

Then, as the head unit 4 moves in the main scanning direction, in the illustrated example, the Y head first reaches the recording position on the recording paper in the outward path, followed by the M head.

The C and BK heads arrive at the recording position. On the return trip,
Conversely, the BK, C, M, and Y heads arrive at the recording position in this order. Note that the arrangement of the recording heads is not limited to the above example, and can be arranged in any order.

Specific example of the first invention of this application (FIGS. 5 and 6) The first invention of this application differs in access to addresses in an image memory by the number of pixels corresponding to the interval between recording bodies. The device compensates for deviations in the printing position due to the spacing between the recording bodies by controlling access to the memory, and FIG. 5 shows the overall configuration, and FIG. 6 shows the details of the memory access means.

In FIG. 5, a 101-channel converter receives image signals R, G, and BL, and is controlled by a synchronization control circuit 102 based on a synchronization signal 5yncK to output an image signal B.

G and BL are converted into digital signals R', G' and BL'. These R/, G', and BL' signals are sent to the image processing circuit 103.
The color signals of the recording liquid are converted into Y, M, C, and BK at
The image is input to the image memory 104. The output of the image memory 104 is converted into an analog voltage by a D/A converter 105, and a head driver 106 drives each recording head 107 at a predetermined timing. Note that the image processing circuit 103 and the image memory 104 are also controlled by the synchronization control circuit 102 based on the synchronization signal 5ync.

On the other hand, a system controller 108 composed of a microprocessor etc., in addition to the above, controls a carriage motor 110 via a carriage motor drive circuit 109 and a paper feed motor 112 via a paper feed motor drive circuit 110.
is controlled at a predetermined timing to form a desired image.

Note that Sp in the figure is a shift pulse generated by the system controller 108, and its operation will be described later in connection with FIG. 11.

In FIG. 6, 124 is a memory, and 126 is a memory 12.
This is an address counter that specifies the address of 4. Fifth
The color signal Y, M, C, BK data for each recording liquid, which is the output of the image processing circuit 103 shown in the figure, is sequentially input to the memory 124, and the color signal data corresponding to each pixel is stored at the same address in each memory 124. Make sure it is stored.

It is assumed that all zero data is stored at address zero. To do this, first the address counter 123
is reset by a reset signal, and the memory storage period signal φM is set to a low level. The address is sequentially counted up for each clock signal CLK via the Nant gate 122, and a desired amount of data, such as one line or two lines, is written into the memory 124. In this case, the Nando game N20a receives the output of a decoder, which will be described later.

It is assumed that the output of 120b is at a high level.

Next, in the printing operation, the address counter 126 is prevented from advancing until the FOR signal becomes high level 9 in the case of the forward pass, and until the decoder 3n in the system controller 108 becomes high level for the Y system. 3n becomes high level, the address counter 126 counts up for the first time, and sequentially outputs the contents of the memory 124, passes through the latch circuit 125 and the D/A converter 126, and then goes to the Y signal recording head (107 in FIG. 5). Apply driving voltage. Similarly, M.

For each C and BK system, a decoder 2n is also used.
, n and O go high, the address counter 12'
5 is counted up, the deviation due to the interval between the recording heads is compensated, and a driving voltage is applied to the corresponding recording head 107. In the case of the return trip, the RV signal is at a high level, and each recording head 107 is driven in the reverse order as shown in the figure.

Specific examples of the second invention of this application (FIGS. 7 to 10) The second invention of this application has a memory configuration in which the image memory is mapped by shifting the distance between the recording bodies. Figure 7 shows a specific example of a memory mapping configuration, Figure 8 shows a specific example of a recording screen, and Figure 9 writes to the pine pink configuration of Figure 7, and reads the output from this. A specific example of the control device will be shown.

In Figure 7, from the bottom to the top of the figure, Y, M
, C, BK color signals are expanded, and the memory address is, for example, 0 to 669 for the Y signal.
Address: 16-655 for M signal, 32-671 for C signal, 48-6 for BK double signal
87 addresses are assigned, and therefore, when writing, data is written with a shift of 16 addresses corresponding to the gap between each recording head. On the other hand, when reading, the signals written as described above are outputted from the same address.

The recording screen in FIG. 8 corresponds to a television screen when the recording apparatus according to the present invention is applied to recording video signals. In the figure, it is assumed that the number of recorded dots is, for example, 640 dots in the vertical direction and 960 dots in the horizontal direction. Corresponding to the memory configuration in Fig. 7, Y is shown in the upper left of Fig. 8.
, M, C, and BK scan the screen in the vertical direction, and when recording of one line is completed, successive lines are sequentially scanned toward the right in FIG. In this case, each line may be scanned from the top to the bottom in FIG. 8, or each line may be scanned back and forth in the opposite direction. In the above example, the interval between each recording head is 16 dots.

FIG. 9 shows a device generally corresponding to the image processing circuit 10'5 and memory 104 of FIG.
0 is a color conversion circuit which receives input digital image signals R, G,
BL is the color signal of the recording liquid Y, M, C.

BK and send them to the memory control circuit 201.
Enter. Memory control times M 201 tri
These color signals are written into a random access memory (R, AM) 202 with a shift corresponding to the interval between the recording bodies, and outputs are sequentially taken out from the same address.
These are sent to a subsequent device such as a head driver as a color signal Y',
Supplied as M', C', BK'.

In FIG. 9, 206 is an address bar k, and 204 is a readout.

A write control signal 205 is a data bus.

CLK is a clock signal and corresponds to the shift pulse SpK in FIG. 5, NLE is a write command signal for the next line and instructs the previous stage device to output data, and PR is a print ready signal.

The operation of the apparatus shown in FIG. 9 will be explained with reference to the flowchart shown in FIG. In FIG. 10, step 300 is an initial setting operation, steps 601 to 306 are one line memory write operation, steps 607 to 612 are one line memory read operation, and 313 to 614 are line switching operations.

(1) In order to set the device to the initial state in step 300, the RAM address A (see FIG. 7) is set to A =
01c Set the address L of the s line (see Figure 8) to ■, 20.

(2) In memory write operation, first set the NLE signal, reset the RAM, and then set the clock signal C.
The presence or absence of LK is detected (steps 301-302). ,
If the clock signal CLK is detected, the read/write control signal 204 is set to a write operation, and the color signal data from the color conversion circuit 200 is written to the RAM 202. In this case, the Y signal comes from address "A" in the Y area in FIG. 7 (initially, A=0 as described above), the M signal comes from address "A+16" in the M area, and the C signal comes from address "A+16" in the M area. Similarly, the BK signal is written from address "A+62"' in the C area (writing is performed from address "A+48" in the BK area (steps 303 to 304). Next, "A11'" is written to A'''. "Set the address and perform the same operation as A2640.
Repeat until the address is reached (steps 305-606).

(6) In the memory read operation, first set read address B to 13=Q, for example, and read.

The write control signal 204 is set to write operation, then the presence or absence of the print ready signal PR is detected, and the presence or absence of the clock signal is further detected (steps 307 to 609).
. This clock signal may be the clock signal CLK that controls the read operation described above, or may be separately supplied from the printer side. If the print ready signal and clock signal are output, a read operation is performed, but since the read operation is performed at the same address of the RAM 202 for each color signal, Y/, M/,
The C/ and BK' signal outputs are read from the same location "B" in each of the Y, M, C, and BK areas, respectively. Next, set address "B+1' to B" and perform the same operation =
Repeat until address 688 is reached (step 310-3
12).

In the above example, each line is scanned in the same direction, but in order to alternately scan each line in the opposite direction, the write operation is the same as above, but in step 607 in the read operation, B -set to address 688,
In step 311, the address “B-1” is set in “B”,
It is only necessary to change the value to 5 so that the B=Q address is detected in step 512. Note that the reverse scanning is controlled by, for example, a Print Ready No. 4M P box.

(4) When the writing and reading operations for one line are completed, the same operation is performed for the next line “L+1” L =
Wait until it reaches 960. This completes the writing and reading operations for one screen.

(5) Regarding the second invention of this application, as a modification of the specific example shown in FIGS. 9 and 10,
The recording speed can be increased by installing two sets of one set and operating the write operation on one side and reading the already written signals on the other side, thereby increasing the recording speed. ), it is possible to increase the speed of readout.

When the second invention of this application is applied to a recording device that does not require a large capacity memory such as a video signal, writing is performed line by line as described above.

The sixth invention of this application has the same basic concept as the second invention, but it can handle multiple recording media with a simple structure by using a shift register. A specific example of this is shown in FIG. 11.

In FIG. 11, the color signals Y, M, and C input to the image memory 104 are first-in, first-out shift registers 40i (3n length), 402 (2n length), and 402 (2n length), each having a capacity difference equal to the recording head interval. 40
5 (n length), the color signal BK is directly input to the D/A converter 105. As a result, data shifted by the distance between the recording heads is D/A converted for each shift pulse Sp input from the system controller 108 in FIG. 5, and a driving voltage is applied to each recording head 107 in accordance with the timing pulse Tp.

As is clear from FIG. 11, the shift register 401
The number of ~405 is one less than the number of recording heads, that is, the number of color signals for each recording liquid, and as an extreme example, if there are two recording heads, one shift register is sufficient, and the scope of the claims. The relationship between the numbers of recording bodies and shift registers in (3) also includes this aspect.

Also, instead of directly connecting the outputs of the shift registers 401 to 403 and the BK signal output to the D/A converter 105, D/A conversion is performed using a small memory with the same memory weight for each of the above color signal channels individually or in common. It may be added to the front stage of the container 105.

Effects of the Invention As explained in detail above, the first invention of this application controls access to different addresses of the memory corresponding to the intervals between the recording bodies, and the second invention controls the access of different addresses of the recording bodies. The third aspect of the present invention uses a shift register means to control the printing position in consideration of the spacing between the recording bodies with a simple configuration. Since sequential access is possible compared to conventional devices, the access time can be shortened, and the memory capacity can be reduced, so it is possible to downsize the recording device and reduce manufacturing costs.

[Brief explanation of the drawing]

FIG. 1 is a schematic perspective view of the mechanism of a liquid jet recording device which is an example of a recording device to which the invention of this application is applied, and FIG. 2 is a liquid jet head which is an example of a recording unit in FIG. A perspective view of the unit, FIG. 3 is an explanatory diagram showing the arrangement of each recording medium in the recording body unit, FIG. 4 is an explanatory diagram of the dot pitch of a recorded image, and FIG. A block diagram showing the overall electrical configuration of a recording device to which the invention is applied; FIG. 6 is a block diagram of a specific example in which the image memory section in the device of FIG. 5 is configured by applying the first invention of this application; FIG. 7 is an explanatory diagram of a specific example of the mesori mapping configuration in the second invention of this application, FIG. 8 is an explanatory diagram of the recording screen, and FIG. FIG. 10 is a block diagram showing the main parts of a concrete example of the configured recording device, FIG. 10 is a flowchart explaining the operation of the device in FIG. 9, and FIG. FIG. 2 is a block diagram of a specific example constructed by applying the invention of FIG. In the figure, 101 is a ~Φ converter, 102 is a synchronous control circuit, and 10
6 is an image processing circuit, 104 is an image memory, 105 is a D/
A converter, 106 is a head driver, 107 is a recording head, 108 is a system controller, 123 is an address counter, 124 is a memory, 125 is a latch circuit, 20
0 is a color conversion circuit, 201 is a memory control circuit, 2
02 is Random Access Nomori, 401. 402.403a indicates a shift register.

Claims (3)

[Claims] (1) a plurality of recording bodies; a memory for storing information to be recorded; means for controlling access to different addresses of the memory in accordance with intervals between the plurality of recording bodies; A recording device comprising: means for driving each of the plurality of recording bodies with an output. (2) A plurality of recording bodies, a memory for storing information to be recorded, which is mapped with a gap corresponding to the interval between the plurality of recording bodies, and sequential output from the same address of the memory. and means for driving each of the plurality of recording bodies by the output. (3) a plurality of recording bodies; and a shift register having a space difference corresponding to an interval between the plurality of recording bodies; and driving each of the plurality of recording bodies via the shift register according to information to be recorded. and a recording device comprising: