JPS60205484A - Rom reading system - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed description of the invention] [Technical field of invention] The present invention relates to a ROM reading method suitable for LSI implementation.

[Technical background of the invention and its problems]

In recent years, mask ROMs have been widely used as kanji pattern memories. FIG. 1 shows an example in which a 16 dot x 16 dot kanji pattern is constructed by combining several mask ROMs.

However, in the past, kanji patterns like this were not displayed on CRT displays.

It was necessary to configure two types of printers due to the difference in scanning direction for each printer print.

In the figure, (a) is the row scan method (horizontal reading).

(b) is a column scan method (vertical reading).

Therefore, it is necessary to prepare two types of i-scroll ROMs, or, if only one is present, to perform vertical/horizontal conversion using an external circuit, which has the drawback of significantly lowering performance.

Also, in the case of printer printing, there are vertical and horizontal writing, so
There is no choice but to use two types of character patterns. In that case, if two types of ROMs are mounted with emphasis on performance, it will become expensive. On the other hand, when only one type of ROM is required, an external conversion circuit is required and the performance deteriorates. FIG. 2 shows an example of the internal configuration of bits in a conventional mask ROM 256.

[Purpose of the invention]

In view of the above-mentioned drawbacks, the present invention is a ROM that enables both vertical and horizontal reading within an LSI with one type of mask ROM without using two types of mask ROM, thereby reducing cost and improving performance. The purpose is to provide a reading method.

[Summary of the Invention] The present invention adds to the conventional components of this fiLsI, two drivers whose row decoder output is gated by a control signal specified from the outside, and two drivers corresponding to each driver. The configuration is such that different memory matrix cells are added, and when either one is accessed, the expected data is obtained via the output buffer. This eliminates the need for an external circuit for vertical/horizontal conversion, and eliminates the need for vertical/horizontal conversion operations, which eliminates the burden on firmware depending on the number of bits, leading to an improvement in processing speed.

[Embodiments of the invention]

Hereinafter, embodiments of the present invention will be described in detail using FIG. FIG. 3 shows an embodiment of the mask ROM of the present invention.

What is added to the conventional example is a signal Cod that specifies whether row (horizontal) reading or column (#) reading is to be performed.

Driver A34 and driver B35 drive the output of the row decoder 32 controlled by this signal.2 sensed by driver A346 or driver B35
memory matrix cells A, B (each with 36 rows and 3 rows)
7).

The memory matrix λ36 has a bit configuration for vertical reading (
The memory matrix B37 has a bit configuration for horizontal reading (FIG. 1a). In Figure 1, 31 is an address buffer and latch, 33 is a column decoder, 38 is an output bass block, and 39 is an Il chip enable buffer and clock.Since each of these components is well known, their explanation here will be omitted. Omitted.

The operation of the two embodiments of the present invention will be described in detail below.

First, when address information is input from the outside, it passes through the address input buffer & latch 31 and goes to the row decoder 32.
．． Address information is set in the column decoder 33. Here, Cod is given from the outside.

If the signal is true (M reading designation), the driver A34 drives the output of the row decoder 32, and outputs the entire pattern (vertical pattern) of the memory matrix cell A36. On the other hand, the output from driver 1335 becomes ON, and the output (horizontal pattern) of memory matrix cell B37 is all OF.
F and vertical reading is performed.

If the reverse K COL signal is false (horizontal reading designation), the driver B35 drives the output of the row decoder 32, and the memory matrix cell [137 pattern (horizontal pattern) t-
Output. On the other hand, driver A34 outputs "0",
All outputs of the memory matrix cell A36 are turned off, and horizontal reading is performed.

〔Effect of the invention〕

As explained above, according to the present invention, the effects listed below are obtained.

(1) If both vertical and horizontal writing were required, an external circuit for W-horizontal conversion was required in addition to the ROM.

This is no longer necessary, and external hardware can be reduced.

+21 When performing M horizontal conversion, connect the ROM output to an external node.
Whether you do it with software or firmware, the editing time depends on the number of bits.

The performance has been significantly degraded, but with the method of the present invention, this editing is no longer necessary externally, so the same performance can be obtained for one-way bidirectional reading, and the performance is improved.

[Brief explanation of drawings]

FIGS. 1(-) and 1(b) are diagrams showing examples of the configuration of kanji patterns. FIG. 2 is a diagram showing an example of the internal configuration of bits in a conventional mask ROM 256, and FIG. 3 is a block diagram showing an embodiment of the present invention. 32・・・・・・・・・・・・・・・・・・・・・・
・Low decoder 33・・・・・・・・・・・・・・・
・・・・・・・・・ Column decoder 34/35...
・・・・・・・・・・・・ Driver 36・37・・・・
・・・・・・・・・Memory matrix 38・・・・
・・・・・・・・・・・・・・・・・・・・・・Output Huffup Agent Patent Attorney Kensuke Norichika (and 1 other person)

Claims (1)

[Claims] An address buffer control unit that receives address information given from the outside, a row decoder and a column decoder that decode it, two drivers whose row decoder output is designated from the outside and one of which is gated by a control signal; A ROM read method that has different memory matrix cells provided corresponding to each driver, and the 1# characteristic is that when one of them is accessed, the expected data is obtained via an output buffer.