JPS60201651A - Lead frame for semiconductor - Google Patents
Lead frame for semiconductorInfo
- Publication number
- JPS60201651A JPS60201651A JP5889884A JP5889884A JPS60201651A JP S60201651 A JPS60201651 A JP S60201651A JP 5889884 A JP5889884 A JP 5889884A JP 5889884 A JP5889884 A JP 5889884A JP S60201651 A JPS60201651 A JP S60201651A
- Authority
- JP
- Japan
- Prior art keywords
- copper
- lead frame
- iron
- alloy
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49579—Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
- H01L23/49582—Metallic layers on lead frames
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の背景〕
本発明は半導体装置を構成するに適したリードフレーム
に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Background of the Invention] The present invention relates to a lead frame suitable for constructing a semiconductor device.
従来、半導体用リードフレーム材としては、鉄系のコ・
ξ−ル、４２合金等や銅系の錫入銅、鉄入り銅等の銅合
金が用いられている。これらの材料では、鉄系シーＰフ
レーム材の方が強度や熱膨張係数の面からは銅合金系リ
ードフレーム材よシ優れている。また、最近、リードフ
レームの経済性を追求する面から、クロムと鉄の鉄合金
や鉄等の安価な材料の使用も提案されている。この場合
、基体の耐食性と半田特性を与えるために銅めっきをし
た後、少なくとも半導体素子配置部及び素−子とリード
とを配線するインナーリード部に銀めっきを施していた
。Traditionally, iron-based co-metallic materials have been used as lead frame materials for semiconductors.
Copper alloys such as ξ-ru, 42 alloy, copper-based tin-containing copper, and iron-containing copper are used. Among these materials, the iron-based C-P frame material is superior to the copper alloy-based lead frame material in terms of strength and coefficient of thermal expansion. In addition, recently, in order to pursue economical efficiency of lead frames, it has been proposed to use inexpensive materials such as iron and alloys of chromium and iron. In this case, after copper plating is applied to give the substrate corrosion resistance and solder properties, at least the semiconductor element placement area and the inner lead area for wiring the element and leads are plated with silver.
このように、鉄合金又は鉄を基体とする半導体用リード
フレームは、表面が銅めっき層となっているため半導体
素子をろう接するペレット付工程と、素子とインナーリ
ードとを全細部で配線するワイヤヂンディング工程で３
００℃を越える熱処理を受けるため、厚い銅酸化膜が形
成される。このような酸化膜は脆く、酸化膜密着性が弱
いため、プラスチックで樹脂封止した場合、酸化膜が剥
離して水がそのすき間から侵入し、半導体の信頼性を大
きく損なう原因となっている。In this way, lead frames for semiconductors based on iron alloys or iron have a copper plating layer on the surface, so they require a pellet attachment process to solder the semiconductor elements, and wires to wire the elements and inner leads in every detail. 3 in the binding process
A thick copper oxide film is formed due to the heat treatment at temperatures exceeding 00°C. This kind of oxide film is brittle and has weak oxide film adhesion, so when it is sealed with plastic, the oxide film peels off and water enters through the gaps, causing a significant loss in the reliability of the semiconductor. .
一方、外部リー１は半田付性を付与するため溶融半田め
っき又は錫めっきが行われているが、銅表面に厚く酸化
膜が形成されているために、強力なフラックスを使用す
るか、あらかじめ酸化膜を除去する酸洗処理が行なわれ
ていた。このような強力なフラックスを用いるか、酸洗
処理を行うと、樹脂とリードフレームのすき間に酸が残
存し、半導体の信頼性を低下させる原因となっていた。On the other hand, external lead 1 is hot-dip solder-plated or tin-plated to provide solderability, but since a thick oxide film is formed on the copper surface, strong flux must be used or oxidation must be performed beforehand. A pickling treatment was performed to remove the film. When such a strong flux is used or when pickling treatment is performed, acid remains in the gap between the resin and the lead frame, causing a reduction in the reliability of the semiconductor.
本発明の目的は、前記の如き従来技術の欠点を解消し、
鉄系のリードフレームの信頼性を大幅に向上させた半導
体用リードフレームを提供することにある。The purpose of the present invention is to eliminate the drawbacks of the prior art as described above,
An object of the present invention is to provide a lead frame for semiconductors that has significantly improved reliability of iron-based lead frames.
本発明者らは種々検討した結果、上記の目的は次の如き
本発明の半導体用リードフレームによって達成されるこ
とを見出した。As a result of various studies, the present inventors have found that the above object can be achieved by the following semiconductor lead frame of the present invention.
すなわち、本発明は、クロム、ニッケル等を含む鉄合金
または鉄からなる金属体表面に銅と亜鉛または銅と錫を
主体とする合金めっき層を設けたことを特徴とする半導
体用リードフレームである。That is, the present invention is a lead frame for a semiconductor, characterized in that an alloy plating layer mainly consisting of copper and zinc or copper and tin is provided on the surface of an iron alloy containing chromium, nickel, etc. or a metal body made of iron. .
本発明の半導体用リードフレームの好ましい態様にお−
では、前記リードフレームの少くとも極細線でワイヤ昶
ンＰされたインナーリード部端部に銀被榎層が設けられ
ている。In a preferred embodiment of the semiconductor lead frame of the present invention -
In this case, a silver coated layer is provided at the end of the inner lead portion of the lead frame, which is wire-wrapped at least with an ultra-fine wire.
本発明における、鉄系基体上に設ける銅−亜鉛または銅
−錫を主体とする合金めっきは、酸化性雰囲気、例えば
大気中にて約３００℃の加熱処理を受けた場合、従来の
銅めつきと比較して酸化皮膜の密着性が改善されている
ことが特徴である。In the present invention, when the copper-zinc or copper-tin alloy plating provided on the iron-based substrate is subjected to heat treatment at about 300°C in an oxidizing atmosphere, e.g. It is characterized by improved adhesion of the oxide film compared to
銅の耐酸化性を改善する金属元素として亜鉛、錫の他に
多くの元素があげられる。従って、合金めっき膜として
は、銅と亜鉛または錫を主体とし、その他、鉛、ニッケ
ル、ビスマス、カドミウム、銀、アンチモン等を微量含
有させた場合も上記と則様な効果が得られ、本発明で云
う、銅と亜鉛または銅と錫を主体とする合金めっき層と
はこのような場合も包含する。In addition to zinc and tin, there are many other metal elements that improve the oxidation resistance of copper. Therefore, the same effects as those described above can be obtained even when the alloy plating film is mainly composed of copper and zinc or tin, and contains trace amounts of lead, nickel, bismuth, cadmium, silver, antimony, etc., and the present invention The alloy plating layer mainly consisting of copper and zinc or copper and tin includes such cases.
なお、合金めっき膜の耐熱性及び半田付性から、銅−亜
鉛合金としては、亜鉛が１０〜５０重量％、銅−錫合金
としては、錫が１０〜７０重量％の範囲にあることが好
ましい。In addition, from the viewpoint of heat resistance and solderability of the alloy plating film, it is preferable that the copper-zinc alloy has a zinc content of 10 to 50% by weight, and the copper-tin alloy has a tin content of 10 to 70% by weight. .
以下、本発明の実施例を添付図面を参照しつつ説明する
。Embodiments of the present invention will be described below with reference to the accompanying drawings.
実施例 ｌ
第１図は本発明のリードフレームの一実施例を示す平面
図、第２図はその要部拡大断面図である。Embodiment 1 FIG. 1 is a plan view showing an embodiment of the lead frame of the present invention, and FIG. 2 is an enlarged sectional view of the main part thereof.
図示するように、本発明の半導体用リードフレーム１は
インナーリード部６とアウターリード部７より構成され
ている。すなわち、３％Ｃｒ−Ｆｅ合金よシなるリード
フレーム１に第１表に示す組成のＣｕ−Ｚｎ合金めっき
層２を３μ厚さに設け、ペレットを取シ付ける部分（タ
ブ部）５を含むインナーリード部に部分銀めつき層３を
３μ厚に設けである。また比較例として、Ｃｕ−Ｚｎ合
金めっきの代りにＣｕめつきを行った前記と同様のリー
ドフレームを作った。As shown in the figure, the semiconductor lead frame 1 of the present invention is composed of an inner lead part 6 and an outer lead part 7. That is, a lead frame 1 made of 3% Cr-Fe alloy is coated with a Cu-Zn alloy plating layer 2 having a thickness of 3 μm having the composition shown in Table 1, and an inner layer including a portion (tab portion) 5 for attaching a pellet is formed. A partial silver plating layer 3 with a thickness of 3 μm is provided on the lead portion. Further, as a comparative example, a lead frame similar to the above was made in which Cu plating was applied instead of Cu-Zn alloy plating.
このようにして得られたリードフレームを大気中４００
℃で２分間加熱劣化処理を行い、粘着テープを全面に張
シ付け、テープピーリングにより酸化膜剥離の有無から
、酸化膜の密着性を調べた。The lead frame thus obtained was placed in the atmosphere for 400 minutes.
A heat deterioration treatment was performed at .degree. C. for 2 minutes, an adhesive tape was applied over the entire surface, and the adhesion of the oxide film was examined by tape peeling to determine whether or not the oxide film was peeled off.
また、各リードフレームをフラックス（タムラ化研製Ｆ
−３００Ｖ）中に５秒間浸漬後、５ｎ６０’１６−Ｐｂ
４０％の溶融半田中（２３０℃±５℃ ）に５秒間浸漬
し、半田ぬれ面積から半田付性を評価した。In addition, each lead frame was coated with flux (Flux manufactured by Tamura Kaken).
-300V) for 5 seconds, 5n60'16-Pb
It was immersed in 40% molten solder (230°C±5°C) for 5 seconds, and the solderability was evaluated from the solder wetted area.
上記の試験結果を第１表に示した。The above test results are shown in Table 1.
実施例 ２
第１図及び第２図に同様に示すように、３％、Ｃｒ−Ｆ
ｅ合金よりなるり−Ｐフレーム１に第１表に示す組成の
Ｃｕ−８μ合金めつき層４（第２図で（４）として示し
だ）を３μ・：厚に設けた後、ペレット取り付は部（タ
ブ部）５を含むインナーＩＪ−ＩＦ部６に部分銀めつき
層３を３μ厚に設けた。得られたリードフレームについ
て実施例１と同様な試験を行い、得られた結果を第１表
に示した。Example 2 As shown in FIGS. 1 and 2, 3% Cr-F
After providing a Cu-8μ alloy plating layer 4 (indicated as (4) in Figure 2) with a thickness of 3 μm and having a composition shown in Table 1 on the P frame 1 made of e-alloy, pellets were attached. A partial silver plating layer 3 having a thickness of 3 μm was provided on the inner IJ-IF portion 6 including the tab portion 5. The obtained lead frame was subjected to the same test as in Example 1, and the obtained results are shown in Table 1.
第 １ 表 なお、第１表の各試納の評足は次の通シである。Table 1 The ratings for each sample shown in Table 1 are as follows.
〔酸化膜密着性〕Ｏ二酸化膜剥離なし
Δ：酸化膜３０チ未満剥離
×：ｖ化膜３０％以上剥離
〔半田ぬれ性〕 ○：９５チ以上（半田ぬれ面積）Δ
： ９４〜８０ ％
×：８０−未満
以上の結果から、不発明によｊ）ｃｕ−Ｚｎ合金めつき
またはＣｕ−８ｎ合金めつきを行ったリードフレームは
Ｃｕめつきのみの場合と比較して酸化膜密着性及び半田
ぬれ性共に改良されているだとがわかる。[Oxide film adhesion] O dioxide film does not peel off Δ: Less than 30 inches of oxide film peels off ×: 30% or more of V-oxide film peels off [Solder wettability] ○: 95 inches or more (solder wetting area) Δ
: 94 to 80% It can be seen that both oxide film adhesion and solder wettability are improved.
本発明においては、鉄系リードフレームにあらかじめ銅
めっきを施した後、・銅−亜鉛合金めっきまたは銅−錫
合金めっきを行う場合にも本発明と同様な酸化膜密着性
と半田ぬれ性が得られ、従って本発明はこのような態様
をも含むものである。In the present invention, the same oxide film adhesion and solder wettability as in the present invention can be obtained even when copper-zinc alloy plating or copper-tin alloy plating is performed after copper plating is applied to the iron-based lead frame in advance. Therefore, the present invention also includes such embodiments.
この場合は、表面に設ける合金めっきの厚さは−０，２
μ程度であれば下層の銅めつき層の酸化膜密着性を改善
することができる。In this case, the thickness of the alloy plating provided on the surface is -0,2
If it is about μ, the oxide film adhesion of the underlying copper plating layer can be improved.
本発明によれば、鉄系リードフレームを用いた場合でも
樹脂封止を低下させる要因である銅めっきの酸化膜密着
性を著しく改善することができる。According to the present invention, even when an iron-based lead frame is used, the oxide film adhesion of copper plating, which is a factor that deteriorates resin sealing, can be significantly improved.
このことは、鉄系リードフレーム材を使用した半導体装
置の樹脂封止性を安定化し、信頼性を高めることになる
。従って、本発明によシ安角で信頼性の高い半導体装置
を提供することが可能となり、その経済的効果は犬であ
る。This stabilizes the resin sealability of the semiconductor device using the iron-based lead frame material and increases the reliability. Therefore, according to the present invention, it is possible to provide a semiconductor device with high reliability at low angles, and its economical effects are excellent.
なお、本発明おいて、銅−亜鉛または銅−錫を主体とす
る合金めっきの酸化膜密着性が銅めっきの場合と比較し
て著しく良好なのは、銅を合金化することにより酸化膜
の成長速度が抑制されたからである。従って、同じ熱処
理を受けても合金めっきの方が酸化膜厚が薄いために酸
化膜の密着性が良好であり、且つ半田付性も良好な結果
となる。In addition, in the present invention, the reason why the oxide film adhesion of copper-zinc or copper-tin alloy plating is significantly better than that of copper plating is that the growth rate of the oxide film is improved by alloying copper. This is because it was suppressed. Therefore, even when subjected to the same heat treatment, alloy plating has a thinner oxide film, resulting in better oxide film adhesion and better solderability.
第１図は本発明の半導体用リードフレームの一実施例を
示す平面図、第２図はその要部拡大断面図である。
１・・・鉄系リードフレーム ２・・・銅−亜鉛合釜め
っき３・・・銀めつき ４・・・銅−錫合金めっき５・
・・タブ部 ６・・・インカーリ−１部７・・・アウタ
ーリード部
丼 ｌ 口
殊 ２日FIG. 1 is a plan view showing an embodiment of a lead frame for a semiconductor according to the present invention, and FIG. 2 is an enlarged sectional view of a main part thereof. 1... Iron lead frame 2... Copper-zinc alloy plating 3... Silver plating 4... Copper-tin alloy plating 5.
...Tab part 6...Inkari-1 part 7...Outer lead part bowl l Kushu 2nd
Claims (3)
鉛または銅と錫を主体とする合金めっき層を設けたこと
を特徴とする半導体用リードフレーム。(1) A lead frame for a semiconductor, characterized in that an alloy plating layer mainly consisting of copper and zinc or copper and tin is provided on the surface of a metal substrate made of iron or iron alloy.
または銅と錫を主体とする合金めっき層を設け、且つ少
なくとも極細線でワイヤダンドされるインナーリード先
端部に銀被覆層を設けたことを特徴とする半導体用リー
ドフレーム。(2) An alloy plating layer mainly composed of copper and zinc or copper and tin is provided on the surface of a metal base made of iron or an iron alloy, and a silver coating layer is provided at least at the tip of the inner lead wired with ultra-fine wire. A lead frame for semiconductors featuring:
る特許請求の範囲第（１）項又は第（２）項に記載の半
導体用リードフレーム。(3) The semiconductor lead frame according to claim (1) or (2), wherein the iron alloy is an alloy of iron and chromium or nickel.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5889884A JPS60201651A (en) | 1984-03-26 | 1984-03-26 | Lead frame for semiconductor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5889884A JPS60201651A (en) | 1984-03-26 | 1984-03-26 | Lead frame for semiconductor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60201651A true JPS60201651A (en) | 1985-10-12 |
| JPH0512858B2 JPH0512858B2 (en) | 1993-02-19 |
Family
ID=13097611
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5889884A Granted JPS60201651A (en) | 1984-03-26 | 1984-03-26 | Lead frame for semiconductor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60201651A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62166553A (en) * | 1986-01-18 | 1987-07-23 | Mitsubishi Electric Corp | Resin-sealed semiconductor device |
| KR100286631B1 (en) * | 1992-01-17 | 2001-04-16 | 웨인스테인 폴 | Lead frame for electronic package with improved adhesion |
| EP1469514A3 (en) * | 2003-04-16 | 2005-07-13 | Shinko Electric Industries Co., Ltd. | Conductor substrate, semiconductor device and production method thereof |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5817275A (en) * | 1981-07-24 | 1983-02-01 | Toshiba Corp | Pilot valve device |
| JPS58181888A (en) * | 1982-04-02 | 1983-10-24 | Furukawa Electric Co Ltd:The | Silver coating material and preparation thereof |
-
1984
- 1984-03-26 JP JP5889884A patent/JPS60201651A/en active Granted
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5817275A (en) * | 1981-07-24 | 1983-02-01 | Toshiba Corp | Pilot valve device |
| JPS58181888A (en) * | 1982-04-02 | 1983-10-24 | Furukawa Electric Co Ltd:The | Silver coating material and preparation thereof |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62166553A (en) * | 1986-01-18 | 1987-07-23 | Mitsubishi Electric Corp | Resin-sealed semiconductor device |
| JPH0476504B2 (en) * | 1986-01-18 | 1992-12-03 | Mitsubishi Electric Corp | |
| KR100286631B1 (en) * | 1992-01-17 | 2001-04-16 | 웨인스테인 폴 | Lead frame for electronic package with improved adhesion |
| EP1469514A3 (en) * | 2003-04-16 | 2005-07-13 | Shinko Electric Industries Co., Ltd. | Conductor substrate, semiconductor device and production method thereof |
| US7301226B2 (en) | 2003-04-16 | 2007-11-27 | Shinko Electric Industries Co., Ltd. | Conductor substrate, semiconductor device and production method thereof |
| US7524702B2 (en) | 2003-04-16 | 2009-04-28 | Shinko Electric Industries Co., Ltd. | Conductor substrate, semiconductor device and production method thereof |
| EP1833089A3 (en) * | 2003-04-16 | 2010-04-14 | Shinko Electric Industries Co., Ltd. | Method of producing a conductor substrate for mounting a semiconductor element |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0512858B2 (en) | 1993-02-19 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4441118A (en) | Composite copper nickel alloys with improved solderability shelf life | |
| US4707724A (en) | Semiconductor device and method of manufacturing thereof | |
| KR100381302B1 (en) | Semiconductor device and manufacturing method thereof | |
| US4529667A (en) | Silver-coated electric composite materials | |
| US5436082A (en) | Protective coating combination for lead frames | |
| EP0116844A2 (en) | Copper alloys for suppressing growth of cu-al intermetallic compounds | |
| JPH07503103A (en) | package | |
| US5650661A (en) | Protective coating combination for lead frames | |
| US5728285A (en) | Protective coating combination for lead frames | |
| JP2925815B2 (en) | Lead frame for mounting semiconductor chip and method of manufacturing the same | |
| JPS60201651A (en) | Lead frame for semiconductor | |
| JP2766605B2 (en) | Copper alloy lead frame for bare bonding | |
| JPS6149450A (en) | Lead frame for semiconductor | |
| JP3313006B2 (en) | Copper alloy lead frame for bare bond | |
| JP2570911B2 (en) | Semiconductor package and lead frame used therefor | |
| JPH058276B2 (en) | ||
| JPS6036000B2 (en) | Heat-resistant silver coated copper wire and its manufacturing method | |
| JPH09283688A (en) | Copper coated lead frame material | |
| JPS6214452A (en) | Lead frame for semiconductor | |
| JPS6353287A (en) | Ag-coated electric conductor | |
| JPS60225456A (en) | Lead frame for semiconductor | |
| JP3280686B2 (en) | Consumer device and manufacturing method thereof | |
| JPS6142941A (en) | Lead frame for semiconductor | |
| JPS60147147A (en) | Lead frame for semiconductor device | |
| JPH09223771A (en) | Electronic component lead member and its manufacture |