JPS60201455A - List storing device - Google Patents

Abstract

PURPOSE:To read simultaneously all memory banks in parallel when reading a list by storing the list dividing it into sublists for each memory bank, and provid ing an address register to each memory bank. CONSTITUTION:Data to be written in a memory and the name of list belonging to the data are inputted, a memory controlling device 7 determines to which sublist they are to be assigned. The memory controlling device 7 retrieves a list control table 8 and obtains address of the first element in the column of the first sublist out of the name of list to which the data belong, and prepares elements to be stored while making the address a pointer section and inputted data a data section. Then, it examines vacant area of memory banks 4-i from a vacant table 9, and prepares storing address of these elements. This address is set to address registers 10-i through address signal lines 5-i, and prepared elements are set on data lines 6-i and stored in designated address position in memory banks 4-i.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a storage device for storing data, and particularly to a storage device for storing data, and in particular, a storage device for storing data in a list structure in a memory device composed of a plurality of memory banks. It is related to storage devices.

[Prior art]

A conventional device of this type is shown in FIG. In the figure, (1) is a memory control device, (2) is a list management table, (3) is an empty area table, and (4-1).

(4-2), ... (4-n) are memory banks, respectively, (5-1), (5-2), ... (5-n)
are address signal lines, (6-1) and (6-2
), . . . (6-n) are data lines, respectively.

Next, the operation of the apparatus shown in FIG. 1 will be explained.

Memory bank (4-1) via memory control device (1)
.

List writing/reading is performed for (4-2), . . . (4-n), and FIG. 1 shows memory banks (4-1), (4-2), . (4-n) through the memory control device (1) is not shown.

When storing a list, that is, when writing a list to a memory device, when data and the name of the list to which the data belongs are input, the memory control device (1) searches the list management table (2) and writes the list to the memory device. The address of the first element (AX address of the most recently written element) is extracted and used as a pointer section, and the input data and the above pointer section are combined to create a list element. If the list is not registered in the list management table (2), "00...θ" is set as the pointer part. This means that the element is the first element in the list. Next, the free space table (3) is checked to determine the address at which this element should be stored. In this case, the address is a memory bank number (temporarily assumed to be i) as an upper address.

In the example shown in FIG. 1, the address is divided into an in-memory address (temporarily assumed to be ADi) as a lower address (1≦i (n)) and a lower address (assumed to be ADi). When the address at which the element should be stored is determined, the address signal line (
5-i), and the element to which the pointer section has been added as described above is connected to the data line (6-i).
) and writes this element to address location AD in memory bank (4-i).

When this writing is completed, the value of the storage address of the first element of the list in the list management table (2) is changed to the address of the written element (i.e. upper address i and lower address A).
The address configured by Di (hereinafter expressed as i+AD) is updated.

When the next data in this list is subsequently input, the memory control unit (ll) searches the list management table (2) and retrieves the address of the first element of the list, but at this time, i + ADi is retrieved. It should be.Using this 10AD as a pointer, create an element of the list along with the input data, check the empty area table (3) to determine the address, and store this element at that address position. Then, the value of the storage address of the first element of the list in the list management table (2) is updated with the address, and the list is stored by repeating this operation.

From the method for determining the pointer section as described above, it can be inferred that the reading of the list is performed in the reverse order of the writing.Next, the operation when reading the list will be described. When a list name to be read is entered manually, the memory control device (1) searches the list management table (2) and obtains the address of the first element of the list (that is, the last written element for the list). . Assume that this address is j + ADj. Here, j indicates the number of the memory bank in which the list is stored as an upper address, and ADj
is the address within the memory bank. Therefore, in the example shown in FIG. 1, 1 < j < n.

The memory control device (2) sets the address ADj on the address signal line 5-j, accesses the memory bank (4-j), and reads out the element at the address position ADj.

This element contains data and a pointer part, and this pointer part indicates the address of the element stored before the element in question, so this pointer part is used as the address from which to read the next element. Set. Also, in many cases, the element that has been read out can be deleted from the memory bank, and in such cases, the address just read out is added to the empty area table (3) and a new write is made to this address location. (i.e., the memory area is freed). As described above, the next element is read using the pointer part of the read element, and this operation is repeated until the element whose pointer part is 00...O'' is read, and the pointer part is 00...・An element of 0'' indicates the first stored data for that list, so when an element whose pointer part is °00...0'' is read, it means that all elements of that list have been read. .

Since the conventional device is configured as described above, it has the disadvantage that it takes time to read out the list because only one element can be read out at a time from the memory device including all memory banks. there were.

[Summary of the invention]

This invention was made in order to eliminate the drawbacks of the conventional ones as described above, and in this invention, the list is divided into sub-lists for each memory bank, and each memory bank has an address register. ), each memory bank can be read simultaneously and in parallel when reading a list.

[Embodiments of the invention]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 2 is a diagram of a blower showing an embodiment of the present invention, in which the same reference numerals as in FIG. ) is a list management table of this invention, and (9) is an empty area table of this invention. Also (10-1), (10-2
), . . . (10-n) are address registers provided corresponding to each memory bank.

The memory control device (7) controls the memory banks (4-1) to (4).
-2) Control storage and parallel readout. List management table (8) contains list names of all lists stored in all memory banks and each memory bank (4-1) to (4-
n) of the first element of the sublist (in this case, only the lower address described in connection with FIG. 1, that is, the address AD in the memory bank) is stored. Further, the empty area table (9) stores empty areas of the memory for each memory bank.

The operation of the apparatus shown in FIG. 2 will be explained below. First, the case of storing a list will be described.

When the data to be written to the memory device (all memory banks are collectively referred to as the memory device) and the name of the list to which the data belongs are input, the memory control device (
7) determines which sublist this item belongs to. Control is performed so that one list is almost evenly distributed and stored in all memory banks, and the list in the i-th memory bank (4-1) is stored as the first sub of the list. This is called a list, and the list management table (8) contains the first . ...i...
- For each n-th sublist, the address of the first element (last stored element) of the sublist is stored. In order to distribute and store one list almost equally in all memory banks, for example, memory banks in which to store the relevant elements may be cyclically selected in numerical order. That is, 1, 2. ...n.

1.2. Assume that memory banks are selected according to the order of
Suppose that it is decided to input i).

The memory control device (7) searches the list management table (8), and uses the list name of the list to which the data belongs and the address of the first element of the i-th sublist (in the case of the first element of the sublist). OO...θ'') and create an element to store this address as a pointer part and the input data as a data part.Next, from the empty area table (9), create an element to store the empty area of the memory bank (4-i). Obtain the storage address of this element.This address is connected to the address signal line (5-
i), set it in the address register (10-i), set the created element on the data line (6-i), and set it in the address register (10-1) in the memory bank (4-i).
) is stored at the address location determined by the contents of the file.

Next, the storage address value of the first element of the first sublist of the list in the list management table (8) is updated with the address of the element currently stored in the memory bank (4-i), and the empty area table (9 ) updates the contents. Subsequently, when data to be stored in the same list is given, the memory control device (7) decides to store this data in the (i+1)th memory bank, and first stores it in the first memory bank. An operation corresponding to the above operation is performed and stored in the (i+1)th memory bank, and such a storage operation is repeated to store the list.

Next, the operation when reading a desired list from the memory device will be described. When the list name to be read is input, the memory control device (7) reads the list management table (8).
Search for all sublists of that list (all memory banks (
4-1), (4-2), ... (corresponding to (4-n)), and use this as the respective address signal i (5-1), 2)
...(5-n) and each address register (
10-1), (10-2),...(10-n)
Set each memory bank (4-1), (4-2
), ...(4-n), the elements of each sublist stored at that address are read in parallel, and each data line (
6-1), (6-2), . . . (6-n) to be imported into the memory control device. The contents of the pointer part in the elements of each sublist are transferred to each address signal line (5-
1), (5-2), ... (5-n) through each address register (10-1), (10-2), ...
...(10-n), and then read the elements of each sublist from each memory bank using the contents of each address register. When such an operation is repeated and an element whose pointer section is set to "OO...0" is read out, it is known that the reading of that sublist has been completed.

In the above embodiment, the address itself in the memory bank is set in the pointer section, but a relative address, etc. is set in the pointer section, and the address in the memory bank is determined from the read contents of the pointer section through address conversion. In that case, for example, an address register (10-1).

(10-2), . . . (10-n) may have a decoding function.

〔Effect of the invention〕

As described above, according to the present invention, since a plurality of memory banks can be read simultaneously and in parallel using the address register provided for each memory bank, it is possible to read data from a plurality of memory banks in a short time. can be read.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a conventional device, and FIG. 2 is a block diagram showing an embodiment of the present invention. (4-1), (4-2),...(4-n)...
・Respectively memory bank, (5-1), (5-2)
,...(5-a)...respectively address signal lines,
(6-1), (6-2),...(6-n)...
・Respectively data line, (7)...memory control device, (
8)...List management table, (9)...Empty area table, (10-1), (10-2). ...(10-n)...Each address register. The same reference numerals in each figure indicate the same or corresponding parts. Agent Masuo Oiwa 1, Indication of the case Patent Application No. 59-059010 3. Person making the amendment Representative Hitoshi Katayama Department 4, Agent 6 Contents of the amendment (1) The scope of claims in the specification is corrected as shown in the attached sheet. (2) Page 9, line 8 r(4-1) to (4-2) of the specification
Correct the text "J" to "(4-1) to (4-n)". 7. List of attached documents (1) Amended scope of patent claims
... 1 copy (or more) Attachment 2, Claims A memory device constituted by a plurality of memory banks, an address signal provided for each memory bank of the plurality of memory banks and accessing the storage element of the memory bank. each address register to be set, means for dividing data belonging to the same list into each sub-list corresponding to each of the above-mentioned memory banks according to a predetermined rule, list names of all the lists stored in the above-mentioned storage device, and each list. A list management table that stores all sublists belonging to the name and the addresses of fC and elements recently written to each sublist in correspondence, and an empty area that stores the empty area of the storage device for each memory bank. At the initialization stage of the table, a bit pattern indicating the head of the list, for example 00...0'', is added to the address of the element most recently written to each sublist of the list management table.
, and set all areas in the above empty area table as empty areas. For data that is requested to be written with a list name, determine the sublist of the data, and write the corresponding list from the list management table. Reads the address of the element most recently written in the sublist of the name, uses this as a pointer, organizes the element to be written together with the data requested to be written, and refers to the empty area table. to determine the address to be written in the memory bank corresponding to the sublist, set this determined address in the address register corresponding to the memory bank, write the above element to the memory bank, and write the above element to the memory bank. Along with this, there is a method for updating the contents of the list management table and the empty space table, and for a list for which reading is requested by specifying a list name, the most recent of all sub-lists belonging to the list is retrieved from the list management table. Reads the address range of the element written in and sets it in each of the above address registers corresponding to each sublist, and reads the element of the sublist from each memory bank in parallel for multiple memory banks. The address of the next element to be read is created from the pointer part and set in the address register corresponding to the memory bank, and this read operation is performed from the pointer part in the above initialization stage. A list storage device comprising means for repeatedly executing each sub-list until a bit pattern indicating the head of the list written in the list management table is output.

Claims (1)

[Scope of Claims] A memory device constituted by a plurality of memory banks, each address register provided for each memory bank of the plurality of memory banks and set with an address signal for accessing a storage element of the memory bank, each address register being the same. means for dividing the data belonging to the list into each sub-list corresponding to each of the above-mentioned memory banks according to a predetermined rule, list names of all the lists stored in the above-mentioned storage device, and all sub-lists belonging to each list name; , a list management table in which addresses of elements recently written to each sublist are stored in correspondence with each other; an empty area table in which empty areas of the storage device are stored for each memory bank; The address of the element most recently written to each sublist in the list management table is “0”.
A means of writing 0...0゛ and setting all areas of the above empty area table as empty areas, and for data requested to be written with a list name, determining a sublist of the data, and performing the above method. Reads the address of the element most recently written to the sublist of the list name from the list management table, uses this as a pointer, and organizes the elements to be written together with the data requested to be written above. The address to be written in the memory bank corresponding to the sublist is determined by referring to the free space table, the determined address is set in the address register corresponding to the memory bank, and the above element is written to the memory bank. writing, means for updating the contents of the list management table and the contents of the free space table in conjunction with this writing, and for a list for which reading is requested by specifying a list name, all items belonging to the list from the list management table are The address range of the most recently written element of the sublist is read and set in each of the above address registers corresponding to each sublist, and the elements of the sublist are read from each memory bank in parallel for multiple memory banks. Read and divide this into data and pointer part, create the address of the next element to be read from the pointer part, set it in the address register corresponding to the memory bank, and perform this read operation from the pointer part as described above. A list storage device comprising means for repeatedly executing each sublist until "00...0" written in the list management table is output in the initialization stage.