JPS60200549A - High heat dissipation ic package - Google Patents

High heat dissipation ic package

Info

Publication number
JPS60200549A
JPS60200549A JP5612684A JP5612684A JPS60200549A JP S60200549 A JPS60200549 A JP S60200549A JP 5612684 A JP5612684 A JP 5612684A JP 5612684 A JP5612684 A JP 5612684A JP S60200549 A JPS60200549 A JP S60200549A
Authority
JP
Japan
Prior art keywords
heat dissipation
insulating layer
package
chip
hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5612684A
Other languages
Japanese (ja)
Inventor
Eiji Kawase
英司 河瀬
Naoharu Horino
堀野 直治
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP5612684A priority Critical patent/JPS60200549A/en
Publication of JPS60200549A publication Critical patent/JPS60200549A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • H01L23/04Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/053Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
    • H01L23/057Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body the leads being parallel to the base
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched

Abstract

PURPOSE:To raise a heat dissipation efficiency by forming a heat dissipation through hole of a low thermal resistor connected with the surfaces of a die attach unit and an IC package. CONSTITUTION:A window hole 17 for containing an IC chip 16 is opened at the center by pressing, heat dissipation through holes 19 connected with die attach unit 14 are opened at both sides, the holes 19 are buried by printing with a material having preferable thermal conductivity such as tungsten, and a conductor pattern 20 is radially formed on the upper surface. When an IC package containing the chip 16 is mounted on an electronic circuit substrate to perform a logic operation. Then, the heat generated from the chip 16 is dissipated from the dia attach unit 14 through heat dissipation through holes 9, 23 to the surface of the package via low thermal resistance thermal conductivity passage, conducted through the unit 14 to the first insulating layer 13, the second insulating layer 15 and the third insulating layer 21 and dissipated from the surface of the IC package.

Description

【発明の詳細な説明】 〔技術分野〕 本発明は、高い放熱性を有するICパッケージ構造に関
する。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to an IC package structure with high heat dissipation.

〔従来技術〕[Prior art]

電子機器において、IC素子の高集積化及び高速化に伴
い消費電力の増加ひいては単位面積或いは単位体積当シ
の発熱量の増加が生じ、そのためIC素子によシ発熱し
た熱を効率よく除去する必要が生じている。
In electronic devices, as IC elements become more highly integrated and operate at higher speeds, power consumption increases and the amount of heat generated per unit area or volume increases. Therefore, it is necessary to efficiently remove the heat generated by the IC elements. is occurring.

そこで、従来は放熱手段のICパッケージ構造として、
ICチップから発生した熱をダイアタッチ部を介しセラ
ミック絶縁層へ伝導してパッケージ表面よシ放熱し、更
に放熱効果を上げる必要がある場合は、パッケージ表面
に放熱フィン等を付けて放熱面積を拡大し、これを実現
している。
Therefore, conventionally, as an IC package structure for heat dissipation means,
The heat generated from the IC chip is conducted to the ceramic insulating layer through the die attach area and dissipated from the package surface.If it is necessary to further improve the heat dissipation effect, attach heat dissipation fins etc. to the package surface to expand the heat dissipation area. And we have achieved this.

以下、従来のICパッケージを第1図に基づいて詳細に
説明すると、同図において、1はICチップ、2は前記
ICチップ1を搭載するダイアタッチ部3をタングステ
ンによシ中央面にパターン形成するセラミック製の第1
絶縁層、4は前記第1絶縁層3上に積層するセラミック
製の第2絶縁層で、中央に前記ICチップ1の収納用窓
穴5を穿設すると共に、該収納用窓穴5の孔縁から放射
状にタングステンを用いて導体パターン6を形成する。
Hereinafter, a conventional IC package will be explained in detail based on FIG. 1. In the same figure, 1 is an IC chip, and 2 is a die attach part 3 on which the IC chip 1 is mounted, which is formed by forming a pattern on the center surface of tungsten. The first one made of ceramic
An insulating layer 4 is a second insulating layer made of ceramic laminated on the first insulating layer 3, and has a window hole 5 for storing the IC chip 1 in the center, and a hole in the window hole 5 for storing the IC chip 1. A conductor pattern 6 is formed using tungsten radially from the edge.

Tは前記第2絶縁層4上に積層するセラミック製の第3
絶縁層で、中央に前記導体パターン6の始端をワイヤボ
ンディング用として一部露呈し得るような大きさの窓穴
8を穿設すると共に、該窓穴8の周縁にシールリング9
を固定するためのメタライズ部を設ける。10はワイヤ
、11は外部接続用導体パターン、12はキャップであ
る。
T is a third ceramic layer laminated on the second insulating layer 4.
In the insulating layer, a window hole 8 of a size such that the starting end of the conductor pattern 6 can be partially exposed for wire bonding is formed in the center, and a seal ring 9 is provided around the periphery of the window hole 8.
A metallized part is provided for fixing. 10 is a wire, 11 is a conductor pattern for external connection, and 12 is a cap.

次に、前記構成の作用を説明すると、第1図に示す如く
第1絶縁層2、第2絶縁層4及び第3絶縁層Iを一体に
積層し、その四側壁面から底面部にかけて前記第2絶縁
層4の導体パターン6の終端と接続する外部接続用導体
パターン11を設けた後、一括焼結してICパッケージ
を構成する。
Next, to explain the operation of the above structure, as shown in FIG. After providing an external connection conductor pattern 11 that connects to the terminal end of the conductor pattern 6 of the second insulating layer 4, the IC package is constructed by collectively sintering.

そして、ダイアタッチ部3にICチップ1をダイボンデ
ィングによシ搭載固定した後に、該ICチップ1をIC
チップ1の電極と前記導体パターン6の始端部に設けた
ワイヤボンディング用のパッドとをワイヤ10によ多接
続し、更に前記第3絶縁層7の窓穴8の周縁に設けたメ
タライズ部にコバールのシールリング9をろう付けによ
シ固定し、該シーリング9の上縁にキャップ12を覆蓋
してICチップ1を気密封止する。
After mounting and fixing the IC chip 1 on the die attach section 3 by die bonding, the IC chip 1 is
The electrodes of the chip 1 and the pads for wire bonding provided at the starting end of the conductor pattern 6 are connected to the wire 10, and the metallized portion provided around the window hole 8 of the third insulating layer 7 is coated with Kovar. A seal ring 9 is fixed by brazing, and a cap 12 is placed over the upper edge of the seal ring 9 to hermetically seal the IC chip 1.

このようにICチップ1を収納したICパッケージを電
子回路基板上に実装して論理動作を行うと、ICチップ
1から発生した熱は、主にダイアタッチ部3を介し第1
絶縁層2、第2絶縁層4及び第3絶縁層7に伝導してr
cパッケージ表面よシ放熱する。
When the IC package housing the IC chip 1 is mounted on an electronic circuit board and performs a logical operation, the heat generated from the IC chip 1 is mainly transferred to the first
Conducted to the insulating layer 2, the second insulating layer 4 and the third insulating layer 7
C. Heat is dissipated from the package surface.

しかしながら、このような従来のICパッケージは、I
Cパッケージ表面よシ放熱する場合、或いはICパッケ
ージ表面に放熱フィンを付けて放熱する場合においても
、ICパッケージの母材であるセラミックの熱伝導率が
金属材料例えばタングステンと比べて見てもその釣元と
小さいため、ICチップの熱をICパッケージ表面に伝
達するにも限度がある。即ちICパッケージ自体での放
熱による冷却能力にも限界があると言う欠点がある。
However, such conventional IC packages
Even when heat is dissipated from the surface of the C package or when heat dissipation fins are attached to the surface of the IC package, the thermal conductivity of ceramic, which is the base material of the IC package, is comparable to that of metal materials such as tungsten. Since it is small to begin with, there is a limit to how much heat from the IC chip can be transferred to the surface of the IC package. That is, there is a drawback in that there is a limit to the cooling capacity of the IC package itself due to its heat dissipation.

〔発明の目的〕[Purpose of the invention]

本発明は、前記欠点を解決するためになされたものであ
シ、その目的は、ダイアタッチ部とIC’パッケージ表
面とを接続する低熱抵抗の放熱スルーホールを設けるこ
とにより放熱効率をあげることにある。
The present invention has been made to solve the above-mentioned drawbacks, and its purpose is to improve heat dissipation efficiency by providing a heat dissipation through hole with low thermal resistance that connects the die attach section and the surface of the IC' package. be.

〔発明の概要〕[Summary of the invention]

前記した目的を達成するため、本発明は、第1絶縁層に
第2絶縁層の収納用窓穴よシ広いダイアタッチ部を形成
し、該ダイアタッチ部と接続する低熱抵抗の放熱スルー
ホールを第2絶縁層に設け、該第2絶縁層の放熱スルー
ホールと接続する低熱抵抗の放熱スルーホールを第3絶
縁層に設けることを特徴とする。
In order to achieve the above-mentioned object, the present invention forms a die attach part wider than the storage window hole of the second insulating layer in the first insulating layer, and a heat dissipation through hole with low thermal resistance connected to the die attach part. The third insulating layer is characterized in that a heat dissipating through hole with low thermal resistance is provided in the second insulating layer and connected to a heat dissipating through hole in the second insulating layer.

〔実施例〕〔Example〕

bJ下、本発明の一実施例を旭2図に基づいて説明する
An embodiment of the present invention will be described below based on Fig. 2 of the Asahi diagram.

第2図は本実施例の断面図であり、13はセラミック製
の第1絶縁層で、中央面にダイアタッチ部14をタング
ステンを用いてパターン形成する。
FIG. 2 is a cross-sectional view of this embodiment. Reference numeral 13 denotes a first insulating layer made of ceramic, and a die attach portion 14 is patterned on the center surface using tungsten.

15は前記第1絶縁層13上に積層するセラミック製の
第2絶縁層で、プレス加工により中央にICチップ16
の収納用窓穴17を穿設すると共にダイアタッチ部14
と接続する放熱スルーホール19を両側に穿設し、該放
熱スルーホール19を熱伝導のよい素材例えばタングス
テンを用いて印刷によシ穴うめすると共に上面に放射状
に導体パターン20をも形成する。
15 is a second insulating layer made of ceramic that is laminated on the first insulating layer 13, and an IC chip 16 is placed in the center by press working.
A storage window hole 17 is bored and the die attach part 14 is opened.
Heat dissipation through holes 19 are formed on both sides to connect with the heat dissipation through holes 19, and the heat dissipation through holes 19 are filled with a material having good thermal conductivity, such as tungsten, by printing, and conductive patterns 20 are also formed radially on the upper surface.

21は前記第2絶縁層15上に積層するセラミック製の
第3絶縁層で、プレス加工によシ中夫に前記導体パター
ン20の始端をワイヤボンディング用として一部露呈し
得る大きさに窓穴22を穿設すると共に、両側に前記放
熱スルーホール19と接続する放熱スルーホール23を
穿設し、該放熱スルーホール23を熱伝導のよい素材例
えばタングステンを用いて印刷によシ穴うめすると共に
前記窓穴220周縁にシールリング24を固定するため
のメタライズ部を印刷して設ける。25はワイヤ、26
は外部接続用導体パターン、27はキャップである。
Reference numeral 21 denotes a third insulating layer made of ceramic to be laminated on the second insulating layer 15, and a window hole is formed in the third insulating layer by press processing to a size that allows part of the starting end of the conductive pattern 20 to be exposed for wire bonding. At the same time, a heat dissipation through hole 23 is bored on both sides to connect with the heat dissipation through hole 19, and the heat dissipation through hole 23 is filled with a material having good thermal conductivity, such as tungsten, by printing. A metallized portion for fixing the seal ring 24 is printed on the periphery of the window hole 220. 25 is a wire, 26
2 is a conductor pattern for external connection, and 27 is a cap.

尚、前記ダイアタッチ部14の広さはシールリング24
より広くしてあり、また前記第2絶縁層15の放熱スル
ーホール19は導体ハターン20と電気的に接続してい
ない。更に本実施例では放熱スルーポール19.23を
そ九ぞれ接続して2個設ける構成としたが、この数に限
るものではない。
Note that the width of the die attach portion 14 is the same as that of the seal ring 24.
The heat radiation through hole 19 of the second insulating layer 15 is not electrically connected to the conductor pattern 20. Furthermore, in this embodiment, two heat dissipating through poles 19 and 23 are connected, but the number is not limited to this.

次に、前記構成の作用を説明すると、第2図に示す如く
第1絶縁層13、第2絶縁層15及び第3絶縁層21を
一体に積層し、その四側壁面から底面部にかけて前記第
2絶縁層15の導体パターン20の終端と接続する外部
接続用導体パターン26を設けた後、一括焼結してIC
パッケージを構成する。
Next, to explain the operation of the above structure, as shown in FIG. After providing a conductor pattern 26 for external connection to be connected to the end of the conductor pattern 20 of the second insulating layer 15, the IC is sintered all at once.
Configure the package.

そして、ダイアタッチ部14にICチップ16をダイボ
ンディングによシ搭載固定した後に、該ICチップ16
の電極と前記導体パターン20の始端部に設けたワイヤ
ボンディング用パッドとをワイヤ25により接続し、更
に前記第3絶縁層21の窓穴22の周縁に設けたメタラ
イズ部にコバールのシール1ノング24をろう付けによ
シ固定し、該シールリング24の上縁にキャップ21を
覆蓋してICチップ16を気密封止する。
After the IC chip 16 is mounted and fixed on the die attach portion 14 by die bonding, the IC chip 16 is
The electrode and the wire bonding pad provided at the starting end of the conductive pattern 20 are connected by a wire 25, and a Kovar seal 1 non-stick 24 is attached to the metallized portion provided around the window hole 22 of the third insulating layer 21. are fixed by brazing, and a cap 21 is placed over the upper edge of the seal ring 24 to hermetically seal the IC chip 16.

このようにICチップ16を収納したICパッケージを
電子回路基板上に実装して論理動作を行うと、ICチッ
プ16から発熱した熱は、放熱スルーホール19.23
を介してダイアチップ部14からICパッケージ表面ま
での低熱抵抗の熱伝導径路を通ってICパッケージ表面
から放熱すると共に、ダイアタッチ部14を介して第1
絶縁層13、第2絶縁層15及び第3絶縁層21に伝導
してICパッケージ表面よシ放熱する。
When the IC package containing the IC chip 16 is mounted on an electronic circuit board and performs a logical operation, the heat generated from the IC chip 16 is dissipated through the heat dissipation through holes 19 and 23.
The heat is radiated from the IC package surface through a low thermal resistance heat conduction path from the die chip section 14 to the IC package surface through the die attach section 14.
The heat is conducted to the insulating layer 13, the second insulating layer 15, and the third insulating layer 21, and is radiated from the surface of the IC package.

尚、更に放熱効率ケあげたい場合は、第3図の他の実施
例に示す如く前記キャップ21を熱伝導のよい金属等か
ら形成したキャップ28にして、そのシールリング29
に第2絶縁層30及び第3絶縁層31の放熱スルーホー
ル32.33を接続することによシ、該放熱スルーホー
ル32−,33を介してダイアタッチ部34からキャッ
プ28までの低熱抵抗の熱伝導径路を形成し、このキャ
ップ28を放熱フィンとして代用することによシ放熱効
率をあげてもよい。
If it is desired to further increase the heat dissipation efficiency, as shown in another embodiment shown in FIG.
By connecting the heat dissipation through holes 32 and 33 of the second insulating layer 30 and the third insulating layer 31 to The heat dissipation efficiency may be increased by forming a heat conduction path and using the cap 28 as a heat dissipation fin.

寸だ、放熱用スルーホール19.32を導体パターン2
0.35の一部と接続してダイアタッチ部14.34の
最低電位化をはかつてもよい。
The heat dissipation through hole 19.32 is connected to the conductor pattern 2.
0.35 to lower the potential of the die attach portion 14.34 to the lowest potential.

〔発明の効果〕〔Effect of the invention〕

前記した如く、本発明に係る高放熱icパッケージによ
れば、第1絶縁層に第2絶縁層の収納用窓穴よシ広いダ
イアタッチ部を形成し、該ダイアタッチ部と接続する低
熱抵抗の放熱スルーホールを第2絶縁層に設け、該第2
絶縁層の放熱スルーホールと接続する低熱抵抗の放熱ス
ルーホールを第3絶縁層に設けることにより、ICチッ
プからの熱をダイアタッチ部を介して前記放熱スルーホ
ールにより放熱するため、従来のようにセラミック製の
筑1絶禄層、笛2絶a層乃rト笛’E、 &/I鐸l絡
か介して放熱するよりも放熱効率がちがp、ICチップ
の高集積化を容易にすることができ、また放熱スルーホ
ールとシールリングを接続してキャンプを放熱フィンの
代用とすることができるため、より一層放熱効果をあげ
てICチップの高集積化を可能にすることができる効果
がある。
As described above, according to the high heat dissipation IC package according to the present invention, a die attach portion wider than the storage window hole of the second insulating layer is formed in the first insulating layer, and a low thermal resistance A heat dissipation through hole is provided in the second insulating layer, and the second
By providing a heat dissipation through hole with low thermal resistance in the third insulating layer that connects with the heat dissipation through hole in the insulating layer, the heat from the IC chip is radiated through the heat dissipation through hole through the die attach part, so that it is not possible to dissipate heat from the IC chip as in the conventional method. Ceramic Chiku1 Zetsuroku Layer, Fue 2 Zetsuroku Layer, &/I Takul Layer Heat dissipation efficiency is higher than heat dissipation through the ceramic wire, which facilitates high integration of IC chips. In addition, by connecting the heat dissipation through hole and the seal ring, the camp can be used as a substitute for the heat dissipation fin, which has the effect of further increasing the heat dissipation effect and enabling higher integration of IC chips. be.

また、放熱スルーホールを設けたことによシ、該放熱−
スルーホールと導体パターンとを接続して容易にダイア
タッチ部の最低電位化を可能にすることができる効果が
ある。
In addition, by providing a heat dissipation through hole, the heat dissipation
This has the effect of easily lowering the potential of the die attach portion to the lowest potential by connecting the through hole and the conductor pattern.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来例の断面図、第2図は本発明の一実施例を
示す断面図、第3図は他の実施例を示す断面図である。 13・・・第1絶縁層 14・・・ダイアタッチ部 1
5゜30・・・第2絶縁層 16・・・ICチップ 1
7・・・収納用窓穴 19,23,32,33・・・放
熱スルーホール 21.31・・・第3絶縁層 22・
・・窓穴特許用 願人 沖電気工業株式会社 代理人 弁理士 金 倉 喬 二
FIG. 1 is a sectional view of a conventional example, FIG. 2 is a sectional view showing one embodiment of the present invention, and FIG. 3 is a sectional view showing another embodiment. 13... First insulating layer 14... Die attach part 1
5゜30...Second insulating layer 16...IC chip 1
7... Storage window hole 19, 23, 32, 33... Heat radiation through hole 21. 31... Third insulating layer 22.
...For window hole patent applicant: Oki Electric Industry Co., Ltd. agent Patent attorney: Takashi Kanakura

Claims (1)

【特許請求の範囲】 1、ダイアタッチ部を形成した第1絶縁層、ICチップ
の収納用窓穴を穿設した第2絶縁層及び窓穴を穿設した
第3絶縁層を積層し、前記第1絶縁層のダイアタッチ部
にICチップを搭載したICパッケージにおいて、第1
絶縁層に第2絶縁層の収納用窓穴より広いダイアタッチ
部を形成し、該ダイアタッチ部と接続する低熱抵抗の放
熱スルホールを第2絶縁層に設け、該第2絶縁層の放熱
スルホールと接続する低熱抵抗の放熱スルーホールを第
3絶縁層に設けることによシ、ICチップからの熱をダ
イアタッチ部を介して前記放熱スルーホールによシ放熱
することを特徴とする高放熱ICパッケージ。 2、特許請求の範囲第1項において、前記各放熱スルー
ホールを熱伝導のよい素材によシ穴うめ寸ふと左を特徴
2する高放熱ICパッケージ。
[Scope of Claims] 1. A first insulating layer in which a die attach portion is formed, a second insulating layer in which a window hole for accommodating an IC chip is formed, and a third insulating layer in which a window hole is formed are laminated; In an IC package in which an IC chip is mounted on a die attach portion of a first insulating layer, the first
A die attach portion wider than the storage window hole of the second insulating layer is formed in the insulating layer, a heat dissipation through hole with low thermal resistance is provided in the second insulating layer to connect with the die attach portion, and the heat dissipation through hole of the second insulating layer is connected to the die attach portion. A high heat dissipation IC package characterized in that by providing a heat dissipation through hole with low thermal resistance to be connected in the third insulating layer, heat from the IC chip is dissipated through the heat dissipation through hole through the die attach part. . 2. The high heat dissipation IC package according to claim 1, wherein each of the heat dissipation through-holes is made of a material with good heat conductivity and has a hole filler dimension on the left.
JP5612684A 1984-03-26 1984-03-26 High heat dissipation ic package Pending JPS60200549A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5612684A JPS60200549A (en) 1984-03-26 1984-03-26 High heat dissipation ic package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5612684A JPS60200549A (en) 1984-03-26 1984-03-26 High heat dissipation ic package

Publications (1)

Publication Number Publication Date
JPS60200549A true JPS60200549A (en) 1985-10-11

Family

ID=13018375

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5612684A Pending JPS60200549A (en) 1984-03-26 1984-03-26 High heat dissipation ic package

Country Status (1)

Country Link
JP (1) JPS60200549A (en)

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