JPS6019872B2 - Defect inspection device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an apparatus that photoelectrically scans the surface of a sheet or the like to be inspected for defects.

For example, as shown in FIG. 1, a sheet-shaped object to be inspected 3 such as paper or film is arranged between a light source 1 and a suitable imaging device 2,
When scanning the inspection object 3 using a transmission method and detecting defects from the video signal output from the imaging device 2, defects such as black dirt attached to the inspection object 3 (floor defects) are detected as shown in Fig. 1. As shown in the figure, defects such as pinholes (bright defects) appear in the video signal as a signal n, which is lower than the ground signal level. Appears as a high-level signal mountain.

Depending on the need for quality control, etc., it is desirable to correctly distinguish and detect the above-mentioned grade defects and bright defects.
In this case, the following circuit has conventionally been used to process the problem.
In other words, as shown in FIG. 1, the video signal is integrated (envelope detection) using an integrating circuit 4a having an appropriate charging/discharging time constant.
By doing so, a signal is obtained that follows low frequency fluctuations in the ground signal level and has a slow response to the ground fault signal, and furthermore, an appropriate DC voltage is added to this signal in the adder circuit 5a. By doing this, a threshold signal SH, which is appropriately lower than the ground signal level as shown by the dotted line in FIG.
When the waveform is shaped by the waveform shaping circuit 7a, a floor defect detection signal as shown in FIG. Similarly, the integrating circuit 4b and the adding circuit 5b obtain a value signal SH2 which is appropriately higher than the ground signal level as shown in the figure, and the comparator 6b converts the video signal to the value SQ. When the signal is binarized and shaped by the waveform shaping circuit 7b, a bright spot detection signal as shown in the figures is obtained. By the way, in the above configuration, when an excessive bright defect signal peak appears, for example as shown in FIG. When n2 falls, the fall response of the integrating circuit 4a is slow, so
A situation may occur where the video signal level becomes too high and becomes less than the value SH.

Then, as shown in Figure 2, b3, the comparator 6b
The correct bright defect detection signal is output from the comparator 6, but the comparator 6
An unnecessary and erroneous detection signal will be output from a. Such a phenomenon also occurs when the bright defect discrimination threshold signal SH2 responds too much to the excessive fall of the 8-tone defect signal. As a result, there has been an inconvenience in that bright defects and bright defects cannot be correctly distinguished and counted. This invention was made in order to solve the above-mentioned problem, and its purpose is to detect excessively bright or fine defects in a defect inspection device capable of detecting both bright defects and graded defects. Based on this, it is possible to prevent erroneous signals from being output to the greasy defect side in the case of a bright defect, and to the bright defect side in the case of a floor defect.

Hereinafter, embodiments of the present invention will be described in detail based on the drawings. In FIG. 2, an imaging device 2, integrating circuits 4a and 4b
, adder circuits 5a, 5b, comparators 6a, 6b, and waveform shaping circuits 7a, 7b are the same as described above.

In the apparatus of the present invention, hold circuits 8a and 8b are provided on the output side of each of the integration circuits 4a and 4b to receive a predetermined control signal and hold the integrated output. These hold circuits 8a, 8b are not operating, and the integrating circuits 4a,
The state in which the output of circuit 4b is directly input to adder circuits 5a and 5b is the same as the circuit shown in Figure 1. In addition,
Recently, a self-scanning collective image sensor such as a CCD has been used as the imaging device 2, but in this case, the video signal is obtained in the form of a pulse signal having the same frequency as the scanning clock. The beginning portions of the video signal waveforms in FIGS. 1 and 3 represent high-frequency pulse signals. The waveform shaping circuit 7a outputs a clear point detection signal shaped into a square wave, and the detection signal is supplied via the OR circuit 9 to the hold circuit 8a as a control signal.

In this configuration, when a floor defect signal n appears in the video signal as shown in FIG. The output of 7a becomes "H", and upon receiving this "H" signal, the hold circuit 8a functions, and the current integration circuit 4a is activated.
maintains the output voltage. Therefore, the threshold value SH, is also held at the level from time t2, and at time t2 when the video signal level becomes greater than that value, the output of the waveform shaping circuit 7a returns to "L", and the hold circuit 8a holds The operation is also canceled. In this way, if the threshold value SH for greasy defect discrimination is held based on the greasy defect detection signal, the level SH will not drop unnecessarily due to the level defect signal n, so that the level of the Nichion defect signal n. A detection signal with a relatively large width corresponding to the width of is obtained. Further, the waveform shaping circuit 7b outputs a bright defect detection signal shaped into a square wave.
The detection signal is supplied to the hold circuit 8b as a control signal.

This configuration also has the same purpose as above, and as shown in FIG. It is held at the value at the detection time t3. Furthermore, the waveform shaping circuit 7b
The bright defect detection signal outputted from
It also serves as a control signal. This timer circuit 10 is of an off-delay type, and as shown in FIG. When the output of the waveform shaping circuit 7b falls to "L", the output of the timer circuit 10 becomes "L" after a preset delay time To from time t4. The output of this timer circuit 10 is supplied to a hold circuit 8a, and the threshold value $day for floor defect discrimination is held. That is, when the bright defect signal Q is discriminated by the comparator 6b and the waveform shaping circuit 7b outputs a detection signal, the threshold value for discriminating the grade defect is held at the value at time t3. The threshold value SH is not affected by the bright defect signal ratio and does not increase in level unnecessarily. By the way, the width of the bright defect detection signal is naturally smaller than the width of the bright defect signal in the video signal, and especially the higher the threshold S ratio is set,
The width of the detection signal becomes narrower.

Therefore, if the hold on the threshold value SH, is released at the same time as the bright defect detection signal disappears (falls), the threshold value SH, will rise in level from that point on, and the bright defect signal will rise. When the voltage falls, there is a risk that the comparator 6a will make an erroneous discrimination. In this regard, in the apparatus of the present invention, even after the bright defect detection signal disappears, the hold state of To continues to be at the threshold value SH for a certain period of time set by the timer circuit 10, so that the threshold value SH, There is no increase in the level, and the above-mentioned conspiracy discrimination does not occur. In addition, in this embodiment, a system was shown in which the threshold for 8-note defect discrimination was held in response to the bright defect detection signal, and the value $day was held; A circuit for holding the value SH2 can also be provided in the same manner as described above, if necessary.

Further, FIG. 4 shows a specific circuit example of the integrating circuit 4a and the hold circuit 8a in the above embodiment.

In the same figure, the video signal is transmitted through diode D and MOS-
A capacitor C is charged through an analog switch S consisting of a FET, and discharged through an analog switch S and a low resistor R. The charging voltage of the capacitor C is then supplied to the adder circuit 5a via the voltage follower circuit A. When the analog switch S is open, this circuit operates as an integrating circuit that detects the envelope of the video signal, and when the analog switch S is closed by the above-mentioned control signal, the charging and discharging path of the capacitor C is cut off. Therefore, the voltage at that time is held in capacitor C. In other words, a hold circuit is built into the integrating circuit. Of course, the present invention is not limited to this, and it is also possible to provide a hold circuit on the output side of the adder circuit, for example. As explained in detail above, according to the present invention, a dark defect signal is erroneously output due to the detection of an excessively bright defect, or a dark defect signal is erroneously output due to the output of an excessively high-level defect signal. This makes it possible to prevent malfunctions such as erroneously outputting a bright defect signal, and to accurately bring the detection pulse width corresponding to bright defects and bet defects closer to the width of the actual bright defect or 8-tone defect. , it is possible to improve detection accuracy.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a conventional device and a waveform diagram of its main parts, FIG. 2 is a block diagram showing an embodiment of the device of the present invention,
FIG. 3 is a waveform diagram of the main part thereof, and FIG. 4 is a specific circuit example of an integrating circuit and a hold circuit. 2... Imaging device, 4a, 4b... Integrating circuit, 5a, 5b... Adding circuit, 6a, 6b...
・Comparator, 7a, 7b... Waveform shaping circuit, 8a
, 8b... hold circuit, 10... timer circuit. Figure 4 Figure 1 Figure 2 Figure 3

Claims (1)

[Claims] 1. An imaging device that photoelectrically scans a surface to be inspected and outputs a video signal; and first and second integrating circuits that are arranged in parallel on the output side of the imaging device and that perform envelope detection of the video signal, respectively. and; first and second sample-and-hold circuits that are respectively provided on the output sides of the first and second integration circuits and perform sample-and-hold operations according to the logic state of a predetermined binary control signal; 1. A first threshold signal that is provided on the output side of the second sample and hold circuit and that is lower than the ground level of the video signal by adding an appropriate DC voltage to the output of each sample and hold circuit. , first and second adder circuits each outputting a second threshold signal higher than the ground level of the video signal;
first and second comparison circuits that are respectively provided on the output sides of the first and second adder circuits and compare the video signal with the first and second threshold signals to binarize it, respectively; and;
first and second waveform shaping, which are respectively provided on the output side of the first and second comparison circuits, and which shape the output of each comparison circuit into a rectangular wave and output it as a bright spot pulse and a dark spot pulse, respectively; an off-delay timer having a constant delay time from the rear edge of the bright defect pulse; A defect inspection apparatus characterized in that the second sample and hold circuit is sample and hold controlled by the dark defect pulse and the second sample and hold circuit is sampled and held by the off-delay timer.