JPS60192024U - Power supply for microprocessor - Google Patents
Power supply for microprocessorInfo
- Publication number
- JPS60192024U JPS60192024U JP7737784U JP7737784U JPS60192024U JP S60192024 U JPS60192024 U JP S60192024U JP 7737784 U JP7737784 U JP 7737784U JP 7737784 U JP7737784 U JP 7737784U JP S60192024 U JPS60192024 U JP S60192024U
- Authority
- JP
- Japan
- Prior art keywords
- power supply
- input terminal
- level
- cpu
- reset terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は本考案の実施例の具体回路図、第２図 −は同
上の停電時−における供給電圧の状態を示す図である。
１はＣＰＵ、 ２はイモリバックアップ用コンデンサ、
３は電源回路、Ｖｃｃは電源入力端子、ＶＤＤはコント
ロール入力端子、！はリセット端子を示す。
補正 昭５９．９．１７
実用新案登録請求の範囲を次のように補正する。
Ｏ実用新案登録請求の範囲 −
電源入力端子と、Ｌレベ−ルとすることで内部を初期化
するリセット端子と、Ｌレベルにすると内部のオシレー
タが停止してリセット端子が内部でグラフラインにプル
ダウンされ、Ｈレベルにするとオシレータが動作してリ
セット端子が内部で電源電圧にプルアップされるコント
ロール入力端子とを有するＣＰＵと、ＣＰＵの電源入力
端子に接続−されＣＰＵ内のメモリバックアップ用のコ
ンデンサとを具備し、ＣＰＵへの電源が遮断され供給電
圧が低下していく過程において前記コントロール入力端
子より先にリセット回路をＬレベルに設定するとともに
、電源が復帰して供給電圧が上昇する過程においてリセ
ット端子より先にコントロール入力端子をＨレベルにす
るリセット回路を形成して成るマイクロプロセッサ用電
源装置。
図面の簡単な説明を次のように補正する。
明細書第９頁第１行目のｒ３は電源回路、１を ｒ
″３はリセット回路、１と訂正する。FIG. 1 is a specific circuit diagram of an embodiment of the present invention, and FIG. 2 is a diagram showing the state of the supply voltage during a power outage. 1 is the CPU, 2 is the newt backup capacitor,
3 is a power supply circuit, Vcc is a power input terminal, VDD is a control input terminal, ! indicates a reset terminal. Amendment September 17, 1982 The scope of claims for utility model registration is amended as follows. Scope of Utility Model Registration Claim - Power supply input terminal, reset terminal that initializes the internals by setting it to L level, and when set to L level, the internal oscillator stops and the reset terminal is pulled down to the graph line internally. A CPU has a control input terminal that operates the oscillator and pulls up the reset terminal to the power supply voltage internally when set to H level, and a memory backup capacitor connected to the CPU's power supply input terminal. The reset circuit is set to the L level before the control input terminal when the power to the CPU is cut off and the supply voltage decreases, and the reset circuit is set to the L level when the power is restored and the supply voltage increases. A power supply device for a microprocessor comprising a reset circuit that sets a control input terminal to an H level before the terminal. The brief description of the drawing has been amended as follows. r3 on the first line of page 9 of the specification is a power supply circuit, and 1 is r
``3 is the reset circuit, correct it to 1.
Claims (1)
るリセット端子と、Ｌレベルにすると内部のオシレータ
が停止してリセット端子が内部もグランドラインにプル
ダウンされ、Ｈレベルにす、 るとオシレータが動
作してリセット端子が内部で電源電圧にプルアップされ
るコントロール入力端一 子とを有するＣＰＵと、
ＣＰＵの電源入力端子に接続されＣＰＵ内のメモリバッ
クアップ用のコンデンサとを具備し、ＣＰＵへの電源が
遮断され供給電圧が低下していく過程において前記コン
トロール入力端子より先にリセット端子をＬレベルに設
定するとともに、電源が復帰して併結電圧が上昇する過
程においてリセット端子より先にコントロール入力端子
をＨレベルにする電源回路を形成して成るマイクロプロ
セッサ用電源装置。There is a power input terminal, a reset terminal that initializes the internals when set to L level, and a reset terminal that stops the internal oscillator when set to L level, and the reset terminal is also pulled down to the ground line internally, and when set to H level, the oscillator a control input terminal whose reset terminal is internally pulled up to the power supply voltage when the CPU operates;
It is connected to the power input terminal of the CPU and is equipped with a memory backup capacitor in the CPU, and when the power to the CPU is cut off and the supply voltage is reduced, the reset terminal is brought to L level before the control input terminal. A power supply device for a microprocessor, comprising a power supply circuit that sets a control input terminal to an H level before a reset terminal in a process in which the power supply is restored and the coupled voltage increases.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7737784U JPS60192024U (en) | 1984-05-25 | 1984-05-25 | Power supply for microprocessor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7737784U JPS60192024U (en) | 1984-05-25 | 1984-05-25 | Power supply for microprocessor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60192024U true JPS60192024U (en) | 1985-12-20 |
| JPH0530192Y2 JPH0530192Y2 (en) | 1993-08-02 |
Family
ID=30620392
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7737784U Granted JPS60192024U (en) | 1984-05-25 | 1984-05-25 | Power supply for microprocessor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60192024U (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS55162127A (en) * | 1979-05-31 | 1980-12-17 | Yokogawa Hokushin Electric Corp | Actuating circuit of digital unit |
| JPS57118437A (en) * | 1981-01-16 | 1982-07-23 | Toshiba Corp | Analog-to-digital converter |
-
1984
- 1984-05-25 JP JP7737784U patent/JPS60192024U/en active Granted
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS55162127A (en) * | 1979-05-31 | 1980-12-17 | Yokogawa Hokushin Electric Corp | Actuating circuit of digital unit |
| JPS57118437A (en) * | 1981-01-16 | 1982-07-23 | Toshiba Corp | Analog-to-digital converter |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0530192Y2 (en) | 1993-08-02 |
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