JPS6018976A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS6018976A JPS6018976A JP58127279A JP12727983A JPS6018976A JP S6018976 A JPS6018976 A JP S6018976A JP 58127279 A JP58127279 A JP 58127279A JP 12727983 A JP12727983 A JP 12727983A JP S6018976 A JPS6018976 A JP S6018976A
- Authority
- JP
- Japan
- Prior art keywords
- light
- film
- wiring
- shielding
- poly
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 31
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 29
- 229920005591 polysilicon Polymers 0.000 claims description 25
- 239000000758 substrate Substances 0.000 abstract description 13
- 239000011347 resin Substances 0.000 abstract description 9
- 229920005989 resin Polymers 0.000 abstract description 9
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 8
- 238000004519 manufacturing process Methods 0.000 abstract description 5
- 238000000034 method Methods 0.000 abstract description 5
- 239000003990 capacitor Substances 0.000 abstract description 3
- 238000000059 patterning Methods 0.000 abstract description 2
- 229910052681 coesite Inorganic materials 0.000 abstract 2
- 229910052906 cristobalite Inorganic materials 0.000 abstract 2
- 239000000377 silicon dioxide Substances 0.000 abstract 2
- 235000012239 silicon dioxide Nutrition 0.000 abstract 2
- 229910052682 stishovite Inorganic materials 0.000 abstract 2
- 229910052905 tridymite Inorganic materials 0.000 abstract 2
- 230000003321 amplification Effects 0.000 abstract 1
- 238000003199 nucleic acid amplification method Methods 0.000 abstract 1
- 230000003287 optical effect Effects 0.000 description 15
- 230000008878 coupling Effects 0.000 description 12
- 238000010168 coupling process Methods 0.000 description 12
- 238000005859 coupling reaction Methods 0.000 description 12
- 230000000694 effects Effects 0.000 description 5
- 229910052751 metal Inorganic materials 0.000 description 5
- 239000002184 metal Substances 0.000 description 5
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 5
- 229910052814 silicon oxide Inorganic materials 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 238000011109 contamination Methods 0.000 description 2
- 238000011156 evaluation Methods 0.000 description 2
- 230000007257 malfunction Effects 0.000 description 2
- 238000007789 sealing Methods 0.000 description 2
- 238000002834 transmittance Methods 0.000 description 2
- BLBNEWYCYZMDEK-UHFFFAOYSA-N $l^{1}-indiganyloxyindium Chemical compound [In]O[In] BLBNEWYCYZMDEK-UHFFFAOYSA-N 0.000 description 1
- 101000676341 Bacillus subtilis (strain 168) 50S ribosomal protein L27 Proteins 0.000 description 1
- 101100396994 Drosophila melanogaster Inos gene Proteins 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000010292 electrical insulation Methods 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 230000035945 sensitivity Effects 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/12—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof structurally associated with, e.g. formed in or on a common substrate with, one or more electric light sources, e.g. electroluminescent light sources, and electrically or optically coupled thereto
- H01L31/16—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof structurally associated with, e.g. formed in or on a common substrate with, one or more electric light sources, e.g. electroluminescent light sources, and electrically or optically coupled thereto the semiconductor device sensitive to radiation being controlled by the light source or sources
- H01L31/167—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof structurally associated with, e.g. formed in or on a common substrate with, one or more electric light sources, e.g. electroluminescent light sources, and electrically or optically coupled thereto the semiconductor device sensitive to radiation being controlled by the light source or sources the light sources and the devices sensitive to radiation all being semiconductor devices characterised by at least one potential or surface barrier
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0216—Coatings
- H01L31/02161—Coatings for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/02162—Coatings for devices characterised by at least one potential jump barrier or surface barrier for filtering or shielding light, e.g. multicolour filters for photodetectors
- H01L31/02164—Coatings for devices characterised by at least one potential jump barrier or surface barrier for filtering or shielding light, e.g. multicolour filters for photodetectors for shielding light, e.g. light blocking layers, cold shields for infrared detectors
Abstract
Description
【発明の詳細な説明】
〔発明の技術分野〕
この発明は光結合アイソレータ等の １半導体装置に関
する。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a semiconductor device such as an optical coupling isolator.
光結合アイソレータ等の光結合素子は、入力電気信号を
発光素子により光信号に変換し、この光信号を出力側の
受光素子が電気信号に変換するもので、入力電気信号と
出力電気信号とは電気的に絶縁することを目的としたデ
パイヌである。第１図の断面図にはこの光結合アイソレ
ータの代表的な構造を示し、第２図にその等価回路の一
例をパッケージの平面図に重ねて示す。Optical coupling elements such as optical coupling isolators convert an input electrical signal into an optical signal using a light emitting element, and this optical signal is converted into an electrical signal by a light receiving element on the output side.What is the difference between an input electrical signal and an output electrical signal? It is a depaine intended for electrical insulation. The sectional view of FIG. 1 shows a typical structure of this optical coupling isolator, and FIG. 2 shows an example of its equivalent circuit superimposed on the plan view of the package.
図において、発光素子１１および喪光素子１２はリード
１３の素子基台部上にそれぞれ相対向するように配置さ
れ光透過性絶縁樹脂１４１および光不透過性絶縁樹脂１
４２により樹脂モールドされた構造をしている。In the figure, a light-emitting element 11 and a light-emitting element 12 are arranged on the element base of a lead 13 so as to face each other, and a light-transmitting insulating resin 141 and a light-opaque insulating resin 1
It has a resin molded structure with 42.
ところで、第１図から類椎できるように光結合アイソレ
ータは絶縁物を挾んで電極が設けられたコンデンサの形
をしておシ、入力端子および出力端子間に同相のノイズ
が回り込んで、データ信号の正確な色違が妨害されるこ
とがしばしばあった。By the way, as can be seen from Figure 1, the optical coupling isolator is in the form of a capacitor with electrodes sandwiched between the insulators, and in-phase noise gets around between the input and output terminals, causing data loss. Accurate color differences in the signals were often interfered with.
このため、従来は第２図に示すように光結合アイソレー
タの入出力端子間にノイズ吸収用のバイパスコンデンサ
Ｃを外付けすることによりノイズを低減させることがな
されていたが上記バイパスコンデンサを外付けする対策
は使用上煩雑である。For this reason, noise was conventionally reduced by externally connecting a bypass capacitor C for noise absorption between the input and output terminals of the optically coupled isolator, as shown in Figure 2. These measures are complicated to use.
このような対策の他に、受光素子１２の上面に出力側の
例えば接地電源に電気的接続したＳｎＯ或いはＩｎ２Ｏ
３等いわゆるＩＴＯ膜と呼はれる十分に透明であり、且
つ導電性の高いシールド膜を被着し、受光素子１２の周
囲から回り込むノイズを上記接地電源に落とすようにす
る場合もある。In addition to such countermeasures, a SnO or In2O film electrically connected to the output side, for example, a ground power source, is placed on the upper surface of the light receiving element 12.
In some cases, a sufficiently transparent and highly conductive shielding film called a so-called ITO film is deposited so that noise coming from around the light-receiving element 12 is dropped to the ground power source.
しかしながら、とのＩＴＯ膜を用いる方法は、ＳｎＯ＋
ＩｎＯ２が通常の半導体プロセスにおいてはシリコン
等への汚染源となる物質であり、その汚染を防止するた
め、ＳｎＯ２膜或いはＩ ｎＯｓ膜形成工程を他の工程
とは分離するように、専用の製造装置および専用の製造
ヌペースを用意する必要があって生産性の悪いものであ
った。However, the method using an ITO film with SnO+
InO2 is a substance that is a source of contamination to silicon, etc. in normal semiconductor processes, and in order to prevent this contamination, dedicated manufacturing equipment and equipment are used to separate the SnO2 film or InOs film formation process from other processes. It was necessary to prepare a dedicated manufacturing unit, which resulted in poor productivity.
この発明は上記のような点に鑑みなされたもので、使用
上の煩雑さを招くことなく、周囲からのノイズを効果的
に除去でき、製造も容易に行うことのできる半＝ｑ、
（４ｉｐ； ｊｌ−＋を提供することを目的とする。This invention was made in view of the above points, and it is possible to effectively remove noise from the surroundings without causing any complications in use, and is easy to manufacture.
(4ip; aims to provide jl-+.
すなわちこの発明に係る半導体装置では、所定の受光機
能を有するＰＮ接合部を有する半導体部を形成し、更に
この半導体部が所定の機能を果たすように半導体部上に
上部膜として例えばシリコン酸化膜等の第１絶縁膜、ポ
リシリコン配線層および第２絶縁膜を形成し、この上部
膜土に所定電位に設定されたシールド用ポリシリコン膜
を被着する。そして、さらにこのような半導体上に？ン
デイングパッド部等を含む金屑配線層を形成したもので
ある。尚、ここで上記シールド用ポリシリコンルＡＫは
、例えば半導体部に形成された接地側位源等の基準電位
源領域から、例えば上記ｉ５ リシリコン配線層或いは
金属配線部を介して所定電位を与えるようにしてもよい
し、コンタクトホールを介し直接基準電位源領域と接続
してもよく、寸だ、装置に所定電位源と接続する外部端
子を設け、この外部端子から所定電位を与えるようにし
てもよい。That is, in the semiconductor device according to the present invention, a semiconductor portion having a PN junction having a predetermined light receiving function is formed, and an upper film such as a silicon oxide film is formed on the semiconductor portion so that the semiconductor portion performs a predetermined function. A first insulating film, a polysilicon interconnection layer, and a second insulating film are formed, and a shielding polysilicon film set to a predetermined potential is deposited on the upper layer. And even on such a semiconductor? A metal scrap wiring layer including a bonding pad portion and the like is formed. Here, the shielding polysilicon layer AK is configured to apply a predetermined potential from a reference potential source region such as a ground source formed in the semiconductor section, for example, through the i5 silicon wiring layer or the metal wiring section. It may be directly connected to the reference potential source area through a contact hole, or it may be possible to provide the device with an external terminal connected to a predetermined potential source and apply a predetermined potential from this external terminal. good.
以下図面を参照してこの発明の一実施例につき説明する
。第３図において、半導体基板２１に不純物を選択拡散
し、受光領域２２および図示しない充電流増幅用トラン
ジヌタの各領域を形成する。次いで、この半導体基板２
ノ土にシリコン酸化膜等の第１の絶縁膜２３を形成し基
板２ノとの接続部に開口部を形成した後、半導体部分が
所定の回路機能を果たすように上記基板２ノ土に第１の
ポリシリコン膜を被着しパターニングして、半導体基板
２１の所定の領域とオーミック接触したポリシリコン配
線層２４を形成する。An embodiment of the present invention will be described below with reference to the drawings. In FIG. 3, impurities are selectively diffused into a semiconductor substrate 21 to form a light receiving region 22 and each region of a charging current amplifying transistor (not shown). Next, this semiconductor substrate 2
After forming a first insulating film 23 such as a silicon oxide film on the substrate 2 and forming an opening at the connection portion with the substrate 2, a first insulating film 23 such as a silicon oxide film is formed on the substrate 2 so that the semiconductor portion performs a predetermined circuit function. A polysilicon film 24 is deposited and patterned to form a polysilicon wiring layer 24 in ohmic contact with a predetermined region of the semiconductor substrate 21.
次に、・この基板２ノ上に例えばシリコン酸化膜からな
る第２の絶縁膜２５を被着しコンタクトホールを開口す
る。Next, a second insulating film 25 made of, for example, a silicon oxide film is deposited on the substrate 2, and a contact hole is opened.
その後、この半導体基板２１土にりんＰをドー７０した
膜厚が例えば３０００ Ｘ、シート抵抗がｆ’ｌｌえば
２０ ｒＶＤの第２のポリシリコン膜２６を形成し、適
宜ポンディングパッド形成予定領賊上の第２のポリシリ
コン膜２６をパターニングにより除去する。Thereafter, a second polysilicon film 26 is formed by doping phosphorus P on the semiconductor substrate 21 and has a film thickness of, for example, 3000× and a sheet resistance of 20 rVD. The upper second polysilicon film 26 is removed by patterning.
ここで、この第２のポリシリコン膜２６は、シールド用
のポリシリコン膜となるもので、第２（ンＩの等価回路
で示せは出力１１１！素子（受光側素子）の最低基準電
位源（通常Ｖ」接地電位源）の端子７．９ＧＫ接続する
ポリシリコン配イψ層２４とコンタクトホール２５ｈを
介して接続させる。Here, this second polysilicon film 26 is a polysilicon film for shielding, and as shown in the equivalent circuit of the second polysilicon film 26, the lowest reference potential source ( It is connected via a contact hole 25h to the polysilicon wiring ψ layer 24 connected to the terminal 7.9GK of the terminal 7.9 (normally V' ground potential source).
次いで、この基板１１土にアルミニウム等の金属膜２７
を被着しパターニングすることによす、ホンディングパ
ッド部および下層の、Ｉ？リシリコン配線層２４に接続
する金属配線部および遮光用のマスク等を形成して基本
的な受光素子を完成する。尚、上記第１および第２の絶
縁膜やポリシリコン配線層等は、半導体基板（半導休部
）２１が所定の機能を有するように形成すればよいもの
で、適宜その檜成を変更してよい。Next, a metal film 27 such as aluminum is formed on the substrate 11.
The I? of the honding pad part and the lower layer is deposited and patterned. A basic light-receiving element is completed by forming a metal wiring portion connected to the silicon wiring layer 24, a light-shielding mask, and the like. Note that the first and second insulating films, polysilicon wiring layers, etc. may be formed so that the semiconductor substrate (semiconductor idle portion) 21 has a predetermined function, and their compositions may be changed as appropriate. good.
次いで、１対のリードフレームの一力ＫＩＪＤ等の発光
素子を、他方に上記のようにして力く成した受光素子を
それぞれマウントし、これらの素子が一定間隔離間した
状態で相対向するように固定し、光透過性絶縁樹脂で一
次封止して光路を形成し、さらにその周囲を光不透過性
ｆゼ１．縁樹脂で二次封止し、適宜仕上けを行って製品
が完成する。尚、勿論外囲器は、このような４−’Ｊ脂
モールド型のもの以外に例えばキャンシール城のもの等
を用いてよい。Next, a light-emitting element such as KIJD is mounted on a pair of lead frames, and a light-receiving element formed as described above is mounted on the other, so that these elements face each other with a certain distance between them. A light path is formed by first sealing with a light-transparent insulating resin, and the surrounding area is further surrounded by a light-impermeable resin. The product is completed by secondary sealing with edge resin and finishing as appropriate. It should be noted that, of course, other than the 4-'J resin mold type envelope, for example, one manufactured by Canseal Castle may be used as the envelope.
次に上記のようにして形成した光アイソレータと、従来
のものとのシールド効果について述べる。Next, the shielding effect of the optical isolator formed as described above and the conventional one will be described.
シールド効果評価試験回路を示す第４μＩにおいて、３
０は光結合アイソレータで、シールド膜３１を有さない
ものの、受光佃の素子の接地端子Ｇに接続された膜厚３
００人、シート抵抗５０Ω／口のＳ ｎｏ ２膜からな
るシールド膜３ノを備えたもの■、本発明による膜厚３
０００Ｘ、シート抵抗２０Ω／口のポリシリコン層から
なるシールド膜３ノを（、Ｍえたもの■の３種について
次の評価状、験を行った。In the 4th μI showing the shielding effect evaluation test circuit, 3
0 is an optical coupling isolator which does not have a shield film 31 but has a film thickness of 3 connected to the ground terminal G of the light receiving element.
00 people, sheet resistance 50 Ω/mouth equipped with a shield film 3 consisting of S no 2 films ■, film thickness 3 according to the present invention
The following evaluations and tests were conducted on three types of shield films made of polysilicon layers with a sheet resistance of 0.000X and a sheet resistance of 20 Ω/hole.
まず、出力側のフォトダイオードのカソードとなる電源
端子Ｖｃｃに正電源を接続し第５図の波形図に示すよう
にＬＥＤ ３２側の入力アノードＡおよびカソードに間
に入力電流ＩＩＮを流し、フォトトランジスタ３３をオ
ン状態に設定する。First, a positive power supply is connected to the power supply terminal Vcc, which becomes the cathode of the photodiode on the output side, and an input current IIN is passed between the input anode A and the cathode on the LED 32 side as shown in the waveform diagram in FIG. 33 is set to the on state.
このとき、フォトトランジスタ３３のコレクタ端子ｖＯ
から接地端子Ｇへは出力電流ｌ０ＵＴが流れコレクタ端
電圧Ｖｏは下がった状態となる。At this time, the collector terminal vO of the phototransistor 33
An output current 10UT flows from the terminal G to the ground terminal G, and the collector terminal voltage Vo becomes lowered.
この状態を保ちながら、カソードにと接地端子０間にあ
る電圧勾配（電圧／時間）を有する電圧ｖＮを印加する
。ここで、この電圧ｖＮの電圧勾配を大きくしてゆくと
７オトトランノヌタ３３が第５図のａで示すように誤動
作する。この誤動作は、出力のフォトトランジスタ３３
をオフ状態に設定した場合でも同様に生じ、光結合アイ
ソレータのシールド状態が悪い程、低いへ正勾配でも生
じる。While maintaining this state, a voltage vN having a certain voltage gradient (voltage/time) is applied between the cathode and the ground terminal 0. Here, if the voltage gradient of this voltage vN is increased, the 7-channel auto-transmitter 33 malfunctions as shown by a in FIG. 5. This malfunction is caused by the output phototransistor 33
The same phenomenon occurs even when the optical coupling isolator is set to the off state, and the worse the shielding condition of the optical coupling isolator, the lower the positive slope.
表１には上記３種の光結合アイソレークが誤動作を開始
する電圧勾配（ｖ／／／ｊｓ）を示す。Table 1 shows the voltage gradients (v///js) at which the above three types of optical coupling isolake start malfunctioning.
また、表２には波長９４０ｎｍ、および波長７００ｎｍ
の光に対する膜厚３００ＸのＳ ｎＯ２Ｐ＋Ｑおよび膜
厚３０００Ｘのポリシリコン膜それぞれの透過率を示す
。尚、通常光結合アイソレータの発光素子としては発光
波長が９４Ｏｒ＋ｍのＧａＡｓＬＥＤ 、高速応答の要
求されるものでは発光波長が７００ｎｍのＧａＡｓＰ
ＬＥＤが使用されている。Table 2 also shows wavelengths of 940 nm and 700 nm.
The transmittance of the SnO2P+Q film with a film thickness of 300X and the polysilicon film with a film thickness of 3000X with respect to light is shown. Note that the light emitting element of the optically coupled isolator is usually a GaAsLED with an emission wavelength of 94Or+m, and for those requiring high-speed response, a GaAsP with an emission wavelength of 700nm is used.
LEDs are used.
＜ｆ４２＞
表１および表２から明らかなように、本発明によるポリ
シリコン膜からなるシールド膜を出力側の半導体チップ
に設けたものは、シールド膜のないものおよびＳｎ０２
ｆｌｕ Ｋよるシールド膜を有する従来のものに比べ
、同相ノイズに対する高いシールド効果を有している。<f42> As is clear from Tables 1 and 2, the semiconductor chip with a shield film made of a polysilicon film according to the present invention provided on the output side is different from the one without a shield film and the Sn02
It has a higher shielding effect against common mode noise than the conventional one having a shielding film made of flu K.
加えて、ポリシリコン膜はＳ ｎＯ２膜に比べ通常のデ
ータ信号伝達用のＬＥＤの光に対して高い透過率を有し
１、シールド用のポリシリコン膜による受光感度の低下
を招く恐れもない。In addition, the polysilicon film has a higher transmittance than the SnO2 film for the light of an LED for normal data signal transmission1, and there is no fear that the light-receiving sensitivity will be lowered by the shielding polysilicon film.
また、ポリシリコンは、一般の半導体装置の配線一層と
して使用されでいるように、半導体ゾロセヌで多用され
ているもので、特にポリシリコン膜形成のために専用の
装置およびヌベーヌを用意する必要もない。従って、本
発明によるシールド用ポリシリコン膜を有する半導体素
子の形成は非常に容易々ものである。In addition, polysilicon is widely used in semiconductors, just as it is used as a wiring layer in general semiconductor devices, so there is no need to prepare special equipment or nuvene specifically for forming polysilicon films. . Therefore, it is very easy to form a semiconductor element having a shielding polysilicon film according to the present invention.
尚、上記実施例では装置が光結合アイソレータである場
合につき述べたが、本発明は光結合素子に限らず、周囲
からのノイズの回り込みの問題となる受光機能を有する
装置であれは、例えばフォトトランジスタ等の他の装置
６にも適用できる。また所定電位に設定された外部瑞子
からシールド用ポリシリコン膜へ電位を与えるようにし
てもよい。In the above embodiments, the case where the device is an optical coupling isolator has been described, but the present invention is not limited to optical coupling elements, but can be applied to any device having a light receiving function that causes a problem of noise from surroundings coming around, for example, photocoupling. It can also be applied to other devices 6 such as transistors. Alternatively, a potential may be applied to the shielding polysilicon film from an external screw set to a predetermined potential.
以上のようにこの発明によれば、周囲からのノイズを効
果的に低減され製造も容易に行うことのできる高い生産
性を有する半導体Ｆ−ｎ’ｉ゛を提供することができる
。As described above, according to the present invention, it is possible to provide a semiconductor F-n'i' that effectively reduces noise from the surroundings, can be manufactured easily, and has high productivity.
第１図は光結合アイソレータのむ・Ｖ造を示す断面図、
第２図はその等価回路図、第３図はこの発明の〜実施例
に係る半導体装置の摺成を示す断面図、第４図はシール
ド効果計測試験回路を分波形を示す図である。
２１・・・半導体基板、２２・・・受光領域、２３・・
・第１の絶縁ＢＬ２４・・・ポリシリコン配線層、２５
・・？Ｒ２の絶１陣膜、２６・・・冑）２のポリシリコ
ン脱、２７・・・金属Ｈ々。
出願人代理人 弁理士 鈴 江 武 彦第３図
第４図
、２３１
− ＶＮ −
第５図Figure 1 is a cross-sectional view showing the V-structure of the optical coupling isolator.
FIG. 2 is an equivalent circuit diagram thereof, FIG. 3 is a sectional view showing the fabrication of a semiconductor device according to embodiments of the present invention, and FIG. 4 is a diagram showing divided waveforms of a shielding effect measurement test circuit. 21... Semiconductor substrate, 22... Light receiving area, 23...
・First insulation BL24...polysilicon wiring layer, 25
...? R2's absolute first film, 26... helmet) 2's polysilicon removal, 27... metal H etc. Applicant's representative Patent attorney Takehiko Suzue Figure 3 Figure 4, 231 - VN - Figure 5
Claims (3)
体部と、この半導体部の上記ＰＮ接合部を覆って設けら
れ所定の電位を与えられるシールド用ポリシリコン膜と
を具備することを特徴とする半導体装置。(1) A semiconductor section including a PN junction having a predetermined light receiving function, and a shielding polysilicon film provided to cover the PN junction of the semiconductor section and applied with a predetermined potential. semiconductor device.
から与えられていることを特徴とする特許請求の範囲第
１項記載の半導体装置。(2) The semiconductor device according to claim 1, wherein the predetermined potential is applied from a reference potential source region of the semiconductor section.
面とは上部膜を介し分離されていることを特徴とする特
許請求の範囲第１項または第２項記載の半導体装置。(3) The semiconductor device according to claim 1 or 2, wherein the shielding polysilicon film is separated from the surface of the semiconductor portion via an upper film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58127279A JPS6018976A (en) | 1983-07-13 | 1983-07-13 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58127279A JPS6018976A (en) | 1983-07-13 | 1983-07-13 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6018976A true JPS6018976A (en) | 1985-01-31 |
Family
ID=14956043
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58127279A Pending JPS6018976A (en) | 1983-07-13 | 1983-07-13 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6018976A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1146568A2 (en) * | 2000-04-12 | 2001-10-17 | Infineon Technologies North America Corp. | Electrically-conductive grid shield for semiconductors |
| JP2015056651A (en) * | 2013-09-13 | 2015-03-23 | 株式会社東芝 | Light receiving element and optically coupled insulating device |
-
1983
- 1983-07-13 JP JP58127279A patent/JPS6018976A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1146568A2 (en) * | 2000-04-12 | 2001-10-17 | Infineon Technologies North America Corp. | Electrically-conductive grid shield for semiconductors |
| EP1146568A3 (en) * | 2000-04-12 | 2003-10-08 | Infineon Technologies North America Corp. | Electrically-conductive grid shield for semiconductors |
| JP2015056651A (en) * | 2013-09-13 | 2015-03-23 | 株式会社東芝 | Light receiving element and optically coupled insulating device |
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