JPS60186185A - Automatic white balance adjusting circuit - Google Patents

Abstract

PURPOSE:To stabilize color temperature without any adjustement by detecting the white level and black level of a cathode current through a detection resistance provided for every channel, and selecting the ratio of values of detection resistances. CONSTITUTION:A switch 51 of, for example, a channel B is turned on and off with pulses PW and PB, and a white level detection voltage VWB and a black level detection voltage VBB are obtained with a white level detection resistance RWB and a black level detection resistance RBB, and cathode currents IWB and IBB. Differential amplifiers 32B and 31B increase or decrease the amplitudes of the detection voltages VWB and VBB according to the large/small relation with a reference voltage V0 and output control signals SWB and SBB. Therefore, the ratio of cathode currents for the white level is determined on the basis of the ratio RWR:RWG:RWB and the cathode currents for the black level are determined on the basis of the ratio RBR:RBG:RBB; and the ratio of respective resistance values is selected to determine color temperature.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an automatic white balance adjustment circuit in a television receiver.

BACKGROUND ART AND PROBLEMS THEREOF Figure 1 shows a circuit system of a television receiver including a conventional automatic white balance 14 adjustment circuit.

In the figure, a television signal selected by a tuner 2 from a reception signal 1e received by an antenna 1 is applied to an intermediate frequency circuit 6 and converted into an intermediate frequency signal of a predetermined frequency, and the intermediate frequency signal of It is added to the detection circuit 4 for video detection. The video signal Sv obtained from the video detection circuit 4 is applied to the synchronization separation circuit 5, and
The Y signal (luminance signal) and C signal (
chroma signal). The Y signal is applied to a gain control amplifier 7, and the C signal is applied to a gain control amplifier 8 as well as to the burst gate circuit. The gain control amplifier 7.8 is used as a picture adjustment circuit, and the gain is controlled by the control voltage obtained from the variable resistor 10, thereby performing picture adjustment of the Y signal and the C signal. . The picture-adjusted signal y (N) is level-clamped in the clamp circuit 11 and then applied to the matrix circuit 12.The picture-adjusted C signal is then applied to the color adjustment circuit 16 as follows:
After color adjustment is performed using the control f11 blood pressure obtained from the variable resistor 14, the signal is sent to the color demodulation circuit 15. The color burst signal extracted from the υC signal by the birth gate circuit 9 drives the subcarrier oscillator 16,
11. obtained from this oscillator 16. The subcarriers are subjected to reverse phase adjustment in the phase shift circuit 17 by a control voltage obtained from the variable resistor 18, and then applied to the color demodulation circuit 15. R to Y1 obtained from this color demodulation circuit 15
The 8-Y color difference signal is sent to the matrix circuit 12.

- On the other hand, the horizontal and vertical synchronization signals obtained from the synchronization separation circuit 5 are applied to the horizontal deflection circuit 19 and the vertical deflection circuit 20. These horizontal and vertical deflection circuits 19 and 20 generate a horizontal blanking pulse HP and a vertical blanking pulse vP based on the synchronization signal and apply them to the timing pulse generation circuit 21 and matrix circuit 12, and also generate a horizontal deflection signal HF and a vertical blanking pulse. Create a deflection signal VF and send it to cathode ray tube 2
2 horizontal and vertical deflection coils (not shown). The timing generation circuit 21 generates the above pulse HP.

A burst extraction pulse is generated based on VP and applied to the burst gate circuit 9, and a white timing pulse Pw and a black timing pulse PB, which will be described later, are generated and output.

The matrix circuit 12 generates R, G signals based on the C signal, the color difference signal, and the horizontal and vertical blanking pulses HP and VP.
, demodulates the B color signal. These R and G%B signals are sent to the reference level insertion circuit 23. ．． In 23G and 23B,
White reference level vsw and black reference level VS which will be described later
B is inserted for a predetermined period. Next, gain control amplifier 24R
, 24G, and 24B, the control signal 5WR described later
s 5WGs SWB performs gain control, white level adjustment is performed, and level shift circuit 25R
, 25, , 25B, control signals SBR, which will be described later,
5Bcx SBB performs a level shift and black level adjustment. R, where white balance adjustment is achieved by performing the above white level adjustment and black level adjustment;
The G and B signals are then sent to video intensifiers 26R, 26, 26B.
The cathode 27R, 27, of the cathode ray tube 22 is amplified by
Added to 27B.

Cathode 27. The current flowing through the cathode current detection circuit 2
8R, and this detection signal is applied to sample and hold circuits 29R and 30H. The current flowing through the cathode 27c is detected by the cathode current detection circuit 28a, and this detection signal is sent to the sample and hold circuits 29G, 30. added to. Cathode 27B'r: The current flowing through the cathode 'huge current detection circuit 28. This detection signal is applied to sample and hold circuits 29B and 30BK. Above sample hold circuit 29 Hs 29 c 529B
is added as the black timing pulse Pn'& sampling pulse obtained from the timing pulse generation circuit 21, and is added as the sample hold circuit 30R130G, 3
The white timing pulse Pw obtained from the timing pulse generation circuit 21 is added as a sampling pulse to 0n.

The pulses PWs PB are obtained at the timing shown in FIG. 2 with respect to the original video signal Sv. That is, the video signal Sv
For example, if the vertical blanking period (denoted by VBLK) of
If the length of the vertical blanking period is 1B, the pulse p is applied in the first H period (indicated by IH) from the end of this vertical blanking period.
w is obtained, and in the second H period (denoted 2H) the pulse P
B is obtained. The 1H and 2H periods are video periods, but are not displayed on the receiver screen.

The pulse "WlPB" obtained at the above-mentioned timing is used as a sampling pulse as mentioned above, and
The pulse Pw drives the white reference level generation circuit 33w,
The pulse PB drives the black reference level generation circuit 33B.

As a result, the white reference level generation circuit 33w outputs the white reference level VSW represented by a level of, for example, 50 to 60I)1 as shown in diagram M2.

This reference level VSW is the reference level insertion circuit 23R.
s23c and s23n are inserted into the 1R period of the R101B signal, respectively. At the same time, the black reference level generating circuit 33B is configured as shown in FIG.
A black reference level VSB expressed by the level of IRE is output. This reference level VSB is inserted into the 2R periods of the R, G, and B signals by the reference level insertion circuits 26R, 23a, and 23B, respectively.

Therefore, if any of the currents flowing through the cathodes 27B, 27c, and 27n changes and the white balance collapses, the reference level VSWs vsB inserted in the 1R period and 2H period changes, and the change in vsw is detected by the sample and hold circuit. 30R, 30G, and 30B are detected, and the change in VSH is sampled and held at Wr 29R12
9G.

29, it is detected. The detected value of the sample hold circuit 6 [1R130G, 30B is the differential amplifier 62
In addition to R132 and 132B, respectively, the above 50-
The difference from the reference voltage vw equivalent to 60IRE can be seen. This difference signal is added to the gain control amplifiers 24R124c and 24B as control signals 5WRx 5WGs SWB,
In particular, gain control of the R, G, and B signals is performed to adjust the white level. Sample and hold circuit 2
9R, 29G, 29. The detected value is the differential amplifier 61R1.
31G, 31. , and the difference from the reference voltage VB corresponding to the 5IRE is determined. By applying this difference signal to the level shift circuits 25R, 25, and 125B as a control signal 5BRv''BGsSBB, the p, R, G, and B signals are added, and the O level is shifted to perform black level adjustment. .

According to the above, control loops are configured for the B channel, G channel, and B channel, respectively, and the black level adjustment is performed by these control loops, thereby controlling the cathodes 27R and 27G.

By making the cutoff points of each cathode voltage-current characteristic of 27B coincide with each other and performing the white level adjustment, it is possible to make the slopes of each of the cathode voltages -' . . . and current characteristics the same. As a result, the cathode electrode 27 Rs 2
The ratio of the cathode currents flowing in 7a s 27n can be maintained at a predetermined level, and the white balance of the screen can be stabilized.

In the automatic white balance adjustment circuit described above, the color temperature of the white raster can be adjusted to a predetermined level by controlling the ratio of the cathode currents flowing through the cathodes 27R, 27, 27 to a predetermined ratio. I'm trying to be sato. Conventionally, when setting the color temperature, it is done by operating a variable resistor for drive adjustment and a variable resistor for background adjustment provided in the receiver. However, these variable resistors 1 are provided for each channel of 01B, and therefore, the adjustment process requires a great deal of time and effort, and also requires skill. Furthermore, the color temperature that was set before the receiver is handed over to the user may change due to temperature changes, vibrations, etc. after adjustment, and even after the receiver is handed over to the user, the color temperature may change due to aging. Ta.

OBJECTS OF THE INVENTION It is an object of the present invention to provide a white balance adjustment circuit which allows the color temperature to be set stably without the need for FA adjustment, and which increases the size of the dining table.

Summary of the Invention The present invention provides a method in which a white level detection resistor and a black level detection resistor are provided in the control (fl+ loop) of each channel in the conventional automatic white balance adjustment circuit described above, and the ratio of the resistance values of each detection resistor is selected. This makes it possible to obtain an automatic white balance adjustment circuit that can set the color temperature without θMV.

Embodiment FIG. 6 shows a first embodiment of the present invention, and parts corresponding to those in FIG. 1 are given the same reference numerals.

FIG. 6 shows a circuit and a G that constitute the automatic white balance adjustment circuit in the latter stage of the matrix circuit 12 in FIG. 1.
, B shows the control loop for each channel. Video intensifier 26R126G, 26B and cathode current detection circuit 28 in each control loop. , 28G.

The circuits except 28B are integrated on the same chip of the IO circuit 40. This IC circuit 40 is further provided with the reference level generation circuits 33W and 68B, a timing pulse generation circuit 21, a switch 51, and the like. Although the configuration of the B channel control loop is shown in the drawing, the B channel and G channel control loops are also configured in the same way.

To this IC circuit 40, color signals of 几, G, and B are supplied from the matrix circuit 12 at the previous stage to each channel through terminal bins 41, 42, and 46. The output signals of the level shift circuits 25R, 25G, 25n in each channel are taken out from the terminal bins 44, 45, 46, and are transferred to the transistors Q1, Q2, . After being amplified by Q3, transistor Q4
, Q5, Q6 emitter followers to each cathode 2
7Rs 27a s 27 n.

The collector of the transistor Q4 is connected to a resistor "BRsRWB" which constitutes the cathode current detection circuit 28R. The collector of the transistor Q5 is connected to the resistor BG%WG which constitutes the cathode current detection circuit 28c. The collector of the transistor Q6 includes a resistor BBs that constitutes the cathode current detection circuit 26B.
RWB is connected. The above resistance WRsRWGs
RWB is for white level detection and is selected to have a small resistance value.
and the switch 51 via the diodes D1, D2, and D3, and further via the terminal pin 50 of the IC circuit 40.
It is connected to the. Above resistance RBR% RBG% RBB
is for black level detection, and is chosen to have a sufficiently high resistance value. For example, the ratio between the high resistance value and the small resistance value is 10
The ratio is selected to be about 0:1.

The cathode current detection signal detected as a positive value by the detection circuit 28R128o128B is transmitted to the terminal bin 47.
48 and 49 to the IC circuit 40 and to the sample and hold circuits of each channel. In the B channel of the IC circuit 40, a detection signal indicating the current of the cathode 27B input from the terminal bin 49 is applied to the sample hold circuit 29B1 to OB, and a sampling pulse PB1 applied from the timing pulse generation circuit 21.
It is sampled by Ptvl. Incidentally, these sampling pulses Pn1 and PWl are the pulses PB and PB in FIG.
The pulse width is narrower than that of Pw, and the pulse width is narrower than that of Pw.
It is obtained at the same timing as %PW. These sampling outputs are sent to a differential amplifier 31. , 32B and compared with a common reference voltage ■. Then, as described above, the control signal SBB obtained from the differential amplifier 31B is applied to the level shift circuit 25B, and the control signal SWB obtained from the differential amplifier 32B is applied to the gain control amplifier 24B. The same operation as the B channel is performed on the 几 channel and the G channel as well. Further, the switch 51 is turned off when the pulse P is applied, and turned on during other periods.

According to the above configuration, when the white reference level VSW is inserted into the B signal in response to the pulse PW in the B channel, for example, the switch 51 is not turned on. is connected in parallel to the high resistance value resistor RBB, and the combined resistance value is approximately 1'LwB. Therefore, if the cathode current flowing at this time is IWB, then the white level detection/direct pressure Vw applied to the terminal bin 49
B is VWB = I WB X Rwnl--AZ'
ht+1+6*--y'D-1fIFI--y-a! t
e:,:++(44)-Toge I4++,-+/I/vsB
When RWB is inserted, switch 51 is turned off and resistor RWB is disconnected. Therefore, if the cathode current flowing at this time is IBB, then the voltage VBB applied to the terminal pin 49 for black level detection 1 is Bn==1, Bx几BB. Differential amplifier 32. decreases the amplitude of the B signal when Vwn 2 V□, and VWB < V. At this time, a control signal SWB that increases the amplitude is output.

In addition, the differential amplifier 61B lowers the DO level of the B signal when V6, V. When Vnn > Vo, the D
A control signal SBB for raising the C level is output. These operations are performed in the same way for the B channel and G channel, and the cathode current IWR when detecting the white level respectively
v ■Cathode current IT3R during WG and black level detection
- IBG is obtained 0 Here, in a steady state where a predetermined white balance is maintained, the following is obtained. Therefore, the ratio of each cathode current to the white level is determined by the ratio of "WR" wa : Rwn, and 1
The ratio of each cathode current to the black level is determined by the ratio of LnR:Rna:RBB. Since the ratio of brightness of 1, L, G, and B in a cathode ray tube matches the ratio of cathode current, color temperature is determined by selecting the ratio of each resistance value.

According to this embodiment, since the ratio of the detected values of the change in VSW and the ratio of the detected values of the change in vsn detected in the control loop of each channel are determined by the resistance value, the temperature change, The ratio of the detected values is always maintained regardless of vibrations, changes over time, etc., and the white balance control operation is performed based on this ratio. Therefore, once the resistance value ratio is determined, the set color temperature will not be changed. Furthermore, since it is only necessary to select the resistance value so as to obtain a predetermined ratio, the color temperature can be set by adjusting f#. Furthermore, variations in color temperature of the receiver can be reduced. The desired color temperature will change depending on the region where the receiver is installed, but you can easily change the color temperature by selecting an external resistor.

FIG. 4 shows a second embodiment, and parts corresponding to those in FIG. 6 are given the same reference numerals.

In this embodiment, the insertion and sampling of the white reference level Vsw and the insertion and sampling of the black reference level VsB are performed alternately for each field, and moreover, the insertion and sampling of the white reference level Vsw and the black reference level VsB are performed alternately for each field. This is done in sequence.

That is, as shown in FIG. 5, first, in the A field, VSW is inserted into the R signal based on the pulse PWH in the first H period (1H) from the vertical blanking period V and BLK, and at the same time, VSW is inserted into the R signal based on the pulse PWH. Yol) V
The change in sw is detected, and Vsw is inserted into the G signal based on the pulse PWG in the second H period (2H), and the change in VSW is detected by the sampling pulse PWGi, and in the third H period (6H). VSW is inserted into the B signal based on the pulse PWH, and the sampling pulse PW
By B1F) Detect the change in Vsw. Similarly in the next B field, pulse PBRs ``BG s
Sequentially insert the VSB into the PBB, and insert the sampling blocks PEIR1, PBGl, and PBB1.
) Detect changes in vSB sequentially.

According to the above method, VSW insertion and sampling are performed individually and sequentially for white, black, and R, G, and H, so that the cathode current detection circuits 28R, 28c.

28B of detection signals can be collectively inputted from a common terminal pin of the IC circuit 40, and within this IC circuit 40, the detection signals can be distributed to each channel according to the timing shown in FIG. . For this purpose, in FIG. 4, the collectors of transistors Q4, Q5, and Q6 are connected to a common terminal pin 49 via diodes D4, D5, and D6, respectively. Along with this, the terminal pin 4
The detection signal obtained from the timing pulse generation circuit 21 is distributed to the control loops of the control, G, and B channels, and is output from the timing pulse generation circuit 21. 'Furthermore, the switch 51 is turned off only during the period when the vSB insertion and sampling are performed by the switch signal P1 applied at the timing shown in FIG. Visit, 4th
The circuit configuration of other parts of the figure is the same as that of FIG.

According to the above configuration, the terminal pins 47 and 48 of the IC circuit 40 in FIG. 6 can be omitted. Also, the above ■,
(The following relationship holds true, and the color temperature can be determined by selecting the ratio of each resistance value.

Effects of the Invention The color temperature can be easily set simply by selecting the ratio of the cathode current detection resistors of each channel, making it possible to completely eliminate the need for adjustment of the color temperature setting. Once set, the color temperature is stable and is not affected by temperature changes, aging, vibrations, etc.

Color temperature can be easily changed by selecting an external detection resistor. Variations in color temperature between receivers can be reduced.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a television receiver including a conventional automatic white balance adjustment circuit to which the present invention can be applied, FIG. 2 is a timing chart of FIG. 1, and FIG. 6 is a first embodiment of the present invention. 4 is a circuit diagram showing the second embodiment, and FIG. 5 is a timing chart of FIG. 4. In addition, in the symbols used in the drawings, 23R, 23G, 23B...Reference level insertion circuit 2
4R, 24c, 24B...gain control amplifier 25R,
25c, 25B...Level shift circuit RWR1W
G, RWB...White level detection resistance BR% YLB
G% RBB"'Black level detection resistance. Agent Masaru Ueya Yoshio Tsune

Claims (1)

[Claims] 1. A gain control circuit and a level shift circuit are provided for each channel of 几 and G%B, and the gain control circuit is controlled in a closed loop according to the white level detection value of the cathode current of each channel. In addition, in an automatic white balance adjustment circuit that performs closed-loop control of the level shift circuit according to the black level detection value of the cathode current of each channel, the detection of the white level and black level of the cathode current is performed for each channel. An automatic white balance adjustment circuit is configured to adjust the detection resistor provided and to select the ratio of the detection resistor size for white level detection and the detection resistor size ratio for black level detection, respectively. 2. At least the gain control circuit and the level shift circuit in each channel are configured into 10 circuits, and the detection resistor is externally connected to the IC circuit in multiple ways. Automatic white balance adjustment circuit described in section.