JPH0576838B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an automatic white balance adjustment circuit in a television receiver.

BACKGROUND ART AND THEIR PROBLEMS FIG. 1 shows a circuit system of a television receiver including a conventional automatic white balance adjustment circuit.

In the figure, a television signal selected by a tuner 2 from a reception signal received by an antenna 1 is applied to an intermediate frequency circuit 3 and converted into an intermediate frequency signal of a predetermined frequency, and this intermediate frequency signal is sent to a video detection circuit. 4 and is subjected to video detection. The video signal S _V obtained from the video detection circuit 4 is applied to a synchronization separation circuit 5 and also to a Y/C separation circuit 6 where it is separated into a Y signal (luminance signal) and a C signal (chroma signal). . The Y signal is applied to a gain control amplifier 7, and the C signal is applied to a gain control amplifier 8 and a burst gate circuit 9.
added to. The gain control amplifiers 7 and 8 are used as picture adjustment circuits, and the gain is controlled by the control voltage obtained from the variable resistor 10, thereby performing picture adjustment of the Y signal and the C signal. Y with picture adjustment done
After the signal is level clamped by a clamp circuit 11, it is applied to a matrix circuit 12. The picture-adjusted C signal is sent to the color adjustment circuit 13.
After color adjustment is performed using the control voltage obtained from the variable resistor 14, the signal is sent to the color demodulation circuit 15. Further, the color burst signal extracted from the C signal by the burst gate circuit 9 drives the subcarrier oscillator 16, and this oscillator 1
The subcarrier obtained from 6 is phase-adjusted in a phase shift circuit 17 by a control voltage obtained from a variable resistor 18, and then applied to the color demodulation circuit 15. The R-Y and B-Y color difference signals obtained from the color demodulation circuit 15 are sent to the matrix circuit 1.
Sent to 2.

On the other hand, horizontal and vertical synchronization signals obtained from the synchronization separation circuit 5 are applied to a horizontal deflection circuit 19 and a vertical deflection circuit 20. These horizontal and vertical deflection circuits 19 and 20 generate a horizontal blanking pulse HP and a vertical blanking pulse based on the synchronization signal.
A VP is generated and applied to the timing pulse generation circuit 21 and the matrix circuit 12, and a horizontal deflection signal HF and a vertical deflection signal VF are generated and applied to the horizontal and vertical deflection coils (not shown) of the cathode ray tube 22. The timing pulse generation circuit 21 generates a burst sampling pulse based on the pulses HP and VP and applies it to the burst gate circuit 9, and also generates and outputs a white timing pulse P _W and a black timing pulse P _B , which will be described later.

The matrix circuit 12 includes a Y signal, a color difference signal, and horizontal and vertical blanking pulses HP, VP.
The R, G, and B color signals are synthesized based on the . These R, G, and B signals are inserted into the reference level insertion circuit 23 _R ,
At 23 _G and 23 _B , the white reference level described later
V _SW and black reference level V _SB are inserted for a predetermined period. Next, gain control amplifiers 24 _R , 24 _G , 24 _B
, the gain is controlled and the white level is adjusted using control signals S _WR , S _WG , and S _WB , which will be described later.
Furthermore, in the level shift circuits 25 _R , 25 _G , and 25 _B , a level shift is performed using control signals S _BR , S _BG , and S _BB to be described later, and black level adjustment is performed. R, G, whose white balance has been adjusted by performing the above white level adjustment and black level adjustment,
The B signal is then amplified by video amplifiers 26 _R , 26 _G , 26 _B and sent to the cathodes 27 _R , 27 of the cathode ray tube 22 .
_G , 27 added to _B.

The current flowing through the cathode _27R is detected by a cathode current detection circuit _28R , and this detection signal is applied to sample and hold circuits _29R and _30R . The current flowing through the cathode _27G is added to _29G and _30G by a cathode current detection circuit _28G . cathode 2
The current flowing through _7B is detected by a cathode current detection circuit _28B , and this detection signal is applied to sample and hold circuits _29B and _30B . The sample hold circuits 29 _R , 29 _G , 29 _B receive the black timing pulse P B obtained from the timing pulse generating circuit 21 as a sampling pulse, and the sample hold circuits 30 _R , 30 _G , 30 _B receive the timing pulse P _B obtained from the timing pulse generating circuit 21 as a sampling pulse. The white timing pulse P _W obtained from the generation circuit 21 is added as a sampling pulse.

The pulses P _W and P _B are obtained at the timing shown in FIG. 2 with respect to the original video signal S _V. That is, the vertical blanking period (denoted by VBLK) of the video signal S _V
For example, if the length is 21H period, pulse P W is obtained in the first H period (indicated by 1H) from the end of this vertical blanking period, and the pulse P _W is obtained in the second H period (indicated by 1H) from the end of this vertical blanking period.
A pulse P _B is obtained during the period (denoted 2H). still,
These 1H and 2H periods are video periods, but they are not displayed on the receiver screen.

The pulses P _W and P _B obtained at the above timing are used as sampling pulses as described above, and the pulse P _W drives the white reference level generation circuit 33 _W , and the pulse P _B drives the black reference level generation circuit 33 W. 33 Drive _B.

As a result, the white reference level generation circuit 33 _W
outputs a white reference level V _SW represented by, for example, a level of 50 to 60 IRE as shown in FIG. This reference level V _SW is the reference level insertion circuit 23.
The above 1H of _R , G, B signals by R, 23 _G , 23 _B
Each is inserted within the period. At the same time, the black reference level generating circuit _33B generates the black reference level represented by the level of, for example, 5IRE as shown in FIG.
Outputs V _SB . This reference level _VSB is set to R by the reference level insertion circuits _23R , _23G , _23B .
They are inserted into the 2H periods of the G and B signals, respectively.

Therefore, if any of the currents flowing through the cathodes 27 _R , 27 _G , and 27 _B changes and the hold balance is disrupted, the cathode current with respect to the reference levels V _SW and V _SB inserted in the 1H period and 2H period changes. The change is detected by the cathode current detection circuit 28 _R , 2
8 _G and 28 _B , and the detected voltage is sent to sample and hold circuits 29 _R , 29 _G , 29 _B and 30 _R , 3
Sample and hold at 0 _G and 30 _B. Then, the detected values of the sample and hold circuits _30R , _30G , _30B are applied to the differential amplifiers _32R , _32G , _32B , respectively, and the reference voltage _VW corresponding to the 50 to 60IRE is applied to the differential amplifiers 32R, 32G, 32B.
The difference is required. This difference signal is the control signal
S _WR , S _WG , S _WB as the gain control amplifier 24 _R ,
24 _G. 24 By being added to _B , R, G,
Gain control of the B signal is performed to adjust the white level. In addition, sample hold circuits 29 _R , 29 _G ,
The detected value of 29 _B is the differential amplifier 31 _R , 31 _G , 31 _B
, and the difference from the reference voltage V _B corresponding to the 5IRE is determined. This difference signal is sent to the level shift circuit 2 as control signals S _BR , S _BG , S _BB
By adding to 5 _R , 25 _G , 25 _B , R,
Black level adjustment is performed by DC level shifting of the G and B signals.

According to the above, R channel, G channel,
Control loops are configured for each channel B, and these control loops adjust the black level, thereby controlling the cathodes 27 _R ,
By matching the cut-off points of the respective cathode voltage-current characteristics of 27 _G and 27 _B and performing the white level adjustment, the slopes of the respective cathode voltage-current characteristics can be made equal. As a result,
The ratio of the cathode currents flowing through the cathodes 27 _R , 27 _G , and 27 _B can be maintained at a predetermined level, and the white balance of the screen can be stabilized.

In the automatic white balance adjustment circuit described above, by controlling the ratio of the cathode currents flowing through the cathodes _27R , _27G , and _27B to a predetermined ratio, the color temperature of the white raster can be adjusted to a predetermined magnitude. I'm trying to make it happen.

In other words, as is well known from the past,
In order to adjust the color temperature, it is necessary to set the cathode currents of each of the R, G, and B channels to a certain ratio. Furthermore, these cathode currents need to be set independently for black level adjustment and white level adjustment due to the problem of nonlinearity of cathode ray tubes.

However, in the conventional automatic white balance adjustment circuit shown in Fig. 1, there is one cathode current detection element for each R, G, and B channel, so the cathode current is connected to the black level adjustment side and the white level adjustment side. It is not possible to arbitrarily set the current ratio. In addition, since the magnitude of the detection current is extremely different when adjusting the black level and when adjusting the white level, if the value of the detection element is adjusted to the value for adjusting the white level, the detection voltage when adjusting the black level will become extremely small. Therefore, the error in the loop operation when adjusting the black level increases. Conversely, if the value of the detection element is adjusted for black level adjustment, the detection voltage during white level adjustment will become very large and exceed the dynamic range of the adjustment loop, making the adjustment impossible. It becomes possible.

Therefore, with the conventional automatic white balance adjustment circuit shown in FIG. 1, it is difficult to have a good function that satisfies both black level adjustment and white level adjustment. After using auto white balance, manual adjustment is required to match the color temperature.

OBJECTS OF THE INVENTION It is an object of the present invention to provide an automatic white balance adjustment circuit with an added function that allows color temperature to be set stably without adjustment.

Summary of the Invention The present invention provides a white level detection resistor and a black level detection resistor in the control loop of each channel in the conventional automatic white balance adjustment circuit described above, and selects the ratio of the resistance values of each detection resistor. It is. As a result, it is possible to obtain an automatic white balance adjustment circuit that can set the color temperature without any adjustment.

Embodiment FIG. 3 shows a first embodiment of the present invention, in which parts corresponding to those in FIG. 1 are given the same reference numerals.

FIG. 3 shows control loops for each of the R, G, and B channels constituting an automatic white balance adjustment circuit at a stage subsequent to the matrix circuit 12 in FIG. 1. Video intensifier 2 in each control loop
6 _R , 26 _G , 26 _B and cathode current detection circuit 2
The circuits except 8 _R , 28 _G , and 28 _B are integrated on the same chip of the IC circuit 40. This IC circuit 40
Furthermore, the reference level generation circuits 33 _W , 33
_B , a timing pulse generation circuit 21, a switch 51, etc. are provided. In the drawing, the configuration of the control loop of the B channel is shown, but the configuration of the control loop of the R channel is shown.
The control loops for the channel and G channel are similarly configured. To this IC circuit 40, R, G, and B color signals are supplied from the matrix circuit 12 at the previous stage to each channel through terminal pins 41, 42, and 43. The output signals of the level shift circuits 25 _R , 25 _G , 25 _B in each channel are taken out from terminal pins 44 , 45 , 46 and transmitted through transistors Q ₁ , Q ₂ configuring the video amplification circuits 26 _R , 26 _G , 26 _B. , after being amplified by Q ₃ , the transistor
It is supplied to each cathode 27 _R , 27 _G , 27 _B through the emitter follower of Q ₄ , Q ₅ , Q ₆ .

Resistors R _BG and R _WR forming the cathode current detection circuit 28 _R are connected to the collector of the transistor Q ₄ . A resistor forming the cathode current detection circuit _28G is connected to the collector of the transistor _Q5 .
R _BG and R _WG are connected. Resistors R _BB and R _WB forming the cathode current detection circuit 28 _B are connected to the collector of the transistor Q ₆ . The above resistors R _WR , R _WG , and R _WB are for white level detection.
are chosen to have a small resistance value, and the diodes D ₁ ,
Furthermore, the terminal pin 50 of the IC circuit 40 is connected via D ₂ and D ₃ .
It is connected to the switch 51 via. The above-mentioned resistors R _BR , R _BG , and R _BB are for black level detection, and are selected to have sufficiently high resistance values. The ratio between the high resistance value and the low resistance value is selected to be about 100:1, for example.

The cathode current detection signals detected as voltage values by the detection circuits _28R , _28G , and _28B are applied to the IC circuit 40 from terminal pins 47, 48, and 49, and are applied to the sample and hold circuits of each channel. In the B channel of the IC circuit 40,
A detection signal indicating the current of the cathode _27B input from the terminal pin 49 is sent to the sample and hold circuit _29B ,
_30B added to timing pulse generation circuit 2
Sampling pulses P _B1 , P _W1 applied from 1
sampled by Note that the sampling pulses P _B1 and P _W1 have _a narrower pulse width than the pulse widths of the pulses P _B and P _W shown in FIG.
It is obtained at the same timing as P _W. These sampling outputs are sent to differential amplifiers _31B , 3
2 _B and are each compared with a common reference voltage _VO . And as mentioned above, the differential amplifier 3
The control signal _SBB obtained from the differential amplifier 32B is applied to the level shift circuit 25B, and _the control signal _SWB obtained from the differential amplifier _32B is applied to the gain control amplifier _24B . The same operation as the B channel is performed on the R channel and the G channel. Further, the switch 51 is turned off when the pulse P _B is applied, and turned on during other periods.

According to the above configuration, for example, in the B channel, when the white reference level V _SW is inserted into the B signal in response to the pulse P _W , the switch 51 is turned on, and the resistor R with a small resistance value is thereby turned on. _WB is connected in parallel to a high resistance value resistor _RBB , and the combined resistance value is approximately _RWB . Therefore, if the cathode current flowing at this time is I _WB , the white level detection voltage V _WB applied to the terminal pin 49 becomes V _WB =I _WB ×R _WB . Next, when the black reference level _VSB is inserted in response to the pulse _PB , the switch 51 is turned off and the resistor _RWB is disconnected. Therefore, if the cathode current flowing at this time is _IBB , then the black level detection voltage _VBB applied to the terminal pin 49 is _VBB
= I _BB × R _BB . The differential amplifier 32 _B outputs a control signal S _WB that reduces the amplitude of the B signal when V _{WB VO} , and increases the amplitude when V _WB <V ₀ . In addition, the differential amplifier 71 _B outputs the DC voltage of the B signal when V _BB V _O.
When V _BB <V _O , a control signal S _BB is output that increases the DC level. These operations are performed in the same way for the R channel and G channel, and the cathode current when detecting the white level respectively
I _WR , I _WG and cathode current during black level detection I _BR ,
_IBG is obtained.

In a steady state where a predetermined white balance is maintained, V _O /R _WR : V _O /R _WG : V _O /R _WB = I _WR : I _WG : I _WB ... V _O /R _BR : V _O /R _BG :V _O /R _BB =I _BR :I _BG :I _BB ……. Therefore, the ratio of each cathode current to the white level is determined by the ratio of R _WR :R _WG :R _WB ,
The ratio of each cathode current to the black level is determined by the ratio of R _BR :R _BG :R _BB . Since the ratio of the brightness of R, G, and B in the cathode ray tube matches the ratio of the cathode current, the color temperature is determined by selecting the ratio of each resistance value.

According to this embodiment, the ratio of the detected values of the change in V _SW and the ratio of the detected values of the change in V _SB detected in the control loop of each channel are determined by the resistance value. , vibration, changes over time, etc., the ratio of the detected values is always maintained, and the white balance control operation is performed based on this ratio. Therefore, once the ratio of resistance values is determined, the set color temperature will not be changed. Furthermore, since it is only necessary to select the resistance value so as to obtain a predetermined ratio, the color temperature can be set without any adjustment. Furthermore, variations in color temperature of the receiver can be reduced. The desired color temperature will change depending on the region where the receiver is installed, but by selecting an external resistor, you can easily change the color temperature.

FIG. 4 shows a second embodiment, and parts corresponding to those in FIG. 3 are given the same reference numerals.

In this embodiment, the insertion and sampling of the white reference level V _SW and the insertion and sampling of the black reference level V _SB are performed alternately for each field, and moreover, for each channel of R, G, and B within the same field. This is done sequentially for each H. That is, as shown in FIG. 5, first, in the A field, V _SW is inserted into the R signal based on the pulse P _WR in the first H period (1H) from the vertical blanking period V.BLK, and the sampling pulse is
P _WR1 detects the change in V _SW , and in the second H period (2H), V _SW is inserted into the G signal based on pulse P _WG , and V _SW is inserted using sampling pulse P _WG1 .
detects the change in and inserts V _SW into the B signal based on the pulse P _WB in the third H period (3H),
Changes in V _SW are detected by sampling pulse P _WB1 . Similarly for the next B field,
At 1H, 2H, and 3H, V _SB is sequentially inserted into the R, G, and B signals using pulses P _BR , P _BG , and P _BB , and changes in V _SB are controlled using sampling pulses P _BR1 , P _BG1 , and P _BB1 . Detect sequentially.

According to the above method, since the insertion and sampling of V _SW is performed individually and sequentially for white, black, and R, G, and B, the cathode current detection circuits 28 _R , 2
The detection signals of _8G and _28B are collectively inputted from a common terminal pin of the IC circuit 40, and within this IC circuit 40, the detection signals are distributed to each channel according to the timing shown in FIG. can be accomplished. For this purpose, in FIG. 4, the collectors of transistors Q ₄ , Q ₅ , Q ₆ are connected to a common terminal pin 49 via diodes D ₄ , D ₅ , D _{5 ,} respectively. At the same time, the detection signal obtained from the terminal pin 49 is distributed to each control loop of the R, G, and B channels, and the timing pulse generation circuit 21
The pulses obtained at the timing shown in FIG. 5 are supplied to each channel to insert and sample V _SW and V _SB . Also switch 5
1 is turned off only during the period when _VSB insertion and sampling are performed by the switch signal _P1 applied from the timing pulse generation circuit 21 at the timing shown in FIG. Note that the circuit configuration of other parts in FIG. 4 is the same as that in FIG. 3.

According to the above configuration, the IC circuit 4 in FIG.
0 terminal pins 47 and 48 can be omitted. Furthermore, the relationship expressed by the above formula holds true and the color temperature can be determined by selecting the ratio of each resistance value.

Effects of the invention The color temperature can be easily set by simply selecting the ratio of the detection resistors for the cathode current of each channel.
It is possible to completely eliminate the need to adjust color temperature settings. Once set, the color temperature is stable and is not affected by temperature changes, aging, vibrations, etc. The color temperature can be easily changed by attaching a detection resistor externally and selecting the detection resistor as described in claim 2. Variations in color temperature between receivers can be reduced.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a television receiver including a conventional automatic white balance adjustment circuit to which the present invention can be applied, FIG. 2 is a timing chart of FIG. 1, and FIG. 3 is a diagram of a first embodiment of the present invention. Circuit diagram shown, 4th
The figure is a circuit diagram showing the second embodiment, and FIG. 5 is a timing chart of FIG. 4. In addition, in the symbols used in the drawings, 23 _R ,
23 _G , 23 _B ...Reference level insertion circuit, 24 _R ,
24 _G , 24 _B ...gain control amplifier, 25 _R , 25
_G , 25 _B ...Level shift circuit, {29 _R , 29 _G ,
29 _B , 30 _R , 30 _G , 30 _B ...} Sample and hold circuit, R _WR , R _WG , R _WB ... White level detection resistor, R _BR , R _BG , R _BB ... Black level detection resistor. .

Claims (1)

[Claims] 1. Each of the R, G, and B channels is provided with a gain control circuit and a level shift circuit, and the cathode current of each channel is adjusted with respect to a white reference signal inserted in a predetermined period of the color signal of each channel. The gain control circuit is controlled in a closed loop according to the white level detection value, and the level shift circuit is controlled according to the black level detection value of the cathode current of each channel with respect to the black reference signal inserted in a predetermined period of the color signal of each channel. In an automatic white balance adjustment circuit that performs closed-loop control, the white level and black level of the cathode current are detected by separate detection resistors provided for each channel, and the size of the detection resistor for white level detection is An automatic white balance adjustment circuit that selects the ratio of the detection resistor for detecting the black level and the ratio of the size of the detection resistor for detecting the black level. 2. Claim 1, wherein at least the gain control circuit and the level shift circuit in each channel are constructed as an IC circuit, and the detection resistor is externally connected to the IC circuit. Automatic white balance adjustment circuit as described.