JPS60184143U - Microcomputer automatic return device - Google Patents
Microcomputer automatic return deviceInfo
- Publication number
- JPS60184143U JPS60184143U JP6782684U JP6782684U JPS60184143U JP S60184143 U JPS60184143 U JP S60184143U JP 6782684 U JP6782684 U JP 6782684U JP 6782684 U JP6782684 U JP 6782684U JP S60184143 U JPS60184143 U JP S60184143U
- Authority
- JP
- Japan
- Prior art keywords
- data
- central processing
- latch circuit
- return device
- automatic return
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Retry When Errors Occur (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来の自動復帰装置の一例を示すブロック図、
第２図は従来装置の動作を示すフローチャート、第３図
は本考案に係る自動復帰装置の一実施例を示すブロック
図、第４図は本考案の動作を示すフローチャートである
。
１・・・中央演算部、２・・・出力ラッチ回路、３・・
・データバス、５・・・ピン、６・・・入力回路、７・
・・データメモリ、８・・・リセット回路。FIG. 1 is a block diagram showing an example of a conventional automatic return device.
FIG. 2 is a flow chart showing the operation of the conventional device, FIG. 3 is a block diagram showing an embodiment of the automatic return device according to the present invention, and FIG. 4 is a flow chart showing the operation of the present invention. 1... Central processing unit, 2... Output latch circuit, 3...
・Data bus, 5...pin, 6...input circuit, 7.
...Data memory, 8...Reset circuit.
Claims (1)
用のラッチ回路と、このラッチ回路のデ“ −夕と同一
のデータが前記中央演算部から供給され、このデータを
格納するデータメモリと、前記中央演算部からの信号で
駆動されるリセット回路を具備し、 前記中央演算部は、前記ラッチ回路のデータとデータメ
モリのデータとを比較し、これらのデータが一致しない
場合を前記ラッチ回路にデータ反転現象が有るとする検
出手段と、この手段によって検出された信号で前記リセ
ット回路を駆動してマイクロコンピュータをリセット動
作から再起動させる手段を有したことを特徴とするマイ
クロコンピュータの自動復帰装置。[Claims for Utility Model Registration] A latch circuit for data output connected to a central processing unit via a data bus, and the same data as the data of this latch circuit is supplied from the central processing unit; It comprises a data memory for storing data and a reset circuit driven by a signal from the central processing section, and the central processing section compares the data of the latch circuit with the data of the data memory, and determines whether these data are correct. It is characterized by having a detection means for determining that a data inversion phenomenon exists in the latch circuit when they do not match, and means for driving the reset circuit with a signal detected by the means to restart the microcomputer from the reset operation. Automatic return device for microcomputers.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6782684U JPS60184143U (en) | 1984-05-11 | 1984-05-11 | Microcomputer automatic return device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6782684U JPS60184143U (en) | 1984-05-11 | 1984-05-11 | Microcomputer automatic return device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS60184143U true JPS60184143U (en) | 1985-12-06 |
Family
ID=30602008
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6782684U Pending JPS60184143U (en) | 1984-05-11 | 1984-05-11 | Microcomputer automatic return device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60184143U (en) |
-
1984
- 1984-05-11 JP JP6782684U patent/JPS60184143U/en active Pending
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