JPS60183855A - Orthogonal modulating device of digital processing type - Google Patents

Orthogonal modulating device of digital processing type

Info

Publication number
JPS60183855A
JPS60183855A JP3875084A JP3875084A JPS60183855A JP S60183855 A JPS60183855 A JP S60183855A JP 3875084 A JP3875084 A JP 3875084A JP 3875084 A JP3875084 A JP 3875084A JP S60183855 A JPS60183855 A JP S60183855A
Authority
JP
Japan
Prior art keywords
outputs
output
digital
modulation device
filters
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3875084A
Other languages
Japanese (ja)
Other versions
JPH0234539B2 (en
Inventor
Akira Ishimatsu
石松 彰
Junji Maruyama
純司 丸山
Kanji Kume
久米 寛司
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP3875084A priority Critical patent/JPH0234539B2/en
Publication of JPS60183855A publication Critical patent/JPS60183855A/en
Publication of JPH0234539B2 publication Critical patent/JPH0234539B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/32Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
    • H04L27/34Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
    • H04L27/36Modulator circuits; Transmitter circuits
    • H04L27/365Modulation using digital generation of the modulated carrier (not including modulation of a digitally generated carrier)

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

PURPOSE:To simplify the constitution and make a device inexpensive by connecting successively the first and the second filters which are connected to a base band signal and are operated with sampling phases different from each other, a circuit which scans outputs of these filters in time division and switches them, a D/A converter, and a BPF. CONSTITUTION:Digital LPFs 5-1 and 5-2 sample input signals (a) and (b) by sampling pulses (c) and (d) different in phase from each other to send out outputs (e) and (f). A switching circuit 6 switches and scans these outputs (e) and (f) in time division to generate an output (g). The output (g) is subjected to D/A conversion and is modulated orthogonally by a BPF8. In this case, a period T of pulses (c) and (d) is set to the reciprocal of a carrier frequency fc, and they have a phase difference T/4. Consequently, the switching circuit 6 outputs the output (e) for a time reference E and outputs the output (f) for a period F and outputs the output of a no-signal level for periods G AND H.

Description

【発明の詳細な説明】 (技術分野) 本発明は、ディジタル処理形直交変調装置の改良に関す
るものである。
DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to an improvement in a digitally processed quadrature modulation device.

(従来技術) 従来、相異なる2種類の基底帯域信号を各々ディジタル
ローパスフィルタで帯域制限した後、互いに直交する搬
送波で振幅変調して両者を加算処理するディジタル処理
形直交変調装置は第1図に示す如き構成であった。
(Prior art) Conventionally, a digital processing type quadrature modulation device that band-limits two different types of baseband signals using digital low-pass filters, amplitude-modulates them using mutually orthogonal carrier waves, and adds them is shown in Fig. 1. The configuration was as shown.

第1図は従来よシよく知られたこの種の装置の一構成例
を示すブロック図であって、ディジタルローノやスフィ
ルク1−1.1−2、乗N回路2−+、、?−2、加算
回路3、および直交する2つの出力、換言すると互いに
直交する搬送波を発生し乗算回路2−1.2−2に出力
する正弦波発振器4から構成されている。
FIG. 1 is a block diagram showing an example of the configuration of this type of device that has been well known in the past, including a digital rono, a Sfilk 1-1, 1-2, a power N circuit 2-+, ? -2, an adder circuit 3, and a sine wave oscillator 4 that generates two orthogonal outputs, in other words mutually orthogonal carrier waves, and outputs them to the multiplier circuits 2-1 and 2-2.

しかしながら、第1図に示す如き従来の構成では、乗算
回路、加算回路、および正弦波発振器の回路量が多くな
9、したがって価格面では高価となシ、又、実装面では
大きくなる等、の問題があったのである。
However, the conventional configuration as shown in FIG. 1 requires a large amount of circuitry including a multiplier circuit, an adder circuit, and a sine wave oscillator. There was a problem.

(発明の目的) 本発明は、このような点を考慮してなされたもので、従
来あった乗算回路、加算回路、正弦波発振器等を用いず
に構成し、安価で、しかも小型化を図ったディジタル処
理形直交変調装置を提供することを目的とする。
(Objective of the Invention) The present invention has been made in consideration of the above points, and is constructed without using conventional multiplier circuits, adder circuits, sine wave oscillators, etc., and is inexpensive and miniaturized. An object of the present invention is to provide a digitally processed quadrature modulation device.

(発明の構成) すなわち、本発明はこの種の装置において、基底帯域信
号に接続され、異ったサンダル位相で動作する第1と第
2のフィルタと、前記両フィルタの出力を時分割的に走
査し切替る回路と、ディジタル・アナログ変換器と、パ
ント9ノ母スフイルクを順次接続したもので、この構成
によって上記目的を達成するものである。以下、図面を
用いて本発明を説明する。
(Structure of the Invention) In other words, the present invention provides a device of this type that includes first and second filters that are connected to a baseband signal and operate at different sandal phases, and that outputs of the two filters are transmitted in a time-sharing manner. A scanning and switching circuit, a digital/analog converter, and a pantograph 9 motherboard are connected in sequence, and this configuration achieves the above object. The present invention will be explained below using the drawings.

(発明の実施例) 第2図は本発明に係るディフタル処理形直交変調装置の
一実施例を示すグロック図であって、図中、ディジタル
ロー/4’スフイルタ5−1.5−2は各々、入力信号
(a) 、 (b)を受け、位相の異るサンダル・(ル
ス(C) 、 (d)の駆動によシサンプリングし、出
力(e) 、 (f)を送シ出す。時分割的に切替走査
する切替回路6では、前記出力(e) 、 (f)を受
けると、その切替走査によシ出力(g)を作成し、送出
する。この出力(g)は、ディジタルアナログ変換器7
に送られ、そのディジタル信号はアナログ信号に変換さ
れて出力(h)を送出し、次いで、アナログのバンド・
やスフィルタ8によって直交変調され、出力(i)の信
号を送出する。
(Embodiment of the Invention) FIG. 2 is a block diagram showing an embodiment of the differential processing type quadrature modulation device according to the present invention, in which the digital low/4' filters 5-1, 5-2 are each , receives input signals (a) and (b), samples them by driving sandals (C) and (d) with different phases, and sends out outputs (e) and (f). When the switching circuit 6 that performs switching scanning in a divided manner receives the outputs (e) and (f), it creates and sends out an output (g) according to the switching scanning.This output (g) is a digital analog converter 7
The digital signal is converted to an analog signal and sends an output (h), which is then converted into an analog band signal.
The output (i) signal is orthogonally modulated by the filter 8 and sent out as an output (i) signal.

第3図は以上述べたディジタル処理形直交変調装置の動
作を説明するタイムチャートであって、図中の(S)は
説明の為の時間基準である。又、ディジタルロー/4’
スフイルタを駆動するサンプルパルス(C) 、 (d
)の周期Tは、搬送波周波数fcの逆数に選ばれT=1
/7cに設定される。このサンプルパルス(c) 、 
(d)は、ここではT/4の位相差を持っており、した
がって切替回路6にあっては、時間基準(イ)の時に出
力(e)を、時間基準(ロ)の時に出力(f)を、時間
基準会つ、に)の時には無信号レベルの出力を各々出力
する出力(g)、換言すると出力(h)が得られるよう
に構成されている。
FIG. 3 is a time chart illustrating the operation of the digitally processed orthogonal modulator described above, and (S) in the figure is a time reference for the purpose of explanation. Also, digital low/4'
Sample pulses (C), (d
) is chosen as the reciprocal of the carrier frequency fc, and T=1
/7c. This sample pulse (c),
(d) has a phase difference of T/4 here, so in the switching circuit 6, the output (e) is output when the time base is (a), and the output (f) is output when the time base is (b). ), when the time reference is met, and (d), the output (g), which outputs a no-signal level output, is obtained, in other words, the output (h) is obtained.

第4図は周波数ス被りトラムによって上記構成のディジ
タル処理形直交変調装置の動作の説明図である。図中(
e) 、 (f)は各々ディジタルローノやスフィルタ
出力の周波数ス被りトラムを示し、(e)”、 (f)
’は搬送波の位相を示すベクトルである。又、(i)′
はアナログパンドノソスフィルタの伝送特性を示し、(
j)Uアナログパント°パスフィルタによるi文変調信
号のスにクトラムを示している。
FIG. 4 is an explanatory diagram of the operation of the digital processing type quadrature modulation device having the above configuration using a frequency overlap tram. In the figure (
e) and (f) indicate the frequency overlapping trams of the digital rono and filter output, respectively, and (e)'' and (f)
' is a vector indicating the phase of the carrier wave. Also, (i)'
shows the transmission characteristics of an analog pandonoss filter, and (
j) The spectral diagram of the i-sentence modulated signal by the U analog punt pass filter is shown.

ここで、以上第4図で示すように、本発明は直交する2
つの搬送波を得る為に異った位相を持ったサンプル/4
’ルスを用いていることが明らかで、以下、説明する。
Here, as shown in FIG. 4, the present invention provides two orthogonal
Samples with different phases to obtain two carrier waves/4
'Rus is clearly used, and will be explained below.

(e) 、 (f)の信号は各々、以下の(1)式、(
2ン式で示すことが出来る。
The signals (e) and (f) are expressed by the following equations (1) and (
It can be shown in two ways.

=(a■p)・(1+cmωct+cos2ωc t 
−1−=== )・・・・・・(1) ・・・・・・(2) 以上、(1)式、(2)式において、()内の第2項に
着目すれば明らかなように2つの搬送波は直交したもの
となっている。このことを図で示したのが第4図である
=(a■p)・(1+cmωct+cos2ωct
−1−=== )・・・・・・(1) ・・・・・・(2) The above is clear if you pay attention to the second term in parentheses in equations (1) and (2). In this way, the two carrier waves are orthogonal. FIG. 4 shows this diagrammatically.

なお、上式中、■はただみ込み積分を示し、pはディジ
タルローパスフィルタのインパルスレスポンスである。
Incidentally, in the above equation, ■ simply represents the convolution integral, and p is the impulse response of the digital low-pass filter.

(発明の効果) 以上詳述のように本発明によれば、この種の装置におい
て、異るサンプル位相を2種用意してディジタルローパ
スフィルタを駆動し、その出力を切替えて得るように構
成したので、従来の如き乗算回路、加算回路、正弦波発
振器は不用となシ、したがって、安価なそして小型化が
可能な、しかも必要とされる特性を損うことのないディ
ジタル処理形直交変調装置を提供出来る優れた効果が期
待出来るのである。
(Effects of the Invention) As detailed above, according to the present invention, in this type of device, two types of different sample phases are prepared, a digital low-pass filter is driven, and the output is obtained by switching. Therefore, there is no need for conventional multiplier circuits, adder circuits, and sine wave oscillators.Therefore, we have created a digitally processed quadrature modulation device that is inexpensive and can be miniaturized, and does not impair the required characteristics. You can expect the excellent effects it can provide.

【図面の簡単な説明】 第1図は従来のディジタル処理形直交変調装置の一構成
例を示すブロック図、第2図は本発明に係るディジタル
処理形直交変調装置の一実施例を示すブロック図、第3
図は第2図で示す装置の動作を説明するタイムチャート
、第4図はス被りトラムによる説明図である。 7−1.1−2.5−1.5−2はディノタルローie
スフィルタ、2− j 、 2−2ハ乗算回路、3は加
算回路、4は正弦波発振器、6は切替回路、7はディジ
タルアナログ変換器、8はバンドパスフィルタである。 特許出願人 沖電気工業株式会社 第1図 第2図
[BRIEF DESCRIPTION OF THE DRAWINGS] FIG. 1 is a block diagram showing an example of the configuration of a conventional digital processing quadrature modulation device, and FIG. 2 is a block diagram showing an embodiment of a digital processing quadrature modulation device according to the present invention. , 3rd
The figure is a time chart explaining the operation of the device shown in FIG. 2, and FIG. 4 is an explanatory diagram using a cover tram. 7-1.1-2.5-1.5-2 is Dino Tarro ie
3 is an adder circuit, 4 is a sine wave oscillator, 6 is a switching circuit, 7 is a digital-to-analog converter, and 8 is a bandpass filter. Patent applicant: Oki Electric Industry Co., Ltd. Figure 1 Figure 2

Claims (1)

【特許請求の範囲】 基底帯域信号を互いに直交する搬送波で振幅変調し、加
算するディジタル処理形直交変調装置において、 基底帯域信号に接続され、異ったサンプル位相で動作す
る第1と第2のディジタルロー・ぐスフィルタと、 前記両フィルタの出力を時分割的に走査し、切替える回
路と、 ディノタル・アナログ変換器と、 バンド・やスフィルタとを順次接続して構成したことを
特徴とするデイノタル処理形直交変調装置。
[Claims] A digital processing quadrature modulation device that amplitude-modulates a baseband signal using mutually orthogonal carrier waves and adds the amplitude modulation device, comprising: a first and a second baseband signal connected to the baseband signal and operating at different sample phases; The present invention is characterized in that it is configured by sequentially connecting a digital low-speed filter, a circuit that time-divisionally scans and switches the outputs of both filters, a digital-to-analog converter, and a band-to-low speed filter. Deinotal processing type quadrature modulation device.
JP3875084A 1984-03-02 1984-03-02 DEIJITARUSHORIGATACHOTSUKOHENCHOSOCHI Expired - Lifetime JPH0234539B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3875084A JPH0234539B2 (en) 1984-03-02 1984-03-02 DEIJITARUSHORIGATACHOTSUKOHENCHOSOCHI

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3875084A JPH0234539B2 (en) 1984-03-02 1984-03-02 DEIJITARUSHORIGATACHOTSUKOHENCHOSOCHI

Publications (2)

Publication Number Publication Date
JPS60183855A true JPS60183855A (en) 1985-09-19
JPH0234539B2 JPH0234539B2 (en) 1990-08-03

Family

ID=12533974

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3875084A Expired - Lifetime JPH0234539B2 (en) 1984-03-02 1984-03-02 DEIJITARUSHORIGATACHOTSUKOHENCHOSOCHI

Country Status (1)

Country Link
JP (1) JPH0234539B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0693844A3 (en) * 1994-07-20 1996-12-18 Nippon Telegraph & Telephone Digital quadrature modulator
EP0760567A2 (en) * 1995-08-30 1997-03-05 Siemens Aktiengesellschaft Digital QAM modulator

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0693844A3 (en) * 1994-07-20 1996-12-18 Nippon Telegraph & Telephone Digital quadrature modulator
EP0760567A2 (en) * 1995-08-30 1997-03-05 Siemens Aktiengesellschaft Digital QAM modulator
EP0760567A3 (en) * 1995-08-30 2000-09-06 Siemens Aktiengesellschaft Digital QAM modulator

Also Published As

Publication number Publication date
JPH0234539B2 (en) 1990-08-03

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