JPS60182742A - Integrated circuit - Google Patents

Abstract

PURPOSE:To extract only a bus, and to inspect the bus simply in a short time by connecting another terminal separate from the pad connecting terminal of the bus connecting a functional block and a junction pad for external connection to a pad for inspecting the bus. CONSTITUTION:Buses 3 connecting a memory block 2 and a junction pad group 4 for external connection are formed to a pectinate shape, pad groups 5 for inspection are fitted at the terminals of the buses (signal lines), and the buses are inspected by a probe. According to the constitution, only the buses are extracted without operating the memory block 2, and the buses can be inspected in a short time. Changeover pads 6A-6E are lead out actually from the buses 3A-3E, signals are transmitted over the changeover pads, and a designated inspecting pad 5 is selected through a transfer gate. The changeover pads 6 are kept at grounding potential at all times, and the buses are selected in such a manner that supply voltage is applied to the changeover pads and a transistor is turned ON. Accordingly, stable contacts among the probe and the pads are obtained by the inspecting pads 5 in the same number as the buses.

Description

Detailed Description of the Invention (a) 0 Technical Field of the Invention The present invention involves arranging a plurality of circuits having arithmetic functions, storage functions, etc. as functional blocks on a substrate, and connecting these functional blocks and bonding pads with signals. Regarding integrated circuits that are connected by a bus line consisting of wires, power supply lines, and have more advanced or large-scale functions than each functional block. Refers to control signal lines, synchronization signal lines, etc.

(b) Background of the technology In recent years, with the increase in the scale of integrated circuits, consideration has been given to forming integrated circuits on large chips of 20 mm square or larger, with memory, microcomputers, etc. mounted on the entire surface of a semiconductor substrate. ing.

In this case, the most important issues are ensuring production yield and reliability, and commercialization will not be possible unless these issues are thoroughly investigated and resolved.

For example, in the case of memory, at present, integrated circuits of about 64 kb have a good production yield and have been confirmed to be reliable.

In larger scale memory integrated circuits, it may be necessary to consider redundancy techniques such as replacing spare bits in order to repair defective pinpoints. In current memory integrated circuits, about 50% of the chip area is made up of memory cells, and about 3
0% is peripheral circuitry consisting of a decoder, address buffer, clock circuit, timing circuit, or read signal amplifier, etc., and the remaining approximately 20% is pads for external connection.

Therefore, even if the memory cell portion can be repaired using the redundancy technique described above, if there is a serious defect in other portions, the integrated circuit itself will become defective.

As is well known, production yields decrease dramatically as integrated circuits become more integrated. Therefore, it has become increasingly possible to realize integrated circuits that are divided into functional blocks of a scale that matches the level of integrated circuit manufacturing technology and are integrated on large chips or semiconductor substrates.

(C), Prior Art and Problems FIG. 1 shows a plan view of a large-scale memory integrated circuit in which a large number of memory integrated circuits of a scale matching the current level of manufacturing technology are integrated as functional blocks.

In the figure, 1 is a semiconductor substrate, 2 is a memory integrated circuit (memory block) as a functional block, 3 is a bus bar, and 4 is a bonding pad group or a bonding pad group and a control circuit.

The control circuit consists of a signal line drive circuit and a decoder.

Through a common signal line in the bus 3, read, write,
And a clock signal for controlling it is exchanged.

The arrow in the figure indicates this.

Regarding production yield and reliability, functional blocks have been thoroughly tested.
However, in such large-scale integrated circuits, the reliability of newly added bus lines such as signal lines becomes a problem. Conventionally, all memory blocks were operated to check whether all signal lines were operating. For this reason, it takes a long time to perform the test, and there are also problems with the reliability of the test itself.

In order to increase production yield, it is possible to switch to a spare signal line if a signal line is defective, and for this reason, it is desirable to have an integrated circuit with a structure in which only the signal line can be taken out and inspected individually.

(d) 8 Objectives of the Invention The objectives of the present invention are to eliminate the above-mentioned drawbacks of the prior art;
A functional block, a bonding pad for external connection, and a bus bar connecting the two are provided on the board, and the bus bar can be inspected by taking out the bus bar without operating each functional block. The object of the present invention is to obtain an integrated circuit that can be easily implemented in a short time.

(e)0 Structure of the Invention According to the present invention, the above-mentioned object is achieved by installing a functional program 7 on a substrate.
and a bonding band for external connection, and a bus bar connecting the functional block and the bonding pad, and the other end of the bus bar, which is different from the bonding pad connection end, is connected to the bus bar. This is achieved by providing an integrated circuit characterized in that the integrated circuit is connected to a checking pad for testing.

The present invention further utilizes a control circuit and a switching circuit to inspect busbars consisting of over 100 signal lines, etc., in the large-scale integrated circuit, by checking 50 or less lines that can be inspected by probing. Pads can be used to allow inspection of all busbars.

(f) 3 Embodiments of the Invention FIG. 2 is a plan view of an integrated circuit showing an embodiment of the present invention. In the following figures, the same numbers as in FIG. 1 indicate the same objects. In the figure, 5 indicates a group of checking pads.

As shown in the figure, a checking pad is provided at the end of the signal line, and this is used to perform a probing test to check whether each signal line is normal. In this way, only the bus bar can be taken out and tested in a short time without operating the memory block.

FIG. 3 shows an enlarged view of the checking pad group. In the figure, 5a, 5b, 5c, . . . indicate checking pads of each wiring for one signal line.

In Figure 2, five busbars are provided in a comb shape on a 5" semiconductor substrate, and several tens of signal lines and power supply lines run within one busbar. Therefore, the total number of checking pads is several dozen.
As many as 0. When performing a probing test by setting up hundreds of probes on these checking pads, not all pads may be connected well.
At the same time, it becomes difficult to inspect all the lines within the busbar. In the current probing test, random logic integrated circuits with the largest number of pins have about 40 to 100 pins, and beyond this, the contact between the probe and the pad node becomes unstable due to the structure of the probing mechanism.

Therefore, a switching circuit shown in FIG. 4 is provided. In the figure, 3A, 3B, 3C, 3D, 3E are bus bars, 6A, 6
B, 6'C, 6D, and 6E indicate switching bands.

In the figure, a signal is input to the switching band, and the bus line is checked through the transfer gate.
Select whether to connect to the The switching pad is always kept at ground potential, and bus selection is performed by applying a power supply voltage to the switching band and turning on the transistor. In this way, by using a switching circuit with the same number of switching bands as the number of busbars, the number of busbars can be reduced to several 10.
If it is made of wood, it will be supported by the same number of checking pads, and stable contact between the probe and the pads will be obtained.

FIG. 5 shows an example in which the busbars are arranged in a meandering line on a semiconductor substrate instead of in a comb shape as in the previous example. In this case as well, the checking pad group 5 can be provided at the end of the bus bar to inspect the bus bar group.

The test method involves sending a signal to the bus from the bonding pad or by operating a control circuit, and checking whether the signal is being transmitted to the checking pad group. If a semiconductor substrate of several cm square is used, only a bonding pad is required, but if a large semiconductor substrate is used as in the embodiment, the control circuit described above is used.

In the embodiment, a semiconductor substrate was used as the substrate, but other substrates such as an insulator substrate may also be used. Also, although a memory block was used as the functional block, other functional blocks,
For example, the gist of the invention does not change even if a calculation block or the like is used.

Furthermore, as in the embodiment, even if a control circuit is inserted on the bonding pad side of the busbar and a switching circuit is inserted on the checking pad side, or even if one of these circuits is inserted, or even if these circuits are inserted. Even without it, the gist of the invention does not change.

(g) 0 Effects of the Invention According to the present invention, as described in detail, the substrate 2 comprises a functional block, a bonding pad for external connection, and a bus bar connecting the two, and It is possible to obtain an integrated circuit in which this bus bar inspection can be easily and quickly carried out by taking out only the bus bar without operating each functional program.

[BRIEF DESCRIPTION OF THE DRAWINGS] FIG. 1 is a plan view of an integrated circuit according to a conventional example, FIG. 2 is a plan view of an integrated circuit showing an embodiment of the present invention, FIG. 3 is an enlarged view of a group of checking pads, and FIG. Figure 4 shows the switching circuit, Figure 5.
The figure is a plan view of an integrated circuit showing another embodiment of the present invention. In the figure, 1 is a semiconductor cutting board, 2 is a functional processor, and 3.
3A, 3B, 3C, 3D, 3B are bus bars, 4 is a bonding pad group, 5 is a checking pad group, 5a
+ 5 b+ J C+ . . . indicates a checking band, and 6A, 6B, 6G, 6D, and 6E indicate switching pads. Figure 2 #3 @ 蓼S吋

Claims (1)

[Claims] A functional block, a bonding band for external connection, and a bus bar connecting the functional block and the bonding pad are provided on the board, and the other end of the bus bar is different from the bonding pad connection end. , connected to a checking band for testing the bus bar.