JPS60182727A - Automatic wafer processor - Google Patents

Abstract

PURPOSE:To remove the adhesion of a foreign matter due to the interposition of a human being, and to improve the throughput of the whole system by continuously executing the application of a resist, exposure and development during a time when a wafer is moved to an unloading section from a loading section. CONSTITUTION:A loading cassette 32, a resist applying and baking device 1 and a wafer carrying path changeover section 33 are connected in series, and an exposure device 9 is installed on the downstream side of these devices and members. A wafer exposed in the device 9 is forwarded to another wafer carrying path changeover section 34 again, and returned to an unloading cassette 44 through a developing and baking device 14. In the constitution, buffer cassettes 35 and 36, belt carrying mechanisms 37 and 38 and 41, sensors 42 and 43, etc. are each mounted previously to several changeover section 33 and 34, and the attitude of the wafer is corrected in the changeover sections 33 and 34 while the wafer is not passed through the device 9 and is fed directly into the device 14 when it is exposed previously. Accordingly, the title processor is proper to the manufacture of an ultra LSI, etc.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a moving wafer processing apparatus, and particularly to an automatic wafer processing apparatus for manufacturing semiconductor devices such as VLSIs.

[Background of the invention]

Conventionally, a wafer processing apparatus as shown in FIG. 1 has been used to process wafers when manufacturing semiconductor devices, and processing as shown in the flowchart of FIG. 2 has been performed.

In FIG. 1, 1 is a resist coating/bake device, 2 is a cassette containing a wafer 3 and installed in the resist coating/bake device 1, 4 is a loader portion of the cassette 2, 5 is a resist applicator, and 6 is a bake device. Furnace, 7 is resist coating/baking device 1
8 is an unloader section of the cassette 7; 9 is an exposure device; 10
11 is the loader section of the cassette 7 containing the wafer 3a;
12 is an exposure device, 12 is a cassette that accommodates the wafer 3b that has been processed in the exposure device 12, 13 is an unloader section of the cassette 12, 14 is a developing device for the exposed wafer 13b, 15 is a loader section of the cassette 12, 16 17 is a developing device, 17 is a baking furnace, 18 is a cassette for accommodating the wafer 3C which has been processed in the developing/baking device 14, and 19 is an unloader section of the cassette 18.

In the UNINO 1 processing step (photolithography 1 step) using this wafer processing apparatus, as shown in FIG. After a resist is applied 21 to the surface of the wafer 3 using a resist applicator 5, a pre-baking process 22 is performed using a baking oven 6, and the processed wafer 3a is stored in a cassette 7. Next, the cassette 7 containing the wafers 3a is transported 23 by a person and mounted 24 on the loader section 10 of the exposure apparatus 9. The sea urchin 3a in the cassette 7 is transported from the loader section 10 to the exposure device 11, exposed 25, and then stored in the cassette 12 of the unloader section 13. The cassette 12 containing the exposed Unino-3b is transported 26 again by a person and loaded 27 into the loader section 15 of the developing/bake device 14, developed 28 by the developing/bake means 14, and post-baked 29 by the bake oven 17. After, cassette 1
9 and then transported to a diffusion or etching process.

In this conventional system, there are
4, it is necessary for humans to transport the unit in cassette units, which results in the accumulation of foreign matter during transport and a reduction in throughput, which leads to the miniaturization of VLSI circuitry. As time goes on, this human intervention has become a problem.

Therefore, the resist coating 4F, baking device 5, developing device, and
The bake device 14 and the light beam device 9 are connected through interfaces 30 and 31, and resist coating, exposure, and development are performed on a wafer basis. So-called in-line automatic processing equipment is becoming popular. 32a in this figure
, 32b indicate the sea urchin/S before and after treatment, respectively.

However, in the processing device of this method, the difference in processing capacity between the exposure device 9, the resist thread surface/bake device 5, and the development/bake device 14 causes a reduction in the throughput of the entire system. It has become.

There are also gaps and peaks in the sequence control between Taniso and J, and it is a complete eye movement sea urchin) What is the S processing device?
ζ.

[From the beginning] An object of the present invention is to provide an automatic wafer processing system that eliminates the conventional sagging points and increases the throughput of the entire system. be.

[Summary of investigation]

The present invention provides 111g-order movement between a means for applying a resist onto a wafer, a means for exposing and transferring a predetermined original image pattern onto the resist, and a means for developing the original image pattern,
Automatically performs resist hood, Yako, and development! (In the Φ wafer processing apparatus 6, means for bending the resist by one character, means for developing the 16ξ pattern, and the 'J
7:, 2. of the wafer, and the wafer conveyance means provided between the wafer clamp and the optical transfer means. Temporary standby means for temporarily waiting the 1j wafer from the Midi transfer means when the cutting edge is in progress, and means for exposing and transferring the original pattern of the MiJ wafer or the original pattern. The apparatus is characterized in that it has a path switching means for switching between 1) a feed between the inspection sum to the means for developing the wafer and the temporary waiting means for the wafer.

That is, the present invention provides resist coating/base coating on wafers,
In a wafer processing apparatus that has means for exposing the original image pattern and developing and baking the exposed wafer, the resist 4 cloth +
111'ij light, development can be performed consistently, eliminating the adhesion of foreign matter due to human intervention, and preventing the formation of light between the resist coating, baking means and exposure means, and between the exposure means and the development/baking means. A means for switching the wafer transport path between the two means is used to temporarily wait the wafer, absorbing the difference in processing capacity between each means, improving the throughput of the entire system, and achieving the intended purpose. It is what makes achievement possible.

[Embodiments of the invention]

Examples will be described below with reference to FIGS. 4 to 8.

In each figure, the same parts are given the same reference numerals, and
The same parts as in FIG. 3 are designated by the same reference numerals.

FIG. 4 is an explanatory diagram of one embodiment, FIG. 5 is a perspective view of the mounting section of FIG. 4, and FIG. 6 is a sequence flow diagram. Fourth
In the figure and FIG. 5, 32 is a load cassette, and 33 and 34 are wafers provided between the resist coating/beaming device 1 and the exposure device 9 and between the exposure device 9 and the developing/baking device 14, respectively. Conveyance path switching units 35 and 36 are buffer cassettes on the wafer conveyance path switching units 33 and 34, respectively; 37 and 38 are connections from the resist coating/bake device 1 to the exposure device 9, and from the exposure device 9 to the development/bake device 14, respectively. A belt 41 conveyor (1, 39, 40 and 41 is a buffer cassette 35 or 36) that conveys the wafer.
A belt conveyance mechanism for conveying the wafer to or from the buffer cassette 35 or 36, 42 and 43 indicate a wafer conveyance path cutter, sensors provided in sections a 33 and 34, and 44 an unload cassette. In the embodiment, the bell 11 transporting mechanism 37 and 38 for transporting the wafer
9. 40 and 41 are provided so as to be orthogonal to each other. In addition, the belt conveyance mechanism 37.38, 39°40.41 is as follows.
For example, as shown in FIG. 5, two parallel belts 4 are rotated simultaneously by a coaxial rotation mechanism 46 having a drive source 45.
7, and a mechanism (not shown) that can move the belt 47 up and down.
It is made up of. The drive source 45 is a DC servo motor or a pulse motor that can rotate in both directions, and the wafer transport path can be switched by using one of the belt transport mechanisms combined in orthogonal directions depending on the transport purpose. It is done by going up and down.

Next, a wafer processing process using this wafer processing apparatus will be described with reference to FIG. 6, in which the same steps as in FIG. 2 are indicated by the same numbers. Load the wafer into the load cassette 32 48
After that, the wafer is transferred to resist coating/bake equipment 1.
The wafer is automatically conveyed 49 to the general feed path switching unit 33 by the resist coating 21 and prebake 22 trowel and belt conveyance mechanism 37, and is detected by the sensor 42. At this time,
When the exposure device 9 RIJ (D f)
It is transported 51 and stored.

If there is a delay in the supply of wafers from the resist coating/bake device 1, the wafers stored in the buffer cassette 35 are transferred to the belt transport mechanism 39 and the transport path switching unit 33.
The image is then discharged to a conveyor 53 and supplied to the exposure device 9 by a belt conveyor mechanism 37.

The wafer that has been exposed 25 in the exposure device 9 is transported 5 to the wafer transport path switching unit 34 by the milling forging machine 438.
4 and detected by the sensor 43. At this time, developing
When the baking device 14 is in the process of developing the previous wafer, the conveyance 55 is transferred to the buffer cassette 36 by the belt feeding mechanism 40.
6 and stored. The wafer in the buffer cassette 36 is
If there is a delay in the supply of the wafer from the exposure device 9, the wafer is discharged by the belt conveyance mechanism 40 to the single water speed path switching section 34, and the wafer is conveyed 57 to the current straining/baking means device 14.

Unfortunately, as shown in FIG. 4, if the wafer transport path switching units 33 and 34 are connected to the belt transport mechanism 41, the wafers can be transferred to the resist coating/bake device without passing through the kk exposure device. It is also possible to supply the wafer from 1 to the developing/baking device 4.

In addition, in the automatic wafer processing apparatus of the embodiment, the wafer transport path switching unit 33 stops transporting the wafer to the A5 optical device 9, enables transport only to the buffer cassette 35, and performs only resist coating and baking. It is also possible to supply the wafer to the buffer cassette 35, supply the wafer to the exposure device 9 via the wafer transport path switching section 33, and transport the exposed wafer to the buffer cassette 36 via the transport path switching section 34. In this way, only wafer exposure can be performed, and the wafer is further supplied to the buffer cassette 36 and developed/developed via the wafer transport path switching section 33.
It is also possible to carry out only development and baking by conveying to the baking device 14.

Figures 7 and 8 are explanatory diagrams of other different embodiments, and the same parts as in Figure tJJJ4 are given the same reference numerals. These embodiments differ from the embodiment shown in FIG. 4 in that the resist coating/bake device 1, the exposure device 9, and the development/bake device 14 are mutually arranged differently, and the effect based on the difference in arrangement is not achieved. Except for this, its operation and effect are the same as the embodiment shown in FIG.

In the automatic wafer processing equipment of these embodiments, even if there are differences in the processing times of the resist coating/bake equipment, exposure equipment, and development/baking equipment, the overall throughput can be maintained without deteriorating the overall throughput. Wafer resist coating, exposure, and development can be performed automatically. In addition, there is no need for humans to handle the wafers, and the attendant foreign matter +J deposits do not occur, so this method is extremely effective in manufacturing VLSIs.

〔Effect of the invention〕

The present invention makes it possible to provide an automatic processing device that can improve the throughput of the entire system, and has great industrial effects.

[Brief explanation of the drawing]

FIG. 1 is an explanatory diagram of a conventional wafer processing apparatus, FIG. 2 is a flow diagram, FIG. 3 is an explanatory diagram of a conventional automatic wafer processing apparatus, and FIG. 4 is an implementation of the automatic wafer processing apparatus of the present invention. FIG. 5 is a perspective view of the main part, FIG. 6 is a sequence flow diagram, and FIGS. 7 and 8 are explanatory diagrams of different embodiments. DESCRIPTION OF SYMBOLS 1... Resist coating, baking device, 9... Exposure device, 14... Developing and baking device, 32... Load cassette, 33. 34... Wafer conveyance path switching unit, 35
．． 36...Buffer cassette, 37.38,39,4
0°41...Belt conveyance mechanism, 42.43...Sensor, 44...Unload cassette, 45...Moving source, 4G...Rotation mechanism, 47...Belt. Agent Patent attorney Hiroo Nagasaki (and 1 other person) Funeral 2 Figure Yui 3 Figure 32 = - ■ 31 High ω diagram is also S diagram

Claims (1)

[Claims] 1. JIN movement between a means for applying a resist to a wafer, a means for exposing and transferring a predetermined original image pattern onto the resist, and a means for developing the original image pattern, and resist application, exposure, In an automatic wafer processing apparatus that automatically performs development, the wafer conveying means is provided between the means for applying the resist, the means for developing the original image pattern, and the means for exposing and transferring the original image pattern, Temporary standby means for temporarily waiting the wafer from the transport means when the destination of the wafer is undergoing processing; and means for exposing and transferring the original pattern of the wafer or means for developing the original pattern. an automatic wafer processing apparatus characterized by comprising a path switching means for switching the transport between the transport of the wafer and the temporary standby means for the wafer. 2. The means for transporting the wafer from the means for applying the resist to the means for exposing and transferring the original image pattern, and the means for transporting the wafer from the means for transferring the original image pattern to the means for developing the original image pattern are arranged in parallel. 2. The automatic wafer processing apparatus according to claim 1, wherein the temporary standby means is provided at both ends of a transport means having a transport direction that intersects with the transport direction of the transport means.